<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/arm/boot/dts/aspeed, branch master</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>ARM: dts: aspeed: anacapa: Add retimer EEPROMs</title>
<updated>2026-02-23T01:32:22+00:00</updated>
<author>
<name>Dirk Chen</name>
<email>dirkchen@amd.com</email>
</author>
<published>2026-02-19T15:44:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=76b4ec8efdc3887cdbf730da2e55881fc1a18770'/>
<id>76b4ec8efdc3887cdbf730da2e55881fc1a18770</id>
<content type='text'>
The Anacapa board features Atmel 24C2048 EEPROMs on i2c0 and i2c1, which
are used to store retimer configurations. Add the corresponding device
tree nodes to support these components.

Signed-off-by: Dirk Chen &lt;dirkchen@amd.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Anacapa board features Atmel 24C2048 EEPROMs on i2c0 and i2c1, which
are used to store retimer configurations. Add the corresponding device
tree nodes to support these components.

Signed-off-by: Dirk Chen &lt;dirkchen@amd.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: anacapa: add NFC device</title>
<updated>2026-02-22T23:13:06+00:00</updated>
<author>
<name>Carl Lee</name>
<email>carl.lee@amd.com</email>
</author>
<published>2026-02-09T02:25:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c5902c06742c7fd241508c3573fb0cff0c97f33a'/>
<id>c5902c06742c7fd241508c3573fb0cff0c97f33a</id>
<content type='text'>
add NFC NXP NCI device support to NFC tag reading

Signed-off-by: Carl Lee &lt;carl.lee@amd.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
add NFC NXP NCI device support to NFC tag reading

Signed-off-by: Carl Lee &lt;carl.lee@amd.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: Add Asrock Paul IPMI card</title>
<updated>2026-02-22T23:13:06+00:00</updated>
<author>
<name>Anirudh Srinivasan</name>
<email>anirudhsriniv@gmail.com</email>
</author>
<published>2026-01-25T21:00:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=633d9ef1da63e82cfb4c1e731abd6e9ade544c92'/>
<id>633d9ef1da63e82cfb4c1e731abd6e9ade544c92</id>
<content type='text'>
Add device tree for Asrock Paul IPMI card, an AST2500 based PCIe BMC
card.

Signed-off-by: Anirudh Srinivasan &lt;anirudhsriniv@gmail.com&gt;
Link: https://patch.msgid.link/20260125-asrock-paul-v1-2-956085a4bd06@gmail.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add device tree for Asrock Paul IPMI card, an AST2500 based PCIe BMC
card.

Signed-off-by: Anirudh Srinivasan &lt;anirudhsriniv@gmail.com&gt;
Link: https://patch.msgid.link/20260125-asrock-paul-v1-2-956085a4bd06@gmail.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: Add 128M alt flash layout to NVIDIA MSX4</title>
<updated>2026-02-22T23:13:06+00:00</updated>
<author>
<name>Marc Olberding</name>
<email>molberding@nvidia.com</email>
</author>
<published>2026-01-20T20:34:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=62f0fd7599f092f07203d7113612870fe98b60d5'/>
<id>62f0fd7599f092f07203d7113612870fe98b60d5</id>
<content type='text'>
Add a 128M layout for the BMC flash chip we didn't boot from. Including
this allows the user to write to each partition on the alternate spi
chip. This dtsi follows the existing standard of using the same layout
as non alt version and prepending `alt` to each partition's name.

[arj: Update subject, elide test demonstration]

Signed-off-by: Marc Olberding &lt;molberding@nvidia.com&gt;
Link: https://patch.msgid.link/20260120-alt-128-v4-1-0e5c491a532c@nvidia.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a 128M layout for the BMC flash chip we didn't boot from. Including
this allows the user to write to each partition on the alternate spi
chip. This dtsi follows the existing standard of using the same layout
as non alt version and prepending `alt` to each partition's name.

[arj: Update subject, elide test demonstration]

Signed-off-by: Marc Olberding &lt;molberding@nvidia.com&gt;
Link: https://patch.msgid.link/20260120-alt-128-v4-1-0e5c491a532c@nvidia.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: Add Asus Kommando IPMI card</title>
<updated>2026-02-22T23:13:06+00:00</updated>
<author>
<name>Anirudh Srinivasan</name>
<email>anirudhsriniv@gmail.com</email>
</author>
<published>2026-01-15T05:31:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=36c1cea299fe548a02b6d652e53908ce3ffad008'/>
<id>36c1cea299fe548a02b6d652e53908ce3ffad008</id>
<content type='text'>
Add device tree for Asus Kommando IPMI Expansion card, an AST2600 based
PCIe BMC card.

Signed-off-by: Anirudh Srinivasan &lt;anirudhsriniv@gmail.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add device tree for Asus Kommando IPMI Expansion card, an AST2600 based
PCIe BMC card.

Signed-off-by: Anirudh Srinivasan &lt;anirudhsriniv@gmail.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: ibm: Use non-deprecated AT25 properties</title>
<updated>2026-01-08T09:34:23+00:00</updated>
<author>
<name>Rob Herring (Arm)</name>
<email>robh@kernel.org</email>
</author>
<published>2026-01-06T21:31:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e600933b6e518397b3f256dddd233e5d8e6cff93'/>
<id>e600933b6e518397b3f256dddd233e5d8e6cff93</id>
<content type='text'>
The at25,* properties have been deprecated since 2012. These platforms
weren't upstream until 2020 and 2023, so it should be safe to switch
over to the "new" properties and just drop the deprecated ones.

Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The at25,* properties have been deprecated since 2012. These platforms
weren't upstream until 2020 and 2023, so it should be safe to switch
over to the "new" properties and just drop the deprecated ones.

Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: add device tree for ASRock Rack ALTRAD8 BMC</title>
<updated>2026-01-08T05:41:26+00:00</updated>
<author>
<name>Rebecca Cran</name>
<email>rebecca@bsdio.com</email>
</author>
<published>2025-12-18T16:18:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c6d3513c90bd1382d11f82b65c6baac9285b1bf0'/>
<id>c6d3513c90bd1382d11f82b65c6baac9285b1bf0</id>
<content type='text'>
The ALTRAD8 BMC is an Aspeed AST2500-based BMC for the ASRock Rack
ALTRAD8UD-1L2T and ALTRAD8UD2-1L2Q boards.

Signed-off-by: Rebecca Cran &lt;rebecca@bsdio.com&gt;
Tested-by: Tan Siewert &lt;tan.siewert@hetzner.com&gt;
Reviewed-by: Tan Siewert &lt;tan.siewert@hetzner.com&gt;
Link: https://patch.msgid.link/20251218161816.38155-3-rebecca@bsdio.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ALTRAD8 BMC is an Aspeed AST2500-based BMC for the ASRock Rack
ALTRAD8UD-1L2T and ALTRAD8UD2-1L2Q boards.

Signed-off-by: Rebecca Cran &lt;rebecca@bsdio.com&gt;
Tested-by: Tan Siewert &lt;tan.siewert@hetzner.com&gt;
Reviewed-by: Tan Siewert &lt;tan.siewert@hetzner.com&gt;
Link: https://patch.msgid.link/20251218161816.38155-3-rebecca@bsdio.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: bletchley: Remove try-power-role from connectors</title>
<updated>2026-01-08T05:28:25+00:00</updated>
<author>
<name>Cosmo Chou</name>
<email>chou.cosmo@gmail.com</email>
</author>
<published>2025-12-19T06:29:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7c2516fc94b80ca38bb32dc57d1ab67224cacc90'/>
<id>7c2516fc94b80ca38bb32dc57d1ab67224cacc90</id>
<content type='text'>
Remove the "try-power-role = sink" property from all USB-C connectors.
The try mechanism is unnecessary and wastes time during connection.
Since power-role = "dual" is already configured, standard USB PD
negotiation is sufficient and more efficient.

Signed-off-by: Cosmo Chou &lt;chou.cosmo@gmail.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove the "try-power-role = sink" property from all USB-C connectors.
The try mechanism is unnecessary and wastes time during connection.
Since power-role = "dual" is already configured, standard USB PD
negotiation is sufficient and more efficient.

Signed-off-by: Cosmo Chou &lt;chou.cosmo@gmail.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: Add Facebook Anacapa platform</title>
<updated>2026-01-08T05:05:56+00:00</updated>
<author>
<name>Peter Shen</name>
<email>sjg168@gmail.com</email>
</author>
<published>2025-12-19T09:16:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bc83b7353d2bfefba73193335bacc3542d8a7ae2'/>
<id>bc83b7353d2bfefba73193335bacc3542d8a7ae2</id>
<content type='text'>
The Meta Anacapa BMC is the DC-SCM (Data Center Secure Control
Module) controller for the Meta OCP Open Rack Wide (ORW) compute tray.
This platform is a key component of the AMD Helios AI rack reference
design system, designed for next-generation AI workloads.

The BMC utilizes the Aspeed AST2600 SoC to manage the compute tray, which
contains up to 4 AMD Instinct MI450 Series GPUs (connected via a Broadcom
OCP NIC) and host CPUs. Its primary role is to provide essential system
control, power sequencing, and telemetry reporting for the compute complex
via the OpenBMC software stack.

For more detail on the AMD Helios reference design:

https://www.amd.com/en/blogs/2025/amd-helios-ai-rack-built-on-metas-2025-ocp-design.html

Signed-off-by: Peter Shen &lt;sjg168@gmail.com&gt;
Link: https://patch.msgid.link/20251219091632.1598603-3-sjg168@gmail.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Meta Anacapa BMC is the DC-SCM (Data Center Secure Control
Module) controller for the Meta OCP Open Rack Wide (ORW) compute tray.
This platform is a key component of the AMD Helios AI rack reference
design system, designed for next-generation AI workloads.

The BMC utilizes the Aspeed AST2600 SoC to manage the compute tray, which
contains up to 4 AMD Instinct MI450 Series GPUs (connected via a Broadcom
OCP NIC) and host CPUs. Its primary role is to provide essential system
control, power sequencing, and telemetry reporting for the compute complex
via the OpenBMC software stack.

For more detail on the AMD Helios reference design:

https://www.amd.com/en/blogs/2025/amd-helios-ai-rack-built-on-metas-2025-ocp-design.html

Signed-off-by: Peter Shen &lt;sjg168@gmail.com&gt;
Link: https://patch.msgid.link/20251219091632.1598603-3-sjg168@gmail.com
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: bletchley: Fix ADC vref property names</title>
<updated>2025-12-17T05:23:31+00:00</updated>
<author>
<name>Cosmo Chou</name>
<email>chou.cosmo@gmail.com</email>
</author>
<published>2025-12-17T02:39:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=459a5aa171c0f13fcd78faa9594dc4aa5a95770b'/>
<id>459a5aa171c0f13fcd78faa9594dc4aa5a95770b</id>
<content type='text'>
Replace non-functional 'vref' with 'aspeed,int-vref-microvolt'
using the default 2.5V that the driver was already applying.

Signed-off-by: Cosmo Chou &lt;chou.cosmo@gmail.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Replace non-functional 'vref' with 'aspeed,int-vref-microvolt'
using the default 2.5V that the driver was already applying.

Signed-off-by: Cosmo Chou &lt;chou.cosmo@gmail.com&gt;
Signed-off-by: Andrew Jeffery &lt;andrew@codeconstruct.com.au&gt;
</pre>
</div>
</content>
</entry>
</feed>
