linux.git/arch/arc/kernel, branch v6.6

ARC: boot log: fix warning

2023-08-24T05:36:19+00:00

Reported-by: kernel test robot 
Closes: https://lore.kernel.org/oe-kbuild-all/202308221549.XKufWEWp-lkp@intel.com/
Signed-off-by: Vineet Gupta

ARC: pt_regs: create seperate type for ecr

2023-08-18T17:30:47+00:00

Reduces duplication in each ISA specific pt_regs

Tested-by: kernel test robot 
Closes: https://lore.kernel.org/oe-kbuild-all/202308151342.ROQ9Urvv-lkp@intel.com
Signed-off-by: Vineet Gupta

ARCv2: entry: rearrange pt_regs slightly

2023-08-18T17:30:47+00:00

Instead of r26,fp,sp,r12,r30 order as fp,r30,r12,r26,sp

 - keeps SP at well known position (right abive hardware autosave)
 - r26,r12 saved specifically for ARCv2 (and not in ARCv3) kept
   closer for easy ifdef'ry later

Signed-off-by: Vineet Gupta

ARC: entry: Add more common chores to EXCEPTION_PROLOGUE

2023-08-18T17:30:07+00:00

THe high level structure of most ARC exception handlers is
 1. save regfile with EXCEPTION_PROLOGUE
 2. setup r0: EFA (not part of pt_regs)
 3. setup r1: pointer to pt_regs (SP)
 4. drop down to pure kernel mode (from exception)
 5. call the Linux "C" handler

Remove the boiler plate code by moving #2, #3, #4 into #1.

The exceptions to most exceptions are syscall Trap and Machine check
which don't do some of above for various reasons, so call a newly
introduced variant EXCEPTION_PROLOGUE_KEEP_AE (same as original
EXCEPTION_PROLOGUE)

Tested-by: Pavel Kozlov 
Signed-off-by: Vineet Gupta

ARC: entry: EV_MachineCheck dont re-read ECR

2023-08-18T03:31:59+00:00

Signed-off-by: Vineet Gupta

ARC: entry: ARcompact EV_ProtV to use r10 directly

2023-08-18T03:31:59+00:00

Signed-off-by: Vineet Gupta

ARC: entry: rework (non-functional)

2023-08-18T03:31:59+00:00

 - comments update
 - rename syscall_trace_entry
 - use PT_xxx in entry code

Signed-off-by: Vineet Gupta

ARC: __switch_to: move ksp to thread_info from thread_struct

2023-08-18T03:31:59+00:00

task's arch specific bits are carried in 2 places
 - embedded thread_struct in task_struct
 - associated thread_info (hoisted in task's stack page) and
   syntactically: (thread_info *)(task_struct->stack)

ksp (dynamic kernel stack top) currently lives in thread_struct but
given its deep location in task struct likely to cache miss when
accessed from  __switch_to(). Moving it to thread_info would be more
efficient given proximity to frequently accessed items such as
preempt_count thus very likely to be in cache, specially in schedular
code.

Note however that currently tsk.thread.ksp takes 1 memory access (off
of tsk pointer) while new code tsk->stack.ksp would take 2, but likely
to be in cache. Moreover if task is current the 2nd reference can be
elided and instead derived from SP as (SP & ~(THREAD_SIZE - 1))

All of this also makes __switch_to() code simpler and we can see the 2
ways of retirving ksp (descrobed above) in new code.

Signed-off-by: Vineet Gupta

ARC: __switch_to: asm with dwarf ops (vs. inline asm)

2023-08-18T03:31:59+00:00

__switch_to() is final step of context switch, swapping kernel modes
stack (and callee regs) of outgoing task with next task.

It is also the starting point of stack unwinging of a sleeping task and
captures SP, FP, BLINK and the corresponding dwarf info. Back when
dinosaurs still roamed around, ARC gas didn't support CFI pseudo ops and
gcc was responsible for generating dwarf info. Thus it had to be written
in "C" with inline asm to do the hand crafting of stack. The function
prologue (and crucial saving of blink etc) was still gcc generated but
not visible in code. Likewise dwarf info was missing.

Now with modern tools, we can make things more obvious by writing the
code in asm and adding approproate dwarf cfi pseudo ops.

This is mostly non functional change, except for slight chnages to asm

 - ARCompact doesn't support MOV_S fp, sp, so we use MOV

Signed-off-by: Vineet Gupta

ARC: entry: use gp to cache task pointer (vs. r25)

2023-08-18T03:31:59+00:00

The motivation is eventual ABI considerations for ARCv3 but even without
it this change us worthwhile as diffstat reduces 100 net lines

r25 is a callee saved register, normally not saved by entry code in
pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs
to be. This in turn requires a whole bunch of special casing when we
need to access r25. Then there is distinction between user mode r25 vs.
kernel mode r25 - hence distinct SAVE_CALLEE_SAVED_{USER,KERNEL}

Instead use gp which is a scratch register and thus saved already in entry
code. This cleans things up significantly and much nocer on eyes:

 - SAVE_CALLEE_SAVED_{USER,KERNEL} are now exactly same
 - no special user_r25 slot in pt_reggs

Note that typical global asm registers are callee-saved (r25), but gp is
not callee-saved thus needs additional -ffixed- toggle

Signed-off-by: Vineet Gupta