<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/arc/kernel/entry.S, branch v3.9-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>ARC: Fix pt_orig_r8 access</title>
<updated>2013-02-15T17:46:21+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-02-11T09:10:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3eb3e7dd53a83cbe6e7b95aa87d2c5dc861233a6'/>
<id>3eb3e7dd53a83cbe6e7b95aa87d2c5dc861233a6</id>
<content type='text'>
Syscall restarting fixes made pt_regs-&gt;orig_r8 a short word, which was
not reflected in the assembler code - thus could potentially break gdb
debugging.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Syscall restarting fixes made pt_regs-&gt;orig_r8 a short word, which was
not reflected in the assembler code - thus could potentially break gdb
debugging.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Support for single cycle Close Coupled Mem (CCM)</title>
<updated>2013-02-15T17:46:10+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8b5850f8ac8d9b809db4588b80b568faca5aaaaf'/>
<id>8b5850f8ac8d9b809db4588b80b568faca5aaaaf</id>
<content type='text'>
* Includes mapping of CCMs in address space
* Annotations to move arbitrary code/data into CCM
* Moving some of the critical code/data into CCM
* Runtime detection/reporting

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* Includes mapping of CCMs in address space
* Annotations to move arbitrary code/data into CCM
* Moving some of the critical code/data into CCM
* Runtime detection/reporting

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Unaligned access emulation</title>
<updated>2013-02-15T17:46:06+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-23T11:00:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2e651ea1596b0ee25af4fcdc4cd13cbb33ffc254'/>
<id>2e651ea1596b0ee25af4fcdc4cd13cbb33ffc254</id>
<content type='text'>
ARC700 doesn't natively support unaligned access, but can be emulated
-Unaligned Access Exception
-Disassembly at the Fault address to find the exact insn (long/short)

Also per Arnd's comment, we runtime control it using 2 sysctl knobs:
* SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble
* SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt

Originally contributed by Tim Yao &lt;tim.yao@amlogic.com&gt;

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tim Yao &lt;tim.yao@amlogic.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
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<pre>
ARC700 doesn't natively support unaligned access, but can be emulated
-Unaligned Access Exception
-Disassembly at the Fault address to find the exact insn (long/short)

Also per Arnd's comment, we runtime control it using 2 sysctl knobs:
* SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble
* SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt

Originally contributed by Tim Yao &lt;tim.yao@amlogic.com&gt;

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tim Yao &lt;tim.yao@amlogic.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: DWARF2 .debug_frame based stack unwinder</title>
<updated>2013-02-15T17:46:03+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-22T11:33:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=854a0d95056c265d96cb449bc97bc5ef9bbed835'/>
<id>854a0d95056c265d96cb449bc97bc5ef9bbed835</id>
<content type='text'>
-Originally written by Rajeshwar Ranga
-Derived off of generic unwinder in 2.6.19 and adapted to ARC

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Rajeshwar Ranga &lt;rajeshwar.ranga@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
-Originally written by Rajeshwar Ranga
-Derived off of generic unwinder in 2.6.19 and adapted to ARC

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Rajeshwar Ranga &lt;rajeshwar.ranga@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: SMP support</title>
<updated>2013-02-15T17:46:02+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=41195d236e84458bebd4fdc218610a92231ac791'/>
<id>41195d236e84458bebd4fdc218610a92231ac791</id>
<content type='text'>
ARC common code to enable a SMP system + ISS provided SMP extensions.

ARC700 natively lacks SMP support, hence some of the core features are
are only enabled if SoCs have the necessary h/w pixie-dust. This
includes:
-Inter Processor Interrupts (IPI)
-Cache coherency
-load-locked/store-conditional
...

The low level exception handling would be completely broken in SMP
because we don't have hardware assisted stack switching. Thus a fair bit
of this code is repurposing the MMU_SCRATCH reg for event handler
prologues to keep them re-entrant.

Many thanks to Rajeshwar Ranga for his initial "major" contributions to
SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
with resurrecting that in 3.2 kernel (2012).

Note that this platform code is again singleton design pattern - so
multiple SMP platforms won't build at the moment - this deficiency is
addressed in subsequent patches within this series.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Rajeshwar Ranga &lt;rajeshwar.ranga@gmail.com&gt;
Cc: Noam Camus &lt;noamc@ezchip.com&gt;
Cc: Gilad Ben-Yossef &lt;gilad@benyossef.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ARC common code to enable a SMP system + ISS provided SMP extensions.

ARC700 natively lacks SMP support, hence some of the core features are
are only enabled if SoCs have the necessary h/w pixie-dust. This
includes:
-Inter Processor Interrupts (IPI)
-Cache coherency
-load-locked/store-conditional
...

The low level exception handling would be completely broken in SMP
because we don't have hardware assisted stack switching. Thus a fair bit
of this code is repurposing the MMU_SCRATCH reg for event handler
prologues to keep them re-entrant.

Many thanks to Rajeshwar Ranga for his initial "major" contributions to
SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
with resurrecting that in 3.2 kernel (2012).

Note that this platform code is again singleton design pattern - so
multiple SMP platforms won't build at the moment - this deficiency is
addressed in subsequent patches within this series.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Rajeshwar Ranga &lt;rajeshwar.ranga@gmail.com&gt;
Cc: Noam Camus &lt;noamc@ezchip.com&gt;
Cc: Gilad Ben-Yossef &lt;gilad@benyossef.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Support for high priority interrupts in the in-core intc</title>
<updated>2013-02-15T17:46:01+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4788a5942bc896803c87005be8c6dd14c373a2d3'/>
<id>4788a5942bc896803c87005be8c6dd14c373a2d3</id>
<content type='text'>
There is a bit of hack/kludge right now where we disable preemption if a
L2 (High prio) IRQ is taken while L1 (Low prio) is active.

Need to revisit this

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is a bit of hack/kludge right now where we disable preemption if a
L2 (High prio) IRQ is taken while L1 (Low prio) is active.

Need to revisit this

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: ptrace support</title>
<updated>2013-02-15T17:45:59+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=547f112571904da03589beb8434185294c77896a'/>
<id>547f112571904da03589beb8434185294c77896a</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: [optim] Cache "current" in Register r25</title>
<updated>2013-02-15T17:45:58+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-02-11T14:22:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=080c37473eb671a037b3e9a315303851f0675be5'/>
<id>080c37473eb671a037b3e9a315303851f0675be5</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: [Review] Preparing to fix incorrect syscall restarts due to signals</title>
<updated>2013-02-15T17:45:49+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-02-11T14:31:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5c39c0ab5e862cf71cda1fc39a5cedd4e2f18c6e'/>
<id>5c39c0ab5e862cf71cda1fc39a5cedd4e2f18c6e</id>
<content type='text'>
To avoid multiple syscall restarts (multiple signals) or no restart at
all (sigreturn), we need just an extra bit of state "literally 1 bit" in
struct pt_regs. orig_r8 is the best place to do this, however given the
way it is encoded currently, we can't add anything simplistically.

Current orig_r8:
* syscalls   -&gt; 1 to NR_SYSCALLS
* Exceptions -&gt; NR_SYSCALLS + 1
* Break-point-&gt; NR_SYSCALLS + 2

In new scheme it is a bit-field
* lower short word contains the  exact event type (and a new bit to represent
   restart semantics : if syscall was already / can't be restarted)
* upper short word optionally containing the syscall num - needed by
  likes of tracehooks etc

This patch only changes how orig_r8 is organised and nothing should
change behaviourily.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Al Viro &lt;viro@ZenIV.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To avoid multiple syscall restarts (multiple signals) or no restart at
all (sigreturn), we need just an extra bit of state "literally 1 bit" in
struct pt_regs. orig_r8 is the best place to do this, however given the
way it is encoded currently, we can't add anything simplistically.

Current orig_r8:
* syscalls   -&gt; 1 to NR_SYSCALLS
* Exceptions -&gt; NR_SYSCALLS + 1
* Break-point-&gt; NR_SYSCALLS + 2

In new scheme it is a bit-field
* lower short word contains the  exact event type (and a new bit to represent
   restart semantics : if syscall was already / can't be restarted)
* upper short word optionally containing the syscall num - needed by
  likes of tracehooks etc

This patch only changes how orig_r8 is organised and nothing should
change behaviourily.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Al Viro &lt;viro@ZenIV.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: Signal handling</title>
<updated>2013-02-15T17:33:30+00:00</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c3581039b6c51a778a70accec53a9bb7ad9a4d32'/>
<id>c3581039b6c51a778a70accec53a9bb7ad9a4d32</id>
<content type='text'>
Includes following fixes courtesy review by Al-Viro

* Tracer poke to Callee-regs were lost

  Before going off into do_signal( ) we save the user-mode callee regs
  (as they are not saved by default as part of pt_regs). This is to make
  sure that that a Tracer (if tracing related signal) is able to do likes
  of PEEKUSR(callee-reg).

  However in return path we were simply discarding the user-mode callee
  regs, which would break a POKEUSR(callee-reg) from a tracer.

* Issue related to multiple syscall restarts are addressed in next patch

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Al Viro &lt;viro@ZenIV.linux.org.uk&gt;
Acked-by: Jonas Bonn &lt;jonas@southpole.se&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Includes following fixes courtesy review by Al-Viro

* Tracer poke to Callee-regs were lost

  Before going off into do_signal( ) we save the user-mode callee regs
  (as they are not saved by default as part of pt_regs). This is to make
  sure that that a Tracer (if tracing related signal) is able to do likes
  of PEEKUSR(callee-reg).

  However in return path we were simply discarding the user-mode callee
  regs, which would break a POKEUSR(callee-reg) from a tracer.

* Issue related to multiple syscall restarts are addressed in next patch

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Al Viro &lt;viro@ZenIV.linux.org.uk&gt;
Acked-by: Jonas Bonn &lt;jonas@southpole.se&gt;
</pre>
</div>
</content>
</entry>
</feed>
