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<title>linux.git/Documentation/kernel-parameters.txt, branch v2.6.17</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Doc/kernel-parameters.txt: slightly reword sentence about restrictions</title>
<updated>2006-03-31T23:44:30+00:00</updated>
<author>
<name>Stefan Richter</name>
<email>stefanr@s5r6.in-berlin.de</email>
</author>
<published>2006-03-31T23:44:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6585fa8aa58c7cd9f90f1c795a9dfc8db5f13906'/>
<id>6585fa8aa58c7cd9f90f1c795a9dfc8db5f13906</id>
<content type='text'>
The previous patch somewhat diverted the train of thought.
Here I am trying to bring the valued reader back on track.

Signed-off-by: Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
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<pre>
The previous patch somewhat diverted the train of thought.
Here I am trying to bring the valued reader back on track.

Signed-off-by: Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Doc/kernel-parameters.txt: mention modinfo and sysfs</title>
<updated>2006-03-31T23:43:18+00:00</updated>
<author>
<name>Stefan Richter</name>
<email>stefanr@s5r6.in-berlin.de</email>
</author>
<published>2006-03-31T23:43:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a901ebb907e6aca38dc43417d6ce30f23651ea64'/>
<id>a901ebb907e6aca38dc43417d6ce30f23651ea64</id>
<content type='text'>
Doc/kernel-parameters.txt: mention modinfo and sysfs

Signed-off-by: Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
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<pre>
Doc/kernel-parameters.txt: mention modinfo and sysfs

Signed-off-by: Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Doc/kernel-parameters.txt: delete false version information and history</title>
<updated>2006-03-31T23:42:29+00:00</updated>
<author>
<name>Stefan Richter</name>
<email>stefanr@s5r6.in-berlin.de</email>
</author>
<published>2006-03-31T23:42:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0ee9d71f02b19f87368ee99b73019bf9522c7bf8'/>
<id>0ee9d71f02b19f87368ee99b73019bf9522c7bf8</id>
<content type='text'>
Doc/kernel-parameters.txt: delete false version information and history

Signed-off-by: Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
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<pre>
Doc/kernel-parameters.txt: delete false version information and history

Signed-off-by: Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Documentation: Reorder documentation of nomca and nomce</title>
<updated>2006-03-31T23:36:09+00:00</updated>
<author>
<name>Horms</name>
<email>horms@verge.net.au</email>
</author>
<published>2006-03-31T23:36:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=abe37e5a13c4055bdf8ea1d2e781d757285e1908'/>
<id>abe37e5a13c4055bdf8ea1d2e781d757285e1908</id>
<content type='text'>
My patch to add brief documentation of the nomca boot parameter
added it out of alphabetical order.

Signed-Off-By: Horms &lt;horms@verge.net.au&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
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<pre>
My patch to add brief documentation of the nomca boot parameter
added it out of alphabetical order.

Signed-Off-By: Horms &lt;horms@verge.net.au&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] doc: more serial-console info</title>
<updated>2006-03-25T16:23:00+00:00</updated>
<author>
<name>Randy Dunlap</name>
<email>rdunlap@xenotime.net</email>
</author>
<published>2006-03-25T11:08:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f1a1c2dc2a956c375b432d2a9a28e52ba9d81c7c'/>
<id>f1a1c2dc2a956c375b432d2a9a28e52ba9d81c7c</id>
<content type='text'>
Add info on flow control for serial consoles.  Refer to netconsole option
also.

Signed-off-by: Randy Dunlap &lt;rdunlap@xenotime.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<pre>
Add info on flow control for serial consoles.  Refer to netconsole option
also.

Signed-off-by: Randy Dunlap &lt;rdunlap@xenotime.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI: Provide a boot parameter to disable MSI</title>
<updated>2006-03-23T22:35:16+00:00</updated>
<author>
<name>Matthew Wilcox</name>
<email>matthew@wil.cx</email>
</author>
<published>2006-03-06T05:33:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=309e57df7b766172ba137a8cbd909f88dd76e8e9'/>
<id>309e57df7b766172ba137a8cbd909f88dd76e8e9</id>
<content type='text'>
Several drivers are starting to grow options to disable MSI.  However,
it's often a host chipset issue, not something which individual drivers
should handle.  So we add the pci=nomsi kernel parameter to allow the user
to disable MSI modes for systems we haven't added to the quirk list yet.

Signed-off-by: Matthew Wilcox &lt;matthew@wil.cx&gt;
Signed-off-by: Randy Dunlap &lt;rdunlap@xenotime.net&gt;
Acked-by: Jeff Garzik &lt;jeff@garzik.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
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<pre>
Several drivers are starting to grow options to disable MSI.  However,
it's often a host chipset issue, not something which individual drivers
should handle.  So we add the pci=nomsi kernel parameter to allow the user
to disable MSI modes for systems we haven't added to the quirk list yet.

Signed-off-by: Matthew Wilcox &lt;matthew@wil.cx&gt;
Signed-off-by: Randy Dunlap &lt;rdunlap@xenotime.net&gt;
Acked-by: Jeff Garzik &lt;jeff@garzik.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] pause_on_oops command line option</title>
<updated>2006-03-23T15:38:16+00:00</updated>
<author>
<name>Andrew Morton</name>
<email>akpm@osdl.org</email>
</author>
<published>2006-03-23T11:00:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dd287796d608fcdc3fe5e8fdb5bf762a8f1bc32a'/>
<id>dd287796d608fcdc3fe5e8fdb5bf762a8f1bc32a</id>
<content type='text'>
Attempt to fix the problem wherein people's oops reports scroll off the screen
due to repeated oopsing or to oopses on other CPUs.

If this happens the user can reboot with the `pause_on_oops=&lt;seconds&gt;' option.
It will allow the first oopsing CPU to print an oops record just a single
time.  Second oopsing attempts, or oopses on other CPUs will cause those CPUs
to enter a tight loop until the specified number of seconds have elapsed.

The patch implements the infrastructure generically in the expectation that
architectures other than x86 will find it useful.

Cc: Dave Jones &lt;davej@codemonkey.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<pre>
Attempt to fix the problem wherein people's oops reports scroll off the screen
due to repeated oopsing or to oopses on other CPUs.

If this happens the user can reboot with the `pause_on_oops=&lt;seconds&gt;' option.
It will allow the first oopsing CPU to print an oops record just a single
time.  Second oopsing attempts, or oopses on other CPUs will cause those CPUs
to enter a tight loop until the specified number of seconds have elapsed.

The patch implements the infrastructure generically in the expectation that
architectures other than x86 will find it useful.

Cc: Dave Jones &lt;davej@codemonkey.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] i386: allow disabling X86_FEATURE_SEP at boot</title>
<updated>2006-03-23T15:38:04+00:00</updated>
<author>
<name>Chuck Ebbert</name>
<email>76306.1226@compuserve.com</email>
</author>
<published>2006-03-23T10:59:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4f88651125e2ca8b106b6f65b65ea45776517bf3'/>
<id>4f88651125e2ca8b106b6f65b65ea45776517bf3</id>
<content type='text'>
Allow the x86 "sep" feature to be disabled at bootup.  This forces use of the
int80 vsyscall.  Mainly for testing or benchmarking the int80 vsyscall code.

Signed-off-by: Chuck Ebbert &lt;76306.1226@compuserve.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<pre>
Allow the x86 "sep" feature to be disabled at bootup.  This forces use of the
int80 vsyscall.  Mainly for testing or benchmarking the int80 vsyscall code.

Signed-off-by: Chuck Ebbert &lt;76306.1226@compuserve.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] i386: port ATI timer fix from x86_64 to i386 II</title>
<updated>2006-03-09T02:10:31+00:00</updated>
<author>
<name>Andi Kleen</name>
<email>ak@suse.de</email>
</author>
<published>2006-03-09T01:57:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f9262c12c0084ddba445a9a42e98994018e51400'/>
<id>f9262c12c0084ddba445a9a42e98994018e51400</id>
<content type='text'>
ATI chipsets tend to generate double timer interrupts for the local APIC
timer when both the 8254 and the IO-APIC timer pins are enabled.  This is
because they route it to both and the result is anded together and the CPU
ends up processing it twice.

This patch changes check_timer to disable the 8254 routing for interrupt 0.

I think it would be safe on all chipsets actually (i tested it on a couple
and it worked everywhere) and Windows seems to do it in a similar way, but
to be conservative this patch only enables this mode on ATI (and adds
options to enable/disable too)

Ported over from a similar x86-64 change.

I reused the ACPI earlyquirk infrastructure for the ATI bridge check, but
tweaked it a bit to work even without ACPI.

Inspired by a patch from Chuck Ebbert, but redone.

Cc: Chuck Ebbert &lt;76306.1226@compuserve.com&gt;
Cc: "Brown, Len" &lt;len.brown@intel.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<pre>
ATI chipsets tend to generate double timer interrupts for the local APIC
timer when both the 8254 and the IO-APIC timer pins are enabled.  This is
because they route it to both and the result is anded together and the CPU
ends up processing it twice.

This patch changes check_timer to disable the 8254 routing for interrupt 0.

I think it would be safe on all chipsets actually (i tested it on a couple
and it worked everywhere) and Windows seems to do it in a similar way, but
to be conservative this patch only enables this mode on ATI (and adds
options to enable/disable too)

Ported over from a similar x86-64 change.

I reused the ACPI earlyquirk infrastructure for the ATI bridge check, but
tweaked it a bit to work even without ACPI.

Inspired by a patch from Chuck Ebbert, but redone.

Cc: Chuck Ebbert &lt;76306.1226@compuserve.com&gt;
Cc: "Brown, Len" &lt;len.brown@intel.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] rcu batch tuning</title>
<updated>2006-03-08T22:14:01+00:00</updated>
<author>
<name>Dipankar Sarma</name>
<email>dipankar@in.ibm.com</email>
</author>
<published>2006-03-08T05:55:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=21a1ea9eb40411d4ee29448c53b9e4c0654d6ceb'/>
<id>21a1ea9eb40411d4ee29448c53b9e4c0654d6ceb</id>
<content type='text'>
This patch adds new tunables for RCU queue and finished batches.  There are
two types of controls - number of completed RCU updates invoked in a batch
(blimit) and monitoring for high rate of incoming RCUs on a cpu (qhimark,
qlowmark).

By default, the per-cpu batch limit is set to a small value.  If the input
RCU rate exceeds the high watermark, we do two things - force quiescent
state on all cpus and set the batch limit of the CPU to INTMAX.  Setting
batch limit to INTMAX forces all finished RCUs to be processed in one shot.
 If we have more than INTMAX RCUs queued up, then we have bigger problems
anyway.  Once the incoming queued RCUs fall below the low watermark, the
batch limit is set to the default.

Signed-off-by: Dipankar Sarma &lt;dipankar@in.ibm.com&gt;
Cc: "Paul E. McKenney" &lt;paulmck@us.ibm.com&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds new tunables for RCU queue and finished batches.  There are
two types of controls - number of completed RCU updates invoked in a batch
(blimit) and monitoring for high rate of incoming RCUs on a cpu (qhimark,
qlowmark).

By default, the per-cpu batch limit is set to a small value.  If the input
RCU rate exceeds the high watermark, we do two things - force quiescent
state on all cpus and set the batch limit of the CPU to INTMAX.  Setting
batch limit to INTMAX forces all finished RCUs to be processed in one shot.
 If we have more than INTMAX RCUs queued up, then we have bigger problems
anyway.  Once the incoming queued RCUs fall below the low watermark, the
batch limit is set to the default.

Signed-off-by: Dipankar Sarma &lt;dipankar@in.ibm.com&gt;
Cc: "Paul E. McKenney" &lt;paulmck@us.ibm.com&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
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</content>
</entry>
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