<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/Documentation/devicetree/bindings/spi, branch v4.2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>DEVICETREE: Misc fix for the AR7100 SPI controller binding</title>
<updated>2015-07-27T13:24:39+00:00</updated>
<author>
<name>Alban Bedel</name>
<email>albeu@free.fr</email>
</author>
<published>2015-07-03T08:14:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3b6e644e6540405fd3582e0a90412fccbddd0e45'/>
<id>3b6e644e6540405fd3582e0a90412fccbddd0e45</id>
<content type='text'>
Fix the clocks property documentation and use lower case for
hex values in the example.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix the clocks property documentation and use lower case for
hex values in the example.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-06-26T18:43:59+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-26T18:43:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3d9f96d850e4bbfae24dc9aee03033dd77c81596'/>
<id>3d9f96d850e4bbfae24dc9aee03033dd77c81596</id>
<content type='text'>
Pull ARM SoC DT updates from Kevin Hilman:
 "As usual, quite a few device-tree updates in ARM land.  There was one
  minor churn in DTs due to relicensing under a dual-license, and lots
  of little additions of new peripherals, features etc, but nothing
  really exciting to call to your attention.  Some higlights, focsuing
  on support for new SoCs and boards:

   - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
   - tegra: HDA support
   - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
     RT-AC87U
   - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
     boards, DLink DNS-327L
   - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
     SL50
   - ARM: added support for Juno r1 board
   - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
     Mele A1000G
   - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
     Gateworks GW5510, and aristainetos2 boards
   - hisilicon: hi6220 SoC support; new boards: 96boards hikey"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
  ARM: hisi: revert changes from hisi/hip04-dt branch
  ARM: nomadik: set proper compatible for accelerometer
  ARM64: juno: add GPIO keys
  ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
  ARM: dts: Introduce STM32F429 MCU
  ARM: socfpga: dts: enable ethernet for Arria10 devkit
  ARM: dts: k2l: fix the netcp range size
  ARM: dts: k2e: fix the netcp range size
  ARM: dts: k2hk: fix the netcp range size
  ARM: dts: k2l-evm: Add device bindings for netcp driver
  ARM: dts: k2e-evm: Add device bindings for netcp driver
  ARM: dts: k2hk-evm: Add device bindings for netcp driver
  ARM: BCM5301X: Add DT for Asus RT-AC87U
  ARM: BCM5301X: add IRQ numbers for PCIe controller
  ARM: BCM5301X: add NAND flash chip description
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
  ARM: at91/dt: sama5d4ek: mci0 uses slot 0
  ARM: at91/dt: kizbox: fix mismatch LED PWM device
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC DT updates from Kevin Hilman:
 "As usual, quite a few device-tree updates in ARM land.  There was one
  minor churn in DTs due to relicensing under a dual-license, and lots
  of little additions of new peripherals, features etc, but nothing
  really exciting to call to your attention.  Some higlights, focsuing
  on support for new SoCs and boards:

   - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
   - tegra: HDA support
   - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
     RT-AC87U
   - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
     boards, DLink DNS-327L
   - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
     SL50
   - ARM: added support for Juno r1 board
   - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
     Mele A1000G
   - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
     Gateworks GW5510, and aristainetos2 boards
   - hisilicon: hi6220 SoC support; new boards: 96boards hikey"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
  ARM: hisi: revert changes from hisi/hip04-dt branch
  ARM: nomadik: set proper compatible for accelerometer
  ARM64: juno: add GPIO keys
  ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
  ARM: dts: Introduce STM32F429 MCU
  ARM: socfpga: dts: enable ethernet for Arria10 devkit
  ARM: dts: k2l: fix the netcp range size
  ARM: dts: k2e: fix the netcp range size
  ARM: dts: k2hk: fix the netcp range size
  ARM: dts: k2l-evm: Add device bindings for netcp driver
  ARM: dts: k2e-evm: Add device bindings for netcp driver
  ARM: dts: k2hk-evm: Add device bindings for netcp driver
  ARM: BCM5301X: Add DT for Asus RT-AC87U
  ARM: BCM5301X: add IRQ numbers for PCIe controller
  ARM: BCM5301X: add NAND flash chip description
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
  ARM: at91/dt: sama5d4ek: mci0 uses slot 0
  ARM: at91/dt: kizbox: fix mismatch LED PWM device
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote-tracking branches 'spi/topic/sirf', 'spi/topic/spidev' and 'spi/topic/zynq' into spi-next</title>
<updated>2015-06-17T23:19:56+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2015-06-17T23:19:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fda052b0a52261ecad8c8beb6bcfa1663a35975f'/>
<id>fda052b0a52261ecad8c8beb6bcfa1663a35975f</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote-tracking branches 'spi/topic/fsl-dspi', 'spi/topic/gpio', 'spi/topic/imx' and 'spi/topic/orion' into spi-next</title>
<updated>2015-06-17T23:19:51+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2015-06-17T23:19:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b6e6dc80341028103e090190f209ef3866255230'/>
<id>b6e6dc80341028103e090190f209ef3866255230</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote-tracking branches 'spi/topic/ath79', 'spi/topic/atmel' and 'spi/topic/davinci' into spi-next</title>
<updated>2015-06-17T23:19:50+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2015-06-17T23:19:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9a8d141d5ab1b50b3ab453fba1ee42da3b85919b'/>
<id>9a8d141d5ab1b50b3ab453fba1ee42da3b85919b</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: atmel: update DT bindings documentation</title>
<updated>2015-06-16T12:08:18+00:00</updated>
<author>
<name>Cyrille Pitchen</name>
<email>cyrille.pitchen@atmel.com</email>
</author>
<published>2015-06-16T10:09:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2c01a3d6b3cf0aaf39b55318fd986b1bd0b98168'/>
<id>2c01a3d6b3cf0aaf39b55318fd986b1bd0b98168</id>
<content type='text'>
- add new property "atmel,fifo-size"
- change "cs-gpios" to optional for SPI controller version &gt;= 2.

Please be aware that the VERSION register can not be used to guess the
size of FIFOs. Indeed, for a given hardware version, the SPI controller
can be integrated on Atmel SoCs with different FIFO sizes. Also the
"atmel,fifo-size" property is optional as older SPI controllers don't
embed FIFO at all.

Besides, the FIFO size can not be read or guessed from other registers:
When designing the FIFO feature, no dedicated registers were added to
store this size. Unused spaces in the I/O register range are limited and
better reserved for future usages. Instead, the FIFO size of each
peripheral is documented in the programmer datasheet.

Finally, on a given SoC, there can be several instances of the SPI
controller with different FIFO sizes. This explain why we'd rather use a
dedicated DT property than use the "compatible" property.

For instance, sama5d2x SoCs come with some SPI controllers, the ones
inside Flexcoms, integrating 32 data FIFOs whereas other SPI controllers
use 16 data FIFOs. All these SPI controllers share the same IP version.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- add new property "atmel,fifo-size"
- change "cs-gpios" to optional for SPI controller version &gt;= 2.

Please be aware that the VERSION register can not be used to guess the
size of FIFOs. Indeed, for a given hardware version, the SPI controller
can be integrated on Atmel SoCs with different FIFO sizes. Also the
"atmel,fifo-size" property is optional as older SPI controllers don't
embed FIFO at all.

Besides, the FIFO size can not be read or guessed from other registers:
When designing the FIFO feature, no dedicated registers were added to
store this size. Unused spaces in the I/O register range are limited and
better reserved for future usages. Instead, the FIFO size of each
peripheral is documented in the programmer datasheet.

Finally, on a given SoC, there can be several instances of the SPI
controller with different FIFO sizes. This explain why we'd rather use a
dedicated DT property than use the "compatible" property.

For instance, sama5d2x SoCs come with some SPI controllers, the ones
inside Flexcoms, integrating 32 data FIFOs whereas other SPI controllers
use 16 data FIFOs. All these SPI controllers share the same IP version.

Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: spi-fsl-dspi: Update DT binding documentation</title>
<updated>2015-06-15T13:20:39+00:00</updated>
<author>
<name>Haikun Wang</name>
<email>haikun.wang@freescale.com</email>
</author>
<published>2015-06-15T11:49:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=812d6f6345d88632c11aeb602ef26f4616dabfa0'/>
<id>812d6f6345d88632c11aeb602ef26f4616dabfa0</id>
<content type='text'>
DSPI driver has been updated and support more compatible strings.
This patch update the DT binding documentation.

Signed-off-by: Haikun Wang &lt;haikun.wang@freescale.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DSPI driver has been updated and support more compatible strings.
This patch update the DT binding documentation.

Signed-off-by: Haikun Wang &lt;haikun.wang@freescale.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: zynq: Add DT bindings documentation for Zynq Ultrascale+ MPSoC GQSPI controller</title>
<updated>2015-06-12T17:33:15+00:00</updated>
<author>
<name>Ranjit Waghmode</name>
<email>ranjit.waghmode@xilinx.com</email>
</author>
<published>2015-06-10T10:38:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fe8e48ad3c620093b2c9064259558bdcba9a76fa'/>
<id>fe8e48ad3c620093b2c9064259558bdcba9a76fa</id>
<content type='text'>
Add bindings documentation for GQSPI controller driver used by
Zynq Ultrascale+ MPSoC

Signed-off-by: Ranjit Waghmode &lt;ranjit.waghmode@xilinx.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add bindings documentation for GQSPI controller driver used by
Zynq Ultrascale+ MPSoC

Signed-off-by: Ranjit Waghmode &lt;ranjit.waghmode@xilinx.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: orion: Fix extended baud rates for each Armada SoCs</title>
<updated>2015-05-27T17:44:57+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2015-05-26T09:44:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4dacccfac69494ba70248b134352f299171c41b7'/>
<id>4dacccfac69494ba70248b134352f299171c41b7</id>
<content type='text'>
The commit df59fa7f4bca "spi: orion: support armada extended baud
rates" made the assumptions that all the Armada SoCs supported the
same maximum frequency. However, according the hardware datasheet, the
maximum frequency supported by the Armada 370 SoC is tclk/4, for the
Armada XP, Armada 38x and Armada 39x SoCs the limitation is 50MHz and
for the Armada 375 it is tclk/15.

This patch introduces new compatible strings to handle all these
case. In order to be future proof a compatible was created for each
SoC even if currently some SoCs seem using the same IP.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The commit df59fa7f4bca "spi: orion: support armada extended baud
rates" made the assumptions that all the Armada SoCs supported the
same maximum frequency. However, according the hardware datasheet, the
maximum frequency supported by the Armada 370 SoC is tclk/4, for the
Armada XP, Armada 38x and Armada 39x SoCs the limitation is 50MHz and
for the Armada 375 it is tclk/15.

This patch introduces new compatible strings to handle all these
case. In order to be future proof a compatible was created for each
SoC even if currently some SoCs seem using the same IP.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: sirf: add support for USP-based SPI</title>
<updated>2015-05-20T18:05:40+00:00</updated>
<author>
<name>Qipan Li</name>
<email>Qipan.Li@csr.com</email>
</author>
<published>2015-05-19T14:41:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e3fb57c83239c84ca06ed5b06eb224db3e48d17e'/>
<id>e3fb57c83239c84ca06ed5b06eb224db3e48d17e</id>
<content type='text'>
USP is a general purpose serial port in SiRFSoC, which can work as SPI.
the most data flow of USP and pure SPI is same with main differences
in registers layout.
this patch moves registers layout to private data, and use flags to
differentiate other minor differences between prima2-spi, prima2-usp
and atlas7-usp for hardware configuration.

Signed-off-by: Qipan Li &lt;Qipan.Li@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
USP is a general purpose serial port in SiRFSoC, which can work as SPI.
the most data flow of USP and pure SPI is same with main differences
in registers layout.
this patch moves registers layout to private data, and use flags to
differentiate other minor differences between prima2-spi, prima2-usp
and atlas7-usp for hardware configuration.

Signed-off-by: Qipan Li &lt;Qipan.Li@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
