linux.git/Documentation/devicetree/bindings/serial, branch v6.8 Linux kernel source tree Merge tag 'tty-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 2024-01-18T19:37:24+00:00 Linus Torvalds torvalds@linux-foundation.org 2024-01-18T19:37:24+00:00 bd736f38c014ba70ba7ec3bdc6af6fe5368d6612 Pull tty / serial updates from Greg KH: "Here is the big set of tty and serial driver changes for 6.8-rc1. As usual, Jiri has a bunch of refactoring and cleanups for the tty core and drivers in here, along with the usual set of rs485 updates (someday this might work properly...) Along with those, in here are changes for: - sc16is7xx serial driver updates - platform driver removal api updates - amba-pl011 driver updates - tty driver binding updates - other small tty/serial driver updates and changes All of these have been in linux-next for a while with no reported issues" * tag 'tty-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (197 commits) serial: sc16is7xx: refactor EFR lock serial: sc16is7xx: reorder code to remove prototype declarations serial: sc16is7xx: refactor FIFO access functions to increase commonality serial: sc16is7xx: drop unneeded MODULE_ALIAS serial: sc16is7xx: replace hardcoded divisor value with BIT() macro serial: sc16is7xx: add explicit return for some switch default cases serial: sc16is7xx: add macro for max number of UART ports serial: sc16is7xx: add driver name to struct uart_driver serial: sc16is7xx: use i2c_get_match_data() serial: sc16is7xx: use spi_get_device_match_data() serial: sc16is7xx: use DECLARE_BITMAP for sc16is7xx_lines bitfield serial: sc16is7xx: improve do/while loop in sc16is7xx_irq() serial: sc16is7xx: remove obsolete loop in sc16is7xx_port_irq() serial: sc16is7xx: set safe default SPI clock frequency serial: sc16is7xx: add check for unsupported SPI modes during probe serial: sc16is7xx: fix invalid sc16is7xx_lines bitfield in case of probe error serial: 8250_exar: Set missing rs485_supported flag serial: omap: do not override settings for RS485 support serial: core, imx: do not set RS485 enabled if it is not supported serial: core: make sure RS485 cannot be enabled when it is not supported ... 
Pull tty / serial updates from Greg KH:
 "Here is the big set of tty and serial driver changes for 6.8-rc1.

  As usual, Jiri has a bunch of refactoring and cleanups for the tty
  core and drivers in here, along with the usual set of rs485 updates
  (someday this might work properly...)

  Along with those, in here are changes for:

   - sc16is7xx serial driver updates

   - platform driver removal api updates

   - amba-pl011 driver updates

   - tty driver binding updates

   - other small tty/serial driver updates and changes

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'tty-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (197 commits)
  serial: sc16is7xx: refactor EFR lock
  serial: sc16is7xx: reorder code to remove prototype declarations
  serial: sc16is7xx: refactor FIFO access functions to increase commonality
  serial: sc16is7xx: drop unneeded MODULE_ALIAS
  serial: sc16is7xx: replace hardcoded divisor value with BIT() macro
  serial: sc16is7xx: add explicit return for some switch default cases
  serial: sc16is7xx: add macro for max number of UART ports
  serial: sc16is7xx: add driver name to struct uart_driver
  serial: sc16is7xx: use i2c_get_match_data()
  serial: sc16is7xx: use spi_get_device_match_data()
  serial: sc16is7xx: use DECLARE_BITMAP for sc16is7xx_lines bitfield
  serial: sc16is7xx: improve do/while loop in sc16is7xx_irq()
  serial: sc16is7xx: remove obsolete loop in sc16is7xx_port_irq()
  serial: sc16is7xx: set safe default SPI clock frequency
  serial: sc16is7xx: add check for unsupported SPI modes during probe
  serial: sc16is7xx: fix invalid sc16is7xx_lines bitfield in case of probe error
  serial: 8250_exar: Set missing rs485_supported flag
  serial: omap: do not override settings for RS485 support
  serial: core, imx: do not set RS485 enabled if it is not supported
  serial: core: make sure RS485 cannot be enabled when it is not supported
  ...
dt-bindings: serial: Describe ARM dcc interface 2024-01-04T15:23:20+00:00 Michal Simek michal.simek@amd.com 2023-12-21T14:05:09+00:00 da680c045fde3c441bb0df5780f4ffc68327797d Debug Communication Channel (DCC) provides the way how to pass data between target CPU and host via JTAG interface. Every CPU has own interface for communication via dbgdtrtx_el0 and dbgdtrrx_el0 registers. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/9d7e85914eb1cdb313b28cb019093a84dd9b4773.1703167505.git.michal.simek@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Debug Communication Channel (DCC) provides the way how to pass data between
target CPU and host via JTAG interface. Every CPU has own interface for
communication via dbgdtrtx_el0 and dbgdtrrx_el0 registers.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/9d7e85914eb1cdb313b28cb019093a84dd9b4773.1703167505.git.michal.simek@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: Add a new compatible string for UMS9620 2023-12-15T13:23:16+00:00 Chunyan Zhang chunyan.zhang@unisoc.com 2023-12-15T08:56:29+00:00 d54cbe1db72dbfc664bc21b40c324a624faacb16 The UMS9620 also uses the same serial device with SC9836. Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20231215085630.984892-4-chunyan.zhang@unisoc.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
The UMS9620 also uses the same serial device with SC9836.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lore.kernel.org/r/20231215085630.984892-4-chunyan.zhang@unisoc.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: imx: Properly describe the i.MX1 interrupts 2023-12-15T13:19:56+00:00 Fabio Estevam festevam@denx.de 2023-12-06T16:28:41+00:00 9df1dd450689dccc19fa471b91c71fc977dab946 i.MX1 has three UART interrupts instead of a single one like other i.MX devices. Take this into account for properly describing the i.MX1 UART interrupts. This fixes the following dt-schema warning: from schema $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#yaml# imx1-ads.dtb: serial@206000: interrupts: [[30], [29], [26]] is too long Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231206162841.2326201-1-festevam@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
i.MX1 has three UART interrupts instead of a single one like other
i.MX devices.

Take this into account for properly describing the i.MX1 UART
interrupts.

This fixes the following dt-schema warning:

	from schema $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#yaml#

imx1-ads.dtb: serial@206000: interrupts: [[30], [29], [26]] is too long
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231206162841.2326201-1-festevam@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property 2023-12-12T19:22:42+00:00 Peter Griffin peter.griffin@linaro.org 2023-12-11T16:23:19+00:00 2072496129b7d7448f969b6334b4fd2e876a642d Specifying samsung,uart-fifosize in both DT and driver static data is error prone and relies on driver probe order and dt aliases to be correct. Additionally on many Exynos platforms these are (USI) universal serial interfaces which can be uart, spi or i2c, so it can change per board. For google,gs101-uart make samsung,uart-fifosize a required property. For this platform fifosize now *only* comes from DT. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20231211162331.435900-5-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
Specifying samsung,uart-fifosize in both DT and driver static data is error
prone and relies on driver probe order and dt aliases to be correct.

Additionally on many Exynos platforms these are (USI) universal serial
interfaces which can be uart, spi or i2c, so it can change per board.

For google,gs101-uart make samsung,uart-fifosize a required property.
For this platform fifosize now *only* comes from DT.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20231211162331.435900-5-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
dt-bindings: serial: samsung: Add google-gs101-uart compatible 2023-12-12T19:22:42+00:00 Peter Griffin peter.griffin@linaro.org 2023-12-11T16:23:18+00:00 bad3bc0a23b74e7b353978b6f58eed6c0f3b51a0 Add dedicated google-gs101-uart compatible to the dt-schema for representing uart of the Google Tensor gs101 SoC. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20231211162331.435900-4-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
Add dedicated google-gs101-uart compatible to the dt-schema for
representing uart of the Google Tensor gs101 SoC.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20231211162331.435900-4-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
dt-bindings: serial: qcom,msm-uartdm: Vote for shared resources 2023-12-08T11:02:37+00:00 Stephan Gerhold stephan.gerhold@kernkonzept.com 2023-11-28T09:43:32+00:00 692079bda7802fccbf82daeb93d47d3d92972bbf Document power-domains, operating-points-v2 and interconnects to allow making performance state votes for certain clock frequencies of the UART DM controller. The interconnect path to DRAM is needed when UART DM is used together with a DMA engine. Voting for these shared resources is necessary to guarantee performance with power management enabled. Otherwise these resources might run at minimal performance state which is not sufficient for certain UART baud rates. Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231128-serial-msm-dvfs-v1-1-4f290d20a4be@kernkonzept.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Document power-domains, operating-points-v2 and interconnects to allow
making performance state votes for certain clock frequencies of the UART
DM controller. The interconnect path to DRAM is needed when UART DM is
used together with a DMA engine.

Voting for these shared resources is necessary to guarantee performance
with power management enabled. Otherwise these resources might run at
minimal performance state which is not sufficient for certain UART
baud rates.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231128-serial-msm-dvfs-v1-1-4f290d20a4be@kernkonzept.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: snps-dw-apb-uart: include rs485 schema 2023-12-08T11:02:37+00:00 Heiko Stuebner heiko.stuebner@cherry.de 2023-12-01T14:05:42+00:00 b18fefd230e47f22d2ec014219bc053c5806afb9 The dw-apb-uart also can emulate rs485, so include the rs485 schema to allow validating rs485 properties. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231201140542.323564-1-heiko@sntech.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
The dw-apb-uart also can emulate rs485, so include the rs485
schema to allow validating rs485 properties.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231201140542.323564-1-heiko@sntech.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: samsung: add specific compatible for Tesla FSD 2023-12-07T13:31:50+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2023-12-05T09:22:26+00:00 921f4f1db7f5bf6798349db8a4382c032f144b98 Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231205092229.19135-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the
others it reuses several devices from older designs.  Historically we
kept the old (block's) compatible only.  This works fine and there is no
bug here, however guidelines expressed in
Documentation/devicetree/bindings/writing-bindings.rst state that:
1. Compatibles should be specific.
2. We should add new compatibles in case of bugs or features.

Add Tesla FSD compatible specific to be used with an existing fallback.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231205092229.19135-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
dt-bindings: serial: fsl-linflexuart: change the maintainer email address 2023-11-23T19:33:31+00:00 Chester Lin clin@suse.com 2023-11-15T23:57:32+00:00 abdea7209becf633d96a71ea3b99062ae7012229 I am leaving SUSE so the current email address <clin@suse.com> will be disabled soon. <chester62515@gmail.com> will be my new address for handling emails, patches and pull requests from upstream and communities. Cc: Chester Lin <chester62515@gmail.com> Cc: NXP S32 Linux Team <s32@nxp.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jirislaby@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Conor Dooley <conor+dt@kernel.org> Signed-off-by: Chester Lin <clin@suse.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231115235732.13633-1-clin@suse.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
I am leaving SUSE so the current email address <clin@suse.com> will be
disabled soon. <chester62515@gmail.com> will be my new address for handling
emails, patches and pull requests from upstream and communities.

Cc: Chester Lin <chester62515@gmail.com>
Cc: NXP S32 Linux Team <s32@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jirislaby@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Conor Dooley <conor+dt@kernel.org>
Signed-off-by: Chester Lin <clin@suse.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231115235732.13633-1-clin@suse.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>