Renesas RZ/N1D has this UART with and without DMA support. Currently,
only the binding with DMA support is described. Add the missing one
without DMA support which can fallback even more.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250318085353.18990-2-wsa+renesas@sang-engineering.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

The UART core on Rockchip's RK3562 is the same as the one already
included in generic dw-apb-uart. Extend the binding accordingly to allow

	compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart";

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250227111913.2344207-9-kever.yang@rock-chips.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Add compatible string "fsl,imx94-lpuart" for the i.MX94 chip, which is
backward compatible with i.MX8ULP. Set it to fall back to
"fsl,imx8ulp-lpuart".

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250306171052.244548-1-Frank.Li@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Document the compatible string for Exynos7870's UART driver. The
devicetree property samsung,uart-fifosize must be mandatory, as the
driver enquires about the FIFO sizes. This feature makes it compatible
with Exynos8895's UART.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250219-exynos7870-uart-v2-1-c8c67f3a936c@disroot.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

The Tegra UTC (UART Trace Controller) allows multiple clients within
the Tegra SoC to share a physical UART interface. It supports up to 16
clients. Each client operates as an independent UART endpoint with a
dedicated interrupt and 128-character TX/RX FIFOs.

Add device tree binding documentation for the Tegra UTC client.

Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250213125612.4705-2-kkartik@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

While testing on a Freescale MPC8314E board, I noticed that changing
the UART compatible string from ns16550 to ns16550a breaks the output,
suggesting that the FIFOs don't work correctly. To accommodate this
fact, move the definition of fsl,ns16550 to the section of 8250.yaml
that allows broken FIFOs.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250209-uartfifo-v1-1-501a510a5f07@posteo.net
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

This reverts commit ed333392bd201e71a010e588e61605a1e2dd07df.

It was part of a patch series that caused build errors in linux-next.

Cc: Benjamin Larsson <benjamin.larsson@genexis.eu>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Link: https://lore.kernel.org/r/20250206135328.4bad1401@canb.auug.org.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

AMD/Xilinx Versal device serial IP has its own power domain,
so add an optional property to describe it.

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250129095013.2145580-1-manikanta.guntupalli@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

The Airoha SoC family have a mostly 16550-compatible UART
and High-Speed UART hardware with the exception of custom
baud rate settings register.

Signed-off-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250119130105.2833517-2-benjamin.larsson@genexis.eu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

The UART IP version of the ums9632 SoC project has been upgraded.
UART controller registers have added valid bits to support new features.
In order to distinguish different UART IP versions, we use sc9632-uart
to represent upgraded IP and sc9836-uart to represent old IP.

Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250122072352.3663653-1-Wenhua.Lin@unisoc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>