linux.git/Documentation/devicetree/bindings/serial, branch v6.11 Linux kernel source tree Merge tag 'tty-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 2024-07-19T22:22:14+00:00 Linus Torvalds torvalds@linux-foundation.org 2024-07-19T22:22:14+00:00 aba9753c0677e860f982edff98c7fe5a2b97758c Pull tty / serial updates from Greg KH: "Here is a small set of tty and serial driver updates for 6.11-rc1. Not much happened this cycle, unlike the previous kernel release which had lots of "excitement" in this part of the kernel. Included in here are the following changes: - dt binding updates for new platforms - 8250 driver updates - various small serial driver fixes and updates - printk/console naming and matching attempt #2 (was reverted for 6.10-final, should be good to go this time around, acked by the relevant maintainers). All of these have been in linux-next for a while with no reported issues" * tag 'tty-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (22 commits) Documentation: kernel-parameters: Add DEVNAME:0.0 format for serial ports serial: core: Add serial_base_match_and_update_preferred_console() printk: Add match_devname_and_update_preferred_console() serial: sc16is7xx: hardware reset chip if reset-gpios is defined in DT dt-bindings: serial: sc16is7xx: add reset-gpios dt-bindings: serial: vt8500-uart: convert to json-schema serial: 8250_platform: Explicitly show we initialise ISA ports only once tty: add missing MODULE_DESCRIPTION() macros dt-bindings: serial: mediatek,uart: add MT7988 serial: sh-sci: Add support for RZ/V2H(P) SoC dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as required dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-names' dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible for uarts serial: 8250_dw: Use reset array API to get resets dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC serial: 8250: Extract platform driver serial: 8250: Extract RSA bits serial: imx: stop casting struct uart_port to struct imx_port ... 
Pull tty / serial updates from Greg KH:
 "Here is a small set of tty and serial driver updates for 6.11-rc1. Not
  much happened this cycle, unlike the previous kernel release which had
  lots of "excitement" in this part of the kernel. Included in here are
  the following changes:

   - dt binding updates for new platforms

   - 8250 driver updates

   - various small serial driver fixes and updates

   - printk/console naming and matching attempt #2 (was reverted for
     6.10-final, should be good to go this time around, acked by the
     relevant maintainers).

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'tty-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (22 commits)
  Documentation: kernel-parameters: Add DEVNAME:0.0 format for serial ports
  serial: core: Add serial_base_match_and_update_preferred_console()
  printk: Add match_devname_and_update_preferred_console()
  serial: sc16is7xx: hardware reset chip if reset-gpios is defined in DT
  dt-bindings: serial: sc16is7xx: add reset-gpios
  dt-bindings: serial: vt8500-uart: convert to json-schema
  serial: 8250_platform: Explicitly show we initialise ISA ports only once
  tty: add missing MODULE_DESCRIPTION() macros
  dt-bindings: serial: mediatek,uart: add MT7988
  serial: sh-sci: Add support for RZ/V2H(P) SoC
  dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support
  dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as required
  dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-names'
  dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
  riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible for uarts
  serial: 8250_dw: Use reset array API to get resets
  dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC
  serial: 8250: Extract platform driver
  serial: 8250: Extract RSA bits
  serial: imx: stop casting struct uart_port to struct imx_port
  ...
dt-bindings: serial: sc16is7xx: add reset-gpios 2024-06-24T14:10:36+00:00 Hui Wang hui.wang@canonical.com 2024-06-18T11:26:19+00:00 a9411ef13f8fada29775fd21a3dfab7dcc49216a In some designs, the chip reset pin is connected to a GPIO, and this GPIO needs to be set correctly before probing the driver, so add a reset-gpios in the device tree. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Lech Perczak <lech.perczak@camlingroup.com> Tested-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Reviewed-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Hui Wang <hui.wang@canonical.com> Link: https://lore.kernel.org/r/20240618112620.152848-1-hui.wang@canonical.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
In some designs, the chip reset pin is connected to a GPIO, and this
GPIO needs to be set correctly before probing the driver, so add a
reset-gpios in the device tree.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lech Perczak <lech.perczak@camlingroup.com>
Tested-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Signed-off-by: Hui Wang <hui.wang@canonical.com>
Link: https://lore.kernel.org/r/20240618112620.152848-1-hui.wang@canonical.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: vt8500-uart: convert to json-schema 2024-06-24T14:10:22+00:00 Kanak Shilledar kanakshilledar@gmail.com 2024-06-12T15:38:43+00:00 418af7eeb4e187ce6049dc6c611cbc299cc8ec77 Convert the VIA VT8500 and WonderMedia WM8xxx UART Controller to newer DT schema. Created DT schema based on the .txt file which had `compatible`, `reg`, `interrupts` and `clocks` as required properties. Additions to the original binding - changed the file name from vt8500-uart to via,vt8500-uart.yaml - removed unnecessary alias from the example. Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com> Acked-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240612153847.52647-2-kanakshilledar@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Convert the VIA VT8500 and WonderMedia WM8xxx UART Controller to
newer DT schema. Created DT schema based on the .txt file which had
`compatible`, `reg`, `interrupts` and `clocks` as required properties.

Additions to the original binding
- changed the file name from vt8500-uart to via,vt8500-uart.yaml
- removed unnecessary alias from the example.

Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
Acked-by: Alexey Charkov <alchark@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240612153847.52647-2-kanakshilledar@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: mediatek,uart: add MT7988 2024-06-24T14:09:46+00:00 Rafał Miłecki rafal@milecki.pl 2024-06-05T08:54:32+00:00 638bf322452265fceec63448fb880c703df887e4 Add compatible string for serial on MT7988 SoC. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240605085433.26513-1-zajec5@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Add compatible string for serial on MT7988 SoC.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240605085433.26513-1-zajec5@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support 2024-06-24T14:09:37+00:00 Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com 2024-06-04T17:05:12+00:00 964a80cfbf56f5fa88f09d704c311ed6db0a361f Document support for the Serial Communication Interface with FIFO (SCIF) available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L (R9A07G044) SoC, with the following differences: - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready and two for Rx and Tx buffer full, all of which are edge-triggered. - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both synchronous and asynchronous modes. - There are differences in the configuration of certain registers such as SCSMR, SCFCR, and SCSPTR between the two SoCs. To handle these differences in the driver, a new SoC-specific compatible string is added, ensuring proper handling of the unique features and register configurations of the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240604170513.522631-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Document support for the Serial Communication Interface with FIFO (SCIF)
available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
(R9A07G044) SoC, with the following differences:

- RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
  and two for Rx and Tx buffer full, all of which are edge-triggered.
- RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
  synchronous and asynchronous modes.
- There are differences in the configuration of certain registers such
  as SCSMR, SCFCR, and SCSPTR between the two SoCs.

To handle these differences in the driver, a new SoC-specific compatible
string is added, ensuring proper handling of the unique features and
register configurations of the RZ/V2H(P) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240604170513.522631-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as required 2024-06-24T14:09:37+00:00 Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com 2024-06-04T17:05:11+00:00 034e4422ddb5ec9075d550f4668be0a3e85e6a3e As all the SoCs having multiple interrupts have 'interrupt-names' property in their respective DTSIs, make 'interrupt-names' property as required so that we can validate them using dtbs_check. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240604170513.522631-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
As all the SoCs having multiple interrupts have 'interrupt-names' property
in their respective DTSIs, make 'interrupt-names' property as required
so that we can validate them using dtbs_check.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240604170513.522631-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-names' 2024-06-24T14:09:36+00:00 Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com 2024-06-04T17:05:10+00:00 d057a1e3e475c6d9e24ce2e79c3f3daf367e33d8 This commit adds support to validate the 'interrupts' and 'interrupt-names' properties for every supported SoC. This ensures proper handling and configuration of interrupt-related properties across supported platforms. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240604170513.522631-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
This commit adds support to validate the 'interrupts' and 'interrupt-names'
properties for every supported SoC. This ensures proper handling and
configuration of interrupt-related properties across supported platforms.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240604170513.522631-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end 2024-06-24T14:09:36+00:00 Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com 2024-06-04T17:05:09+00:00 220fb8ff6d326d91fed8a0a44e3ac0a2f34d3f9c In preparation for adding more validation checks move the ref for 'serial.yaml' to the end and also move reset check in 'allOf' block. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240604170513.522631-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
In preparation for adding more validation checks move the ref for
'serial.yaml' to the end and also move reset check in 'allOf' block.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240604170513.522631-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC 2024-06-24T14:09:10+00:00 Hal Feng hal.feng@starfivetech.com 2024-06-04T08:47:27+00:00 ac434f2877b97e18c3df7d9b1e8e2371befd9890 The UART of StarFive JH7110 has two reset signals. Both of them are necessary for JH7110 to initialize UART. Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240604084729.57239-2-hal.feng@starfivetech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
The UART of StarFive JH7110 has two reset signals.
Both of them are necessary for JH7110 to initialize UART.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240604084729.57239-2-hal.feng@starfivetech.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
spi: dt-bindings: marvell,mmp2-ssp: Merge PXA SSP into schema 2024-05-27T00:33:37+00:00 Rob Herring (Arm) robh@kernel.org 2024-05-22T13:28:58+00:00 5bcbbaf0747cfe510814f40f36bbda49b851c956 The Marvell PXA SSP block is the same or similiar to the MMP2 variant. The only difference in the binding is the PXA version supports DMA (and that's probably a binding difference rather than an actual h/w difference). The old binding didn't belong under 'serial' as it is not a UART. The SSP block also supports audio devices, so 'spi' is not a perfect fit either. As the existing schema for MMP2 is there, just leave things as-is. The examples in the old text binding were pretty out of sync with reality. 'clock-names' and 'ssp-id' aren't documented nor used. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://msgid.link/r/20240522132859.3146335-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org> 
The Marvell PXA SSP block is the same or similiar to the MMP2 variant.
The only difference in the binding is the PXA version supports DMA (and
that's probably a binding difference rather than an actual h/w
difference).

The old binding didn't belong under 'serial' as it is not a UART. The
SSP block also supports audio devices, so 'spi' is not a perfect fit
either. As the existing schema for MMP2 is there, just leave things
as-is.

The examples in the old text binding were pretty out of sync with
reality. 'clock-names' and 'ssp-id' aren't documented nor used.

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://msgid.link/r/20240522132859.3146335-1-robh@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>