<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/Documentation/devicetree/bindings/reset, branch v6.9</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2024-03-19T18:57:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-03-19T18:57:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=78c3925c048c752334873f56c3a3d1c9d53e0416'/>
<id>78c3925c048c752334873f56c3a3d1c9d53e0416</id>
<content type='text'>
Pull more ARM SoC updates from Arnd Bergmann:
 "These are changes that for some reason ended up not making it into the
  first four branches but that should still make it into 6.9:

   - A rework of the omap clock support that touches both drivers and
     device tree files

   - The reset controller branch changes that had a dependency on late
     bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
     drivers branch

   - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
     changes that got delayed and needed some extra time in linux-next
     for wider testing"

* tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  soc: fsl: dpio: fix kcalloc() argument order
  bus: ts-nbus: Improve error reporting
  bus: ts-nbus: Convert to atomic pwm API
  riscv: dts: starfive: jh7110: Add camera subsystem nodes
  ARM: bcm: stop selecing CONFIG_TICK_ONESHOT
  ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
  ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
  clk: ti: Improve clksel clock bit parsing for reg property
  clk: ti: Handle possible address in the node name
  dt-bindings: pwm: opencores: Add compatible for StarFive JH8100
  dt-bindings: riscv: cpus: reg matches hart ID
  reset: Instantiate reset GPIO controller for shared reset-gpios
  reset: gpio: Add GPIO-based reset controller
  cpufreq: do not open-code of_phandle_args_equal()
  of: Add of_phandle_args_equal() helper
  reset: simple: add support for Sophgo SG2042
  dt-bindings: reset: sophgo: support SG2042
  riscv: dts: microchip: add specific compatible for mpfs pdma
  riscv: dts: microchip: add missing CAN bus clocks
  ARM: brcmstb: Add debug UART entry for 74165
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull more ARM SoC updates from Arnd Bergmann:
 "These are changes that for some reason ended up not making it into the
  first four branches but that should still make it into 6.9:

   - A rework of the omap clock support that touches both drivers and
     device tree files

   - The reset controller branch changes that had a dependency on late
     bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
     drivers branch

   - The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
     changes that got delayed and needed some extra time in linux-next
     for wider testing"

* tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  soc: fsl: dpio: fix kcalloc() argument order
  bus: ts-nbus: Improve error reporting
  bus: ts-nbus: Convert to atomic pwm API
  riscv: dts: starfive: jh7110: Add camera subsystem nodes
  ARM: bcm: stop selecing CONFIG_TICK_ONESHOT
  ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
  ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
  clk: ti: Improve clksel clock bit parsing for reg property
  clk: ti: Handle possible address in the node name
  dt-bindings: pwm: opencores: Add compatible for StarFive JH8100
  dt-bindings: riscv: cpus: reg matches hart ID
  reset: Instantiate reset GPIO controller for shared reset-gpios
  reset: gpio: Add GPIO-based reset controller
  cpufreq: do not open-code of_phandle_args_equal()
  of: Add of_phandle_args_equal() helper
  reset: simple: add support for Sophgo SG2042
  dt-bindings: reset: sophgo: support SG2042
  riscv: dts: microchip: add specific compatible for mpfs pdma
  riscv: dts: microchip: add missing CAN bus clocks
  ARM: brcmstb: Add debug UART entry for 74165
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2024-03-15T18:48:01+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-03-15T18:48:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6dff52b828655ccf416f46c08a48679740b724f0'/>
<id>6dff52b828655ccf416f46c08a48679740b724f0</id>
<content type='text'>
Pull clk updates from Stephen Boyd:
 "Not a ton of stuff happening in the clk framework. We got some more
  devm helpers and we seem to be going in the direction of "just turn
  this stuff on already and leave me alone!" with the addition of a
  devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that
  into a pmdomain that drivers attach instead, but this API should help
  drivers simplify in the meantime.

  Outside of the devm wrappers, we've got the usual clk driver updates
  that are dominated by the major phone SoC vendors (Samsung and
  Qualcomm) and the non-critical driver fixes for things like incorrect
  topology descriptions and wrong registers or bit fields. More details
  are below, but I'd say that it looks pretty ordinary. The only thing
  that really jumps out at me is the Renesas clk driver that's ignoring
  clks that are assigned to remote processors in DeviceTree. That's a
  new feature that they're using to avoid marking clks as
  CLK_IGNORE_UNUSED based on the configuration of the system.

  Core:
   - Increase dev_id len for clkdev lookups
   - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
     for a device
   - Add a devm variant of clk_rate_exclusive_get()

  New Drivers:
   - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1
     Elite SoC
   - Google GS101 PERIC0 and PERIC1 clock controllers
   - Exynos850 PDMA clocks
   - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock
     controllers

  Removed Drivers:
   - Remove the unused Qualcomm sc7180 modem clk driver

  Updates:
   - Fix some static checker errors in the Hisilicon clk driver
   - Polarfire MSSPLL hardware has 4 output clocks (the driver supported
     previously only one output); each of these 4 outputs feed dividers
     and the output of each divider feed individual hardware blocks
     (e.g. CAN, Crypto, eMMC); individual hardware block drivers need to
     control their clocks thus clock driver support was added for all
     MSSPLL output clocks
   - Typo fixes in the Qualcomm IPQ5018 GCC driver
   - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
   - Properly terminate frequency tables in different Qualcomm clk
     drivers
   - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
   - Add missing UFS CLKREF clks on Qualcomm SC8180X
   - Avoid significant delays during boot by adding a softdep on rpmhpd
     to Qualcomm SDM845 gcc driver
   - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC
     driver
   - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC
     driver
   - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk
     driver
   - Switch display, GPU, video, and camera Qualcomm clk drivers to
     module_platform_driver()
   - Set a longer delay for Venus resets on many Qualcomm SoCs
   - Correct the GDSC wait times in the Qualcomm SDM845 display clk
     driver
   - Fix clock listing Oops on Amlogic axg
   - New pll-rate for Rockchip rk3568
   - i2s rate improvements for Rockchip rk3399
   - Rockchip rk3588 syscon clock fixes and removal of overall
     clock-number from the rk3588 binding header
   - A prerequisite for later improvements to the Rockchip rk3588 linked
     clocks
   - Minor clean-ups and error handling improvements in both
     composite-8m and SCU i.MX clock drivers
   - Fix for SAI_MCLK_SEL definition for i.MX8MP
   - Register the Samsung CMU MISC clock controller earlier, so the
     Multi Core Timer clocksource can use it on Google GS101
   - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI
     will get proper clock rates
   - Refactor the generic Samsung CPU clock controllers code, preparing
     it for supporting Exynos850 CPU clocks
   - Fix some clk kerneldoc warnings
   - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on
     Renesas R-Car V4M
   - Ignore all clocks which are assigned to a non-Linux system in the
     Renesas clk driver
   - Add watchdog clock on Renesas RZ/G3S
   - Add camera (CRU) clock and reset on Renesas RZ/G2UL
   - Add support for the Renesas R-Car V4M (R8A779H0) SoC
   - Convert some clk bindings to YAML so they can be validated"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  clk: zynq: Prevent null pointer dereference caused by kmalloc failure
  clk: fractional-divider: Use bit operations consistently
  clk: fractional-divider: Move mask calculations out of lock
  clk: Fix clk_core_get NULL dereference
  clk: starfive: jh7110-vout: Convert to platform remove callback returning void
  clk: starfive: jh7110-isp: Convert to platform remove callback returning void
  clk: imx: imx8-acm: Convert to platform remove callback returning void
  clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
  clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
  clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
  clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
  clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
  clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
  clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
  clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
  clk: Add a devm variant of clk_rate_exclusive_get()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull clk updates from Stephen Boyd:
 "Not a ton of stuff happening in the clk framework. We got some more
  devm helpers and we seem to be going in the direction of "just turn
  this stuff on already and leave me alone!" with the addition of a
  devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that
  into a pmdomain that drivers attach instead, but this API should help
  drivers simplify in the meantime.

  Outside of the devm wrappers, we've got the usual clk driver updates
  that are dominated by the major phone SoC vendors (Samsung and
  Qualcomm) and the non-critical driver fixes for things like incorrect
  topology descriptions and wrong registers or bit fields. More details
  are below, but I'd say that it looks pretty ordinary. The only thing
  that really jumps out at me is the Renesas clk driver that's ignoring
  clks that are assigned to remote processors in DeviceTree. That's a
  new feature that they're using to avoid marking clks as
  CLK_IGNORE_UNUSED based on the configuration of the system.

  Core:
   - Increase dev_id len for clkdev lookups
   - Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
     for a device
   - Add a devm variant of clk_rate_exclusive_get()

  New Drivers:
   - Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1
     Elite SoC
   - Google GS101 PERIC0 and PERIC1 clock controllers
   - Exynos850 PDMA clocks
   - Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock
     controllers

  Removed Drivers:
   - Remove the unused Qualcomm sc7180 modem clk driver

  Updates:
   - Fix some static checker errors in the Hisilicon clk driver
   - Polarfire MSSPLL hardware has 4 output clocks (the driver supported
     previously only one output); each of these 4 outputs feed dividers
     and the output of each divider feed individual hardware blocks
     (e.g. CAN, Crypto, eMMC); individual hardware block drivers need to
     control their clocks thus clock driver support was added for all
     MSSPLL output clocks
   - Typo fixes in the Qualcomm IPQ5018 GCC driver
   - Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
   - Properly terminate frequency tables in different Qualcomm clk
     drivers
   - Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
   - Add missing UFS CLKREF clks on Qualcomm SC8180X
   - Avoid significant delays during boot by adding a softdep on rpmhpd
     to Qualcomm SDM845 gcc driver
   - Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC
     driver
   - Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC
     driver
   - Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk
     driver
   - Switch display, GPU, video, and camera Qualcomm clk drivers to
     module_platform_driver()
   - Set a longer delay for Venus resets on many Qualcomm SoCs
   - Correct the GDSC wait times in the Qualcomm SDM845 display clk
     driver
   - Fix clock listing Oops on Amlogic axg
   - New pll-rate for Rockchip rk3568
   - i2s rate improvements for Rockchip rk3399
   - Rockchip rk3588 syscon clock fixes and removal of overall
     clock-number from the rk3588 binding header
   - A prerequisite for later improvements to the Rockchip rk3588 linked
     clocks
   - Minor clean-ups and error handling improvements in both
     composite-8m and SCU i.MX clock drivers
   - Fix for SAI_MCLK_SEL definition for i.MX8MP
   - Register the Samsung CMU MISC clock controller earlier, so the
     Multi Core Timer clocksource can use it on Google GS101
   - Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI
     will get proper clock rates
   - Refactor the generic Samsung CPU clock controllers code, preparing
     it for supporting Exynos850 CPU clocks
   - Fix some clk kerneldoc warnings
   - Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on
     Renesas R-Car V4M
   - Ignore all clocks which are assigned to a non-Linux system in the
     Renesas clk driver
   - Add watchdog clock on Renesas RZ/G3S
   - Add camera (CRU) clock and reset on Renesas RZ/G2UL
   - Add support for the Renesas R-Car V4M (R8A779H0) SoC
   - Convert some clk bindings to YAML so they can be validated"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  clk: zynq: Prevent null pointer dereference caused by kmalloc failure
  clk: fractional-divider: Use bit operations consistently
  clk: fractional-divider: Move mask calculations out of lock
  clk: Fix clk_core_get NULL dereference
  clk: starfive: jh7110-vout: Convert to platform remove callback returning void
  clk: starfive: jh7110-isp: Convert to platform remove callback returning void
  clk: imx: imx8-acm: Convert to platform remove callback returning void
  clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
  clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
  clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
  clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
  clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
  clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
  clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
  clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
  clk: Add a devm variant of clk_rate_exclusive_get()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'renesas-dt-bindings-for-v6.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt</title>
<updated>2024-02-29T14:09:28+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2024-02-29T14:09:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6b66ed51cd7b7cd280bd28987a60f9676962025b'/>
<id>6b66ed51cd7b7cd280bd28987a60f9676962025b</id>
<content type='text'>
Renesas DT binding updates for v6.9

  - Document support for the Renesas R-Car V4M (R8A779H0) SoC, and the
    White Hawk Single and Gray Hawk Single development boards.

* tag 'renesas-dt-bindings-for-v6.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Document R-Car V4M Gray Hawk Single
  dt-bindings: reset: renesas,rst: Document R-Car V4M support
  dt-bindings: soc: renesas: Document R-Car V4H White Hawk Single

Link: https://lore.kernel.org/r/cover.1707487832.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Renesas DT binding updates for v6.9

  - Document support for the Renesas R-Car V4M (R8A779H0) SoC, and the
    White Hawk Single and Gray Hawk Single development boards.

* tag 'renesas-dt-bindings-for-v6.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Document R-Car V4M Gray Hawk Single
  dt-bindings: reset: renesas,rst: Document R-Car V4M support
  dt-bindings: soc: renesas: Document R-Car V4H White Hawk Single

Link: https://lore.kernel.org/r/cover.1707487832.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: mobileye,eyeq5-reset: add bindings</title>
<updated>2024-02-22T06:14:41+00:00</updated>
<author>
<name>Théo Lebrun</name>
<email>theo.lebrun@bootlin.com</email>
</author>
<published>2024-02-21T18:22:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c6e0897ecaf098d24a2efb815721970ddc6597b8'/>
<id>c6e0897ecaf098d24a2efb815721970ddc6597b8</id>
<content type='text'>
Add DT-Schema bindings for the EyeQ5 reset controller.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Théo Lebrun &lt;theo.lebrun@bootlin.com&gt;
Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-4-31d4ce3630c3@bootlin.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add DT-Schema bindings for the EyeQ5 reset controller.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Théo Lebrun &lt;theo.lebrun@bootlin.com&gt;
Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-4-31d4ce3630c3@bootlin.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: sophgo: support SG2042</title>
<updated>2024-02-21T10:51:39+00:00</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2024-01-30T01:49:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=41197eb5f993d5572ea533c9378c49ca81e24c8e'/>
<id>41197eb5f993d5572ea533c9378c49ca81e24c8e</id>
<content type='text'>
Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-fixes-for-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2024-02-15T18:19:55+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-02-15T18:19:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=339e2fca02141ee74bd705b3d409aa81d9ca3d0a'/>
<id>339e2fca02141ee74bd705b3d409aa81d9ca3d0a</id>
<content type='text'>
Pull devicetree fixes from Rob Herring:

 - Improve devlink dependency parsing for DT graphs

 - Fix devlink handling of io-channels dependencies

 - Fix PCI addressing in marvell,prestera example

 - A few schema fixes for property constraints

 - Improve performance of DT unprobed devices kselftest

 - Fix regression in DT_SCHEMA_FILES handling

 - Fix compile error in unittest for !OF_DYNAMIC

* tag 'devicetree-fixes-for-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: ufs: samsung,exynos-ufs: Add size constraints on "samsung,sysreg"
  of: property: Add in-ports/out-ports support to of_graph_get_port_parent()
  of: property: Improve finding the supplier of a remote-endpoint property
  of: property: Improve finding the consumer of a remote-endpoint property
  net: marvell,prestera: Fix example PCI bus addressing
  of: unittest: Fix compile in the non-dynamic case
  of: property: fix typo in io-channels
  dt-bindings: tpm: Drop type from "resets"
  dt-bindings: display: nxp,tda998x: Fix 'audio-ports' constraints
  dt-bindings: xilinx: replace Piyush Mehta maintainership
  kselftest: dt: Stop relying on dirname to improve performance
  dt-bindings: don't anchor DT_SCHEMA_FILES to bindings directory
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull devicetree fixes from Rob Herring:

 - Improve devlink dependency parsing for DT graphs

 - Fix devlink handling of io-channels dependencies

 - Fix PCI addressing in marvell,prestera example

 - A few schema fixes for property constraints

 - Improve performance of DT unprobed devices kselftest

 - Fix regression in DT_SCHEMA_FILES handling

 - Fix compile error in unittest for !OF_DYNAMIC

* tag 'devicetree-fixes-for-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: ufs: samsung,exynos-ufs: Add size constraints on "samsung,sysreg"
  of: property: Add in-ports/out-ports support to of_graph_get_port_parent()
  of: property: Improve finding the supplier of a remote-endpoint property
  of: property: Improve finding the consumer of a remote-endpoint property
  net: marvell,prestera: Fix example PCI bus addressing
  of: unittest: Fix compile in the non-dynamic case
  of: property: fix typo in io-channels
  dt-bindings: tpm: Drop type from "resets"
  dt-bindings: display: nxp,tda998x: Fix 'audio-ports' constraints
  dt-bindings: xilinx: replace Piyush Mehta maintainership
  kselftest: dt: Stop relying on dirname to improve performance
  dt-bindings: don't anchor DT_SCHEMA_FILES to bindings directory
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: renesas,rst: Document R-Car V4M support</title>
<updated>2024-01-31T14:06:52+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-01-25T15:34:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cd508bba82e4e0f405f593d7ada8067ebba289cb'/>
<id>cd508bba82e4e0f405f593d7ada8067ebba289cb</id>
<content type='text'>
Document support for the Reset (RST) module in the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Reviewed-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/bd26299d687412c20fea5e2d57195a763cc532e9.1706194617.git.geert+renesas@glider.be
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Document support for the Reset (RST) module in the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Reviewed-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/bd26299d687412c20fea5e2d57195a763cc532e9.1706194617.git.geert+renesas@glider.be
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: xilinx: replace Piyush Mehta maintainership</title>
<updated>2024-01-31T13:42:38+00:00</updated>
<author>
<name>Radhey Shyam Pandey</name>
<email>radhey.shyam.pandey@amd.com</email>
</author>
<published>2024-01-19T11:36:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2d3b3ab8d0d54e6c20260c8c1a73901a7a58a9cd'/>
<id>2d3b3ab8d0d54e6c20260c8c1a73901a7a58a9cd</id>
<content type='text'>
As Piyush is leaving AMD, he handed over ahci-ceva, ZynqMP Mode Pin GPIO
controller, Zynq UltraScale+ MPSoC and Versal reset, Xilinx SuperSpeed
DWC3 USB SoC controller, Microchip USB5744 4-port Hub Controller and
Xilinx udc controller maintainership duties to Mubin and Radhey.

Signed-off-by: Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;
Acked-by: Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Piyush Mehta &lt;piyush.mehta@amd.com&gt;
Acked-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Acked-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Link: https://lore.kernel.org/r/1705664181-722937-1-git-send-email-radhey.shyam.pandey@amd.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As Piyush is leaving AMD, he handed over ahci-ceva, ZynqMP Mode Pin GPIO
controller, Zynq UltraScale+ MPSoC and Versal reset, Xilinx SuperSpeed
DWC3 USB SoC controller, Microchip USB5744 4-port Hub Controller and
Xilinx udc controller maintainership duties to Mubin and Radhey.

Signed-off-by: Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;
Acked-by: Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Piyush Mehta &lt;piyush.mehta@amd.com&gt;
Acked-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Acked-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Link: https://lore.kernel.org/r/1705664181-722937-1-git-send-email-radhey.shyam.pandey@amd.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: hisilicon,hi3660-reset: Drop providers and consumers from example</title>
<updated>2023-11-29T10:49:45+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-11-28T21:47:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c3c46acd5be9a3351c163d2869045cab4d5342dc'/>
<id>c3c46acd5be9a3351c163d2869045cab4d5342dc</id>
<content type='text'>
Binding examples should generally only cover what the binding covers. A
provider binding doesn't need to show consumers and vice-versa. The
hisilicon,hi3660-reset binding example has both, so let's drop them.

This also fixes an undocumented (by schema) compatible warning for
"hisilicon,hi3660-iomcu".

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20231128214759.3975428-1-robh@kernel.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Binding examples should generally only cover what the binding covers. A
provider binding doesn't need to show consumers and vice-versa. The
hisilicon,hi3660-reset binding example has both, so let's drop them.

This also fixes an undocumented (by schema) compatible warning for
"hisilicon,hi3660-iomcu".

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20231128214759.3975428-1-robh@kernel.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: imx-src: Simplify compatible schema and drop unneeded quotes</title>
<updated>2023-11-28T16:26:13+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-11-22T22:44:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e4916e791fb637a87c0ad5a0cd7ee824b817b27f'/>
<id>e4916e791fb637a87c0ad5a0cd7ee824b817b27f</id>
<content type='text'>
The compatible schema can be simplified to a single enum for all the cases
with "fsl,imx51-src" fallback compatible.

In addition, the compatible strings are redundantly quoted. Drop unneeded
quotes over simple string values to fix a soon to be enabled yamllint
warning:

  [error] string value is redundantly quoted with any quotes (quoted-strings)

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20231122224404.2808838-1-robh@kernel.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The compatible schema can be simplified to a single enum for all the cases
with "fsl,imx51-src" fallback compatible.

In addition, the compatible strings are redundantly quoted. Drop unneeded
quotes over simple string values to fix a soon to be enabled yamllint
warning:

  [error] string value is redundantly quoted with any quotes (quoted-strings)

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20231122224404.2808838-1-robh@kernel.org
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
