<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/Documentation/devicetree/bindings/reset, branch v5.14</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2021-07-10T16:46:20+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-07-10T16:46:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=071e5aceebebf1d33b5c29ccfd2688ed39c60007'/>
<id>071e5aceebebf1d33b5c29ccfd2688ed39c60007</id>
<content type='text'>
Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: Drop redundant minItems/maxItems</title>
<updated>2021-06-21T19:56:46+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-06-15T19:15:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=972d6a7dcec3ad3226661034c5d8cb2d30585157'/>
<id>972d6a7dcec3ad3226661034c5d8cb2d30585157</id>
<content type='text'>
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.

This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.

Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Cc: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Joerg Roedel &lt;joro@8bytes.org&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Cc: Jakub Kicinski &lt;kuba@kernel.org&gt;
Cc: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Vivien Didelot &lt;vivien.didelot@gmail.com&gt;
Cc: Vladimir Oltean &lt;olteanv@gmail.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: "Uwe Kleine-König" &lt;u.kleine-koenig@pengutronix.de&gt;
Cc: Lee Jones &lt;lee.jones@linaro.org&gt;
Cc: Ohad Ben-Cohen &lt;ohad@wizery.com&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;
Cc: Alessandro Zummo &lt;a.zummo@towertech.it&gt;
Cc: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;
Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt; # for MMC
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Arnaud Pouliquen &lt;arnaud.pouliquen@st.com&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Acked-by: Wolfram Sang &lt;wsa@kernel.org&gt; # for I2C
Acked-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Link: https://lore.kernel.org/r/20210615191543.1043414-1-robh@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.

This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.

Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Cc: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Cc: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Joerg Roedel &lt;joro@8bytes.org&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Cc: Jakub Kicinski &lt;kuba@kernel.org&gt;
Cc: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Vivien Didelot &lt;vivien.didelot@gmail.com&gt;
Cc: Vladimir Oltean &lt;olteanv@gmail.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: "Uwe Kleine-König" &lt;u.kleine-koenig@pengutronix.de&gt;
Cc: Lee Jones &lt;lee.jones@linaro.org&gt;
Cc: Ohad Ben-Cohen &lt;ohad@wizery.com&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;
Cc: Alessandro Zummo &lt;a.zummo@towertech.it&gt;
Cc: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Wim Van Sebroeck &lt;wim@linux-watchdog.org&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;
Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt; # for MMC
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Arnaud Pouliquen &lt;arnaud.pouliquen@st.com&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Acked-by: Wolfram Sang &lt;wsa@kernel.org&gt; # for I2C
Acked-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Link: https://lore.kernel.org/r/20210615191543.1043414-1-robh@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: Convert ti,sci-reset to json schema</title>
<updated>2021-05-10T16:54:31+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2021-04-26T15:54:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9a81b8cbc24599bcd009b0b9113e440e9658705d'/>
<id>9a81b8cbc24599bcd009b0b9113e440e9658705d</id>
<content type='text'>
Convert the ti,sci-reset to json schema for better checks and documentation.

Differences being:
 - Drop consumer example as they are documented in the corresponding
   bindings themselves.
 - Drop phandle description for reset consumer or cell definition as it is
   redundant.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Tero Kristo &lt;kristo@kernel.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Link: https://lore.kernel.org/r/20210426155457.21221-2-nm@ti.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert the ti,sci-reset to json schema for better checks and documentation.

Differences being:
 - Drop consumer example as they are documented in the corresponding
   bindings themselves.
 - Drop phandle description for reset consumer or cell definition as it is
   redundant.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Tero Kristo &lt;kristo@kernel.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Link: https://lore.kernel.org/r/20210426155457.21221-2-nm@ti.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: microchip sparx5 reset driver bindings</title>
<updated>2021-05-10T07:40:04+00:00</updated>
<author>
<name>Steen Hegelund</name>
<email>steen.hegelund@microchip.com</email>
</author>
<published>2021-04-16T08:40:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9a531e4d5a49925554f99024d164572cbd6a8d9b'/>
<id>9a531e4d5a49925554f99024d164572cbd6a8d9b</id>
<content type='text'>
Document the Sparx5 reset device driver bindings

The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.

Sparx5 will no longer use the existing Ocelot chip reset driver, but use
this new switch reset driver as it has the reset controller interface that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.

Signed-off-by: Steen Hegelund &lt;steen.hegelund@microchip.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Document the Sparx5 reset device driver bindings

The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.

Sparx5 will no longer use the existing Ocelot chip reset driver, but use
this new switch reset driver as it has the reset controller interface that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.

Signed-off-by: Steen Hegelund &lt;steen.hegelund@microchip.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2021-02-26T18:28:35+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-02-26T18:28:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8b83369ddcb3fb9cab5c1088987ce477565bb630'/>
<id>8b83369ddcb3fb9cab5c1088987ce477565bb630</id>
<content type='text'>
Pull RISC-V updates from Palmer Dabbelt:
 "A handful of new RISC-V related patches for this merge window:

   - A check to ensure drivers are properly using uaccess. This isn't
     manifesting with any of the drivers I'm currently using, but may
     catch errors in new drivers.

   - Some preliminary support for the FU740, along with the HiFive
     Unleashed it will appear on.

   - NUMA support for RISC-V, which involves making the arm64 code
     generic.

   - Support for kasan on the vmalloc region.

   - A handful of new drivers for the Kendryte K210, along with the DT
     plumbing required to boot on a handful of K210-based boards.

   - Support for allocating ASIDs.

   - Preliminary support for kernels larger than 128MiB.

   - Various other improvements to our KASAN support, including the
     utilization of huge pages when allocating the KASAN regions.

  We may have already found a bug with the KASAN_VMALLOC code, but it's
  passing my tests. There's a fix in the works, but that will probably
  miss the merge window.

* tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits)
  riscv: Improve kasan population by using hugepages when possible
  riscv: Improve kasan population function
  riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization
  riscv: Improve kasan definitions
  riscv: Get rid of MAX_EARLY_MAPPING_SIZE
  soc: canaan: Sort the Makefile alphabetically
  riscv: Disable KSAN_SANITIZE for vDSO
  riscv: Remove unnecessary declaration
  riscv: Add Canaan Kendryte K210 SD card defconfig
  riscv: Update Canaan Kendryte K210 defconfig
  riscv: Add Kendryte KD233 board device tree
  riscv: Add SiPeed MAIXDUINO board device tree
  riscv: Add SiPeed MAIX GO board device tree
  riscv: Add SiPeed MAIX DOCK board device tree
  riscv: Add SiPeed MAIX BiT board device tree
  riscv: Update Canaan Kendryte K210 device tree
  dt-bindings: add resets property to dw-apb-timer
  dt-bindings: fix sifive gpio properties
  dt-bindings: update sifive uart compatible string
  dt-bindings: update sifive clint compatible string
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull RISC-V updates from Palmer Dabbelt:
 "A handful of new RISC-V related patches for this merge window:

   - A check to ensure drivers are properly using uaccess. This isn't
     manifesting with any of the drivers I'm currently using, but may
     catch errors in new drivers.

   - Some preliminary support for the FU740, along with the HiFive
     Unleashed it will appear on.

   - NUMA support for RISC-V, which involves making the arm64 code
     generic.

   - Support for kasan on the vmalloc region.

   - A handful of new drivers for the Kendryte K210, along with the DT
     plumbing required to boot on a handful of K210-based boards.

   - Support for allocating ASIDs.

   - Preliminary support for kernels larger than 128MiB.

   - Various other improvements to our KASAN support, including the
     utilization of huge pages when allocating the KASAN regions.

  We may have already found a bug with the KASAN_VMALLOC code, but it's
  passing my tests. There's a fix in the works, but that will probably
  miss the merge window.

* tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits)
  riscv: Improve kasan population by using hugepages when possible
  riscv: Improve kasan population function
  riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization
  riscv: Improve kasan definitions
  riscv: Get rid of MAX_EARLY_MAPPING_SIZE
  soc: canaan: Sort the Makefile alphabetically
  riscv: Disable KSAN_SANITIZE for vDSO
  riscv: Remove unnecessary declaration
  riscv: Add Canaan Kendryte K210 SD card defconfig
  riscv: Update Canaan Kendryte K210 defconfig
  riscv: Add Kendryte KD233 board device tree
  riscv: Add SiPeed MAIXDUINO board device tree
  riscv: Add SiPeed MAIX GO board device tree
  riscv: Add SiPeed MAIX DOCK board device tree
  riscv: Add SiPeed MAIX BiT board device tree
  riscv: Update Canaan Kendryte K210 device tree
  dt-bindings: add resets property to dw-apb-timer
  dt-bindings: fix sifive gpio properties
  dt-bindings: update sifive uart compatible string
  dt-bindings: update sifive clint compatible string
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2021-02-21T02:42:28+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-02-21T02:42:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e767b3530acbf651593e3d357fe1168a024d8061'/>
<id>e767b3530acbf651593e3d357fe1168a024d8061</id>
<content type='text'>
Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  SCMI firmware:
   - add support for a completion interrupt

  Reset controllers:
   - new driver for BCM4908
   - new devm_reset_control_get_optional_exclusive_released() function

  Memory controllers:
   - Renesas RZ/G2 support
   - Tegra124 interconnect support
   - Allow more drivers to be loadable modules

  TEE/optee firmware:
   - minor code cleanup

  The other half of this is SoC specific drivers that do not belong into
  any other subsystem, most of them living in drivers/soc:

   - Allwinner/sunxi power management work
   - Allwinner H616 support

   - ASpeed AST2600 system identification support

   - AT91 SAMA7G5 SoC ID driver
   - AT91 SoC driver cleanups

   - Broadcom BCM4908 power management bus support

   - Marvell mbus cleanups

   - Mediatek MT8167 power domain support

   - Qualcomm socinfo driver support for PMIC
   - Qualcomm SoC identification for many more products

   - TI Keystone driver cleanups for PRUSS and elsewhere"

* tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits)
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic
  memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: samsung: exynos5422-dmc: Correct function names in kerneldoc
  memory: ti-emif-pm: Drop of_match_ptr from of_device_id table
  optee: simplify i2c access
  drivers: soc: atmel: fix type for same7
  tee: optee: remove need_resched() before cond_resched()
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  optee: sync OP-TEE headers
  tee: optee: fix 'physical' typos
  drivers: optee: use flexible-array member instead of zero-length array
  tee: fix some comment typos in header files
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  SCMI firmware:
   - add support for a completion interrupt

  Reset controllers:
   - new driver for BCM4908
   - new devm_reset_control_get_optional_exclusive_released() function

  Memory controllers:
   - Renesas RZ/G2 support
   - Tegra124 interconnect support
   - Allow more drivers to be loadable modules

  TEE/optee firmware:
   - minor code cleanup

  The other half of this is SoC specific drivers that do not belong into
  any other subsystem, most of them living in drivers/soc:

   - Allwinner/sunxi power management work
   - Allwinner H616 support

   - ASpeed AST2600 system identification support

   - AT91 SAMA7G5 SoC ID driver
   - AT91 SoC driver cleanups

   - Broadcom BCM4908 power management bus support

   - Marvell mbus cleanups

   - Mediatek MT8167 power domain support

   - Qualcomm socinfo driver support for PMIC
   - Qualcomm SoC identification for many more products

   - TI Keystone driver cleanups for PRUSS and elsewhere"

* tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits)
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic
  memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: samsung: exynos5422-dmc: Correct function names in kerneldoc
  memory: ti-emif-pm: Drop of_match_ptr from of_device_id table
  optee: simplify i2c access
  drivers: soc: atmel: fix type for same7
  tee: optee: remove need_resched() before cond_resched()
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  optee: sync OP-TEE headers
  tee: optee: fix 'physical' typos
  drivers: optee: use flexible-array member instead of zero-length array
  tee: fix some comment typos in header files
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: remove zte zx platform</title>
<updated>2021-01-20T09:24:19+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-01-18T13:06:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=89d4f98ae90d95716009bb89823118a8cfbb94dd'/>
<id>89d4f98ae90d95716009bb89823118a8cfbb94dd</id>
<content type='text'>
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with
Baoyou Xie and Shawn Guo subsequently becoming maintainers after the
addition of the 64-bit variant.

However, the only machines that were ever supported upstream are the
reference designs, not actual set-top-box devices that would benefit
from this support. All ZTE set-top-boxes from the past few years seem
to be based on third-party SoCs. While there is very little information
about zx296702 and zx296718 on the web, I found some references to other
chips from the same family, such as zx296716 and zx296719, which were
never submitted for upstream support. Finally, there is no support for
the GPU on either of them, with the lima and panfrost device drivers
having been added after work on the zx platform had stopped.

Shawn confirmed that he has not seen any interest in this platform for
the past four years, and that it can be removed.

Thanks to Jun and Shawn for maintaining this platform over the past
five years.

Cc: Jun Nie &lt;jun.nie@linaro.org&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with
Baoyou Xie and Shawn Guo subsequently becoming maintainers after the
addition of the 64-bit variant.

However, the only machines that were ever supported upstream are the
reference designs, not actual set-top-box devices that would benefit
from this support. All ZTE set-top-boxes from the past few years seem
to be based on third-party SoCs. While there is very little information
about zx296702 and zx296718 on the web, I found some references to other
chips from the same family, such as zx296716 and zx296719, which were
never submitted for upstream support. Finally, there is no support for
the GPU on either of them, with the lima and panfrost device drivers
having been added after work on the zx platform had stopped.

Shawn confirmed that he has not seen any interest in this platform for
the past four years, and that it can be removed.

Thanks to Jun and Shawn for maintaining this platform over the past
five years.

Cc: Jun Nie &lt;jun.nie@linaro.org&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: remove sirf prima2/atlas platforms</title>
<updated>2021-01-20T08:41:37+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-01-18T11:53:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f3a732843accb04ede91055ffd0b92464fa4d15c'/>
<id>f3a732843accb04ede91055ffd0b92464fa4d15c</id>
<content type='text'>
The SiRF Prima2 and Atlas platform code was contributed by Cambridge
Silicon Radio (CSR) after aquiring the original SiRF company, and
maintained by Barry Song. CSR was subsequently acquired by Qualcomm,
who no longer have an interest in maintaining the SoC platform but
instead have released more recent SoCs for the same market in the
Snapdragon family.

As Barry is no longer working for the company, nobody else there
wants to maintain it, and there are no third-party users, the
best way forward seems to be to completely remove it.

Thanks to Barry for maintaining the platform for the past ten years.

Cc: Barry Song &lt;baohua@kernel.org&gt;
Link: https://lore.kernel.org/lkml/c969392572604b98bcb3be44048c3165@hisilicon.com/
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SiRF Prima2 and Atlas platform code was contributed by Cambridge
Silicon Radio (CSR) after aquiring the original SiRF company, and
maintained by Barry Song. CSR was subsequently acquired by Qualcomm,
who no longer have an interest in maintaining the SoC platform but
instead have released more recent SoCs for the same market in the
Snapdragon family.

As Barry is no longer working for the company, nobody else there
wants to maintain it, and there are no third-party users, the
best way forward seems to be to completely remove it.

Thanks to Barry for maintaining the platform for the past ten years.

Cc: Barry Song &lt;baohua@kernel.org&gt;
Link: https://lore.kernel.org/lkml/c969392572604b98bcb3be44048c3165@hisilicon.com/
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: Document canaan,k210-rst bindings</title>
<updated>2021-01-14T23:08:51+00:00</updated>
<author>
<name>Damien Le Moal</name>
<email>damien.lemoal@wdc.com</email>
</author>
<published>2020-12-13T13:50:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1d7c9d093ed58b8cf4ae23986cd01272667d412a'/>
<id>1d7c9d093ed58b8cf4ae23986cd01272667d412a</id>
<content type='text'>
Document the device tree bindings for the Canaan Kendryte K210 SoC
reset controller driver in
Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header
file include/dt-bindings/reset/k210-rst.h is added to define all
possible reset lines of the SoC.

Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Document the device tree bindings for the Canaan Kendryte K210 SoC
reset controller driver in
Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml. The header
file include/dt-bindings/reset/k210-rst.h is added to define all
possible reset lines of the SoC.

Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: reset: convert Hisilicon reset controller bindings to json-schema</title>
<updated>2021-01-08T12:00:59+00:00</updated>
<author>
<name>Zhen Lei</name>
<email>thunder.leizhen@huawei.com</email>
</author>
<published>2020-12-08T12:46:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f2ad9bfd4dda69175b8ed2c38f115c8138239780'/>
<id>f2ad9bfd4dda69175b8ed2c38f115c8138239780</id>
<content type='text'>
Convert the Hisilicon reset controller binding to DT schema format using
json-schema.

Signed-off-by: Zhen Lei &lt;thunder.leizhen@huawei.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert the Hisilicon reset controller binding to DT schema format using
json-schema.

Signed-off-by: Zhen Lei &lt;thunder.leizhen@huawei.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
