Pull ARM SoC device tree changes from Arnd Bergmann:
 "A large part of the arm-soc patches are nowadays DT changes, adding
  support for new SoCs, boards and devices without changing kernel
  source.  The plan is still to move the devicetree files out of the
  kernel tree and reduce the amount of churn going on here, but we keep
  finding reasons to delay doing that.

  Changes are really all over the place, with little sticking out
  particularly.  We have contributions from a total of 116 people in
  this branch.

  Unfortunately, the size of this branch also causes a significant
  number of conflicts at the moment, typically when subsystem
  maintainers merge patches that change the driver at the same time as
  the dts files.  In most cases this could be avoided because the dts
  changes are supposed to be compatible in both ways, and we are asking
  everyone to send ARM dts changes through our tree only"

* tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits)
  dts: stmmac: Document the clocks property in the stmmac base document
  dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
  ARM: STi: stih41x: Add support for the FSM Serial Flash Controller
  ARM: STi: stih416: Add support for the FSM Serial Flash Controller
  ARM: tegra: fix Dalmore pinctrl configuration
  ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
  ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
  ARM: dts: Build all keystone dt blobs
  ARM: dts: keystone: Fix control register range for clktsip
  ARM: dts: keystone: Fix domain register range for clkfftc1
  ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot
  ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
  ARM: dts: bcm21664: Add device tree files.
  ARM: DT: bcm21664: Device tree bindings
  ARM: efm32: properly namespace i2c location property
  ARM: efm32: fix unit address part in USART2 device nodes' names
  ARM: mvebu: Enable NAND controller in Armada 385-DB
  ARM: mvebu: Add support for NAND controller in Armada 38x SoC
  ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
  ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
  ...

This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

this moves to generic IP module reset framework, and make other drivers
use common device_reset() API.

Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

The SRC has auto-deasserting reset bits that control reset lines to
the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset
controller that can be controlled by those devices using the
reset controller API.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
It consists of a binding for a reset controller device (provider), and a
pair of properties, "resets" and "reset-names", to link a device node
(consumer) to its reset controller via phandle, similarly to the clock
and interrupt bindings.

The reset controller has all information necessary to reset the consumer
device. That could be provided via device tree, or it could be implemented
in hardware.
The aim is to enable device drivers to request a framework API to issue a
reset simply by providing their struct device pointer as the most common
case.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rob Herring <rob.herring@calxeda.com>