linux.git/Documentation/devicetree/bindings/pinctrl, branch v4.11

scripts/spelling.txt: add "followings" pattern and fix typo instances

2017-02-28T02:43:47+00:00

Fix typos and add the following to the scripts/spelling.txt:

  followings||following

While we are here, add a missing colon in the boilerplate in DT binding
documents.  The "you SoC" in allwinner,sunxi-pinctrl.txt was fixed as
well.

I reworded "as the followings:" to "as follows:" for
drivers/usb/gadget/udc/renesas_usb3.c.

Link: http://lkml.kernel.org/r/1481573103-11329-32-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

pinctrl: Amend bindings for STM32 pinctrl

2017-02-06T08:47:17+00:00

Adds "ngpios" and "gpio-ranges" bindings definition.

Signed-off-by: Alexandre TORGUE 
Acked-by: Rob Herring 
Signed-off-by: Linus Walleij

pinctrl: Add STM32 pinctrl driver DT bindings

2017-02-06T08:47:04+00:00

Add compatible sting for stm32h743 MCU.

Signed-off-by: Alexandre TORGUE 
Acked-by: Rob Herring 
Signed-off-by: Linus Walleij

drivers: pinctrl: add driver for Allwinner H5 SoC

2017-01-30T15:26:28+00:00

Based on the Allwinner H5 datasheet and the pinctrl driver of the
backward-compatible H3 this introduces the pin multiplex assignments for
the H5 SoC.

H5 introduced some more pin functions (e.g. three more groups of TS
pins, and one more groups of SIM pins) than H3.

Signed-off-by: Icenowy Zheng 
Acked-by: Maxime Ripard 
Signed-off-by: Linus Walleij

Merge branch 'ib-mvebu-98dx3236' into devel

2017-01-30T13:55:27+00:00

pinctrl: mvebu: pinctrl driver for 98DX3236 SoC

2017-01-30T13:55:18+00:00

This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
from Marvell.

Signed-off-by: Kalyan Kinthada 
Signed-off-by: Chris Packham 
Acked-by: Rob Herring 
Acked-by: Sebastian Hesselbarth 
Signed-off-by: Linus Walleij

pinctrl: samsung: Document Exynos3250 SoC support

2017-01-26T09:03:49+00:00

Add missing compatible id for Exynos3250 SoC to device tree docs.
Exynos pin control driver supports it since commit d97f5b9804bfcdc1
("pinctrl: exynos: Add driver data for Exynos3250").

Signed-off-by: Marek Szyprowski 
Reviewed-by: Krzysztof Kozlowski 
Acked-by: Tomasz Figa 
Signed-off-by: Linus Walleij

pinctrl: imx7d-pinctrl: Fix a typo

2017-01-11T13:31:33+00:00

Fix a typo in "Peripherals".

Signed-off-by: Fabio Estevam 
Signed-off-by: Linus Walleij

pinctrl: Introduce TI IOdelay configuration driver

2017-01-09T18:43:21+00:00

SoC family such as DRA7 family of processors have, in addition
to the regular muxing of pins (as done by pinctrl-single), a separate
hardware module called IODelay which is also expected to be configured.
The "IODelay" module has it's own register space that is independent
of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support
this hardware with a reasonably minimal driver by using #pinctrl-cells,
GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay reconfiguration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do as little of muxing as absolutely necessary
without I/O isolation (which can only be done in initial stages of
bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC
family, it is not reasonable to do stop all I/O operations for every
such pad configuration scheme. So, we will let it glitch when used in
this mode.

Even with the above limitation, certain functionality such as MMC has
mandatory need for IODelay reconfiguration requirements, depending on
speed of transfer. In these cases, with careful examination of usecase
involved, the expected glitch can be controlled such that it does not
impact functionality.

In short, IODelay module support as a padconf driver being introduced
here is not expected to do SoC wide I/O Isolation and is meant for
a limited subset of IODelay configuration requirements that need to
be dynamic and whose glitchy behavior will not cause functionality
failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared
to 0x0 at all times, even when configuring Manual IO Timing Modes.
This is done by eliminating the LOCK_BIT=1 setting from Step
of the Manual IO timing Mode configuration procedure. This option
leaves the CFG_* registers unprotected from unintended writes to the
CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel
world that has to be used carefully in required usecases.

Signed-off-by: Nishanth Menon 
Signed-off-by: Lokesh Vutla 
[tony@atomide.com: updated to use generic pinctrl functions, added
 binding documentation, updated comments]
Acked-by: Rob Herring 
Signed-off-by: Tony Lindgren 
Signed-off-by: Linus Walleij

pinctrl: fix DT bindings for marvell,kirkwood-pinctrl

2016-12-30T07:37:17+00:00

On Marvell mv88f6180 mpp pins range from 0 to 19 as well as from 35 to 44.
This is already fixed in commit: 9573e7923007961799beff38bc5c5a7635634eef

This is the documentation change for above commit.

Signed-off-by: Andreas Klinger 
Signed-off-by: Linus Walleij