linux.git/Documentation/devicetree/bindings/phy, branch v6.17 Linux kernel source tree dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings 2025-08-12T16:08:14+00:00 Ziyue Zhang ziyue.zhang@oss.qualcomm.com 2025-07-25T10:22:29+00:00 aac1256a41cfbbaca12d6c0a5753d1e3b8d2d8bf The gcc_aux_clk is required by the PCIe controller but not by the PCIe PHY. In PCIe PHY, the source of aux_clk used in low-power mode should be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with gcc_phy_aux_clk. Fixes: fd2d4e4c1986 ("dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY") Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250725102231.3608298-2-ziyue.zhang@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
The gcc_aux_clk is required by the PCIe controller but not by the PCIe
PHY. In PCIe PHY, the source of aux_clk used in low-power mode should
be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with
gcc_phy_aux_clk.

Fixes: fd2d4e4c1986 ("dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY")
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250725102231.3608298-2-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: phy: marvell,comphy-cp110: Fix clock and child node constraints 2025-08-12T14:11:28+00:00 Rob Herring (Arm) robh@kernel.org 2025-08-06T20:01:37+00:00 5cfdfc623835d40664f642b75a56d9934f24c5ff In converting marvell,comphy-cp110 to schema, the constraints for clocks on marvell,comphy-a3700 are wrong, the maximum number of child nodes are wrong, and the phy nodes may have a 'connector' child node: phy@18300 (marvell,comphy-a3700): clock-names: False schema does not allow ['xtal'] phy@120000 (marvell,comphy-cp110): 'phy@3', 'phy@4', 'phy@5' do not match any of the regexes: '^phy@[0-2]$', '^pinctrl-[0-9]+$' phy@120000 (marvell,comphy-cp110): phy@2: 'connector' does not match any of the regexes: '^pinctrl-[0-9]+$' Fixes: 50355ac70d4f ("dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema") Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20250806200138.1366189-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
In converting marvell,comphy-cp110 to schema, the constraints for clocks on
marvell,comphy-a3700 are wrong, the maximum number of child nodes are wrong,
and the phy nodes may have a 'connector' child node:

phy@18300 (marvell,comphy-a3700): clock-names: False schema does not allow ['xtal']
phy@120000 (marvell,comphy-cp110): 'phy@3', 'phy@4', 'phy@5' do not match any of the regexes: '^phy@[0-2]$', '^pinctrl-[0-9]+$'
phy@120000 (marvell,comphy-cp110): phy@2: 'connector' does not match any of the regexes: '^pinctrl-[0-9]+$'

Fixes: 50355ac70d4f ("dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema")
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20250806200138.1366189-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Merge tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 2025-08-01T19:31:50+00:00 Linus Torvalds torvalds@linux-foundation.org 2025-08-01T19:31:50+00:00 8582976acc8504cec53a7b6fed493435eba8437f Pull phy updates from Vinod Koul: "New Support: - Qualcomm Milos Synopsys eUSB2 PHY, SM8750 QMP phy support, M31 eUSB2 PHY driver - Samsung Exynos990 usbdrd phy, Exynos7870 MIPI phy support - Renesas RZ/V2N usb2-phy support Updates: - Bulk Yaml binding conversion By Rob H (too many to be listed) - cadence: Sierra PCIe, USB PHY multilink configuration support - Qualcomm refactoring of UFS PHY reset and UFS driver support for phy calibrate API" * tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (74 commits) phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema dt-bindings: phy: Convert ti,da830-usb-phy to DT schema dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870 phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2 phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY dt-bindings: usb: qcom,snps-dwc3: Add Milos compatible phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal phy: rockchip-pcie: Enable all four lanes if required dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615 phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750 phy: qcom: m31-eusb2: drop registration printk phy: qcom: m31-eusb2: fix match data santity check phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P phy: qualcomm: phy-qcom-eusb2-repeater: Don't zero-out registers dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values phy: mediatek: tphy: Cleanup and document slew calibration ... 
Pull phy updates from Vinod Koul:
 "New Support:

   - Qualcomm Milos Synopsys eUSB2 PHY, SM8750 QMP phy support, M31
     eUSB2 PHY driver

   - Samsung Exynos990 usbdrd phy, Exynos7870 MIPI phy support

   - Renesas RZ/V2N usb2-phy support

  Updates:

   - Bulk Yaml binding conversion By Rob H (too many to be listed)

   - cadence: Sierra PCIe, USB PHY multilink configuration support

   - Qualcomm refactoring of UFS PHY reset and UFS driver support for
     phy calibrate API"

* tag 'phy-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (74 commits)
  phy: qcom: phy-qcom-m31: Update IPQ5332 M31 USB phy initialization sequence
  dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema
  dt-bindings: phy: Convert ti,da830-usb-phy to DT schema
  dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example
  dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties
  phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870
  phy: qcom: phy-qcom-snps-eusb2: Update init sequence per HPG 1.0.2
  phy: qcom: phy-qcom-snps-eusb2: Add missing write from init sequence
  dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY
  dt-bindings: usb: qcom,snps-dwc3: Add Milos compatible
  phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal
  phy: rockchip-pcie: Enable all four lanes if required
  dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615
  phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750
  phy: qcom: m31-eusb2: drop registration printk
  phy: qcom: m31-eusb2: fix match data santity check
  phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P
  phy: qualcomm: phy-qcom-eusb2-repeater: Don't zero-out registers
  dt-bindings: phy: qcom,snps-eusb2-repeater: Remove default tuning values
  phy: mediatek: tphy: Cleanup and document slew calibration
  ...
dt-bindings: mfd: Convert lpc1850-creg-clk, pc1850-dmamux and phy-lpc18xx-usb-otg to YAML format 2025-07-24T10:26:58+00:00 Frank Li Frank.Li@nxp.com 2025-06-02T14:36:10+00:00 5d005cf799675566d271d90062b70d26e13a59f0 Combine the following separate plain text based bindings to YAML: lpc1850-creg-clk.txt pc1850-dmamux.txt phy-lpc18xx-usb-otg.txt Additional changes: - remove label in example. - remove dmamux consumer in example. - remove clock consumer in example. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250602143612.943516-1-Frank.Li@nxp.com Signed-off-by: Lee Jones <lee@kernel.org> 
Combine the following separate plain text based bindings to YAML:

  lpc1850-creg-clk.txt
  pc1850-dmamux.txt
  phy-lpc18xx-usb-otg.txt

Additional changes:

- remove label in example.
- remove dmamux consumer in example.
- remove clock consumer in example.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250602143612.943516-1-Frank.Li@nxp.com
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: phy: Convert brcm,sr-usb-combo-phy to DT schema 2025-07-22T13:28:31+00:00 Rob Herring (Arm) robh@kernel.org 2025-06-27T22:01:25+00:00 4c3d05da59eb75bdb7869f8668778dae87229168 Convert the Broadcom Stingray USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20250627220126.214577-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Convert the Broadcom Stingray USB PHY binding to DT schema format. It's
a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250627220126.214577-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: phy: Convert ti,da830-usb-phy to DT schema 2025-07-22T13:28:02+00:00 Rob Herring (Arm) robh@kernel.org 2025-06-27T22:01:06+00:00 99dd7faeb7a4d973f049e1bad234888777e03646 Convert the TI DA830 USB PHY binding to DT schema format. Add "clocks" and "clock-names" which are already in use. As they are always present, make them required as well. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: David Lechner <david@lechnology.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250627220107.214162-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Convert the TI DA830 USB PHY binding to DT schema format. Add "clocks"
and "clock-names" which are already in use. As they are always present,
make them required as well.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250627220107.214162-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: phy: marvell,mmp2-usb-phy: Drop status from the example 2025-07-22T13:19:00+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2025-07-01T06:36:37+00:00 a91ec5efde530747c23f3182cc5b53ba99b57051 Examples should not have the 'status' property and 'okay' is anyway by default. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250701063636.23872-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Examples should not have the 'status' property and 'okay' is anyway by
default.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250701063636.23872-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* properties 2025-07-22T13:18:31+00:00 Liu Ying victor.liu@nxp.com 2025-07-07T02:47:00+00:00 429efeb1900d4a3164e1233b392ee5f489b6c3f8 assigned-clock* properties can be used by default now, so allow them. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250707-dt-bindings-phy-mixel-mipi-dsi-phy-allow-assign-clock-properties-v1-1-5e34b257e1ef@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
assigned-clock* properties can be used by default now, so allow them.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250707-dt-bindings-phy-mixel-mipi-dsi-phy-allow-assign-clock-properties-v1-1-5e34b257e1ef@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: phy: qcom,snps-eusb2: document the Milos Synopsys eUSB2 PHY 2025-07-22T12:35:45+00:00 Luca Weiss luca.weiss@fairphone.com 2025-07-15T07:29:35+00:00 bb39f49a433312ba7558b7cc44cfd9131b46bce1 Document the Synopsys eUSB2 PHY on the Milos SoC by using the SM8550 as fallback. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-2-6c3224085eb6@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
Document the Synopsys eUSB2 PHY on the Milos SoC by using the SM8550 as
fallback.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250715-sm7635-eusb-phy-v3-2-6c3224085eb6@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QCS615 2025-07-22T12:23:11+00:00 Ziyue Zhang ziyue.zhang@oss.qualcomm.com 2025-07-03T09:56:28+00:00 dfef90f29811b5b8bc6353e259cac6134a88671f QCS615 pcie phy only use 5 clocks, which are aux, cfg_ahb, ref, ref_gen, pipe. So move "qcom,qcs615-qmp-gen3x1-pcie-phy" compatible from 6 clocks' list to 5 clocks' list. Fixes: 1e889f2bd837 ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS615 QMP PCIe PHY Gen3 x1") Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250703095630.669044-2-ziyue.zhang@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org> 
QCS615 pcie phy only use 5 clocks, which are aux, cfg_ahb, ref,
ref_gen, pipe. So move "qcom,qcs615-qmp-gen3x1-pcie-phy" compatible
from 6 clocks' list to 5 clocks' list.

Fixes: 1e889f2bd837 ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS615 QMP PCIe PHY Gen3 x1")
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250703095630.669044-2-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>