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<title>linux.git/Documentation/devicetree/bindings/opp, branch v5.9</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>dt-bindings: opp: Introduce opp-peak-kBps and opp-avg-kBps bindings</title>
<updated>2020-05-13T06:16:11+00:00</updated>
<author>
<name>Saravana Kannan</name>
<email>saravanak@google.com</email>
</author>
<published>2020-05-12T12:53:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=45a41875fa20836f2839d4dda1f37d119a275542'/>
<id>45a41875fa20836f2839d4dda1f37d119a275542</id>
<content type='text'>
Interconnects often quantify their performance points in terms of
bandwidth. So, add opp-peak-kBps (required) and opp-avg-kBps (optional) to
allow specifying Bandwidth OPP tables in DT.

opp-peak-kBps is a required property that replaces opp-hz for Bandwidth OPP
tables.

opp-avg-kBps is an optional property that can be used in Bandwidth OPP
tables.

Signed-off-by: Saravana Kannan &lt;saravanak@google.com&gt;
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
Reviewed-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Interconnects often quantify their performance points in terms of
bandwidth. So, add opp-peak-kBps (required) and opp-avg-kBps (optional) to
allow specifying Bandwidth OPP tables in DT.

opp-peak-kBps is a required property that replaces opp-hz for Bandwidth OPP
tables.

opp-avg-kBps is an optional property that can be used in Bandwidth OPP
tables.

Signed-off-by: Saravana Kannan &lt;saravanak@google.com&gt;
Signed-off-by: Georgi Djakov &lt;georgi.djakov@linaro.org&gt;
Reviewed-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq: qcom: Add support for krait based socs</title>
<updated>2020-03-20T04:29:57+00:00</updated>
<author>
<name>Ansuel Smith</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2020-03-13T17:52:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a8811ec764f95a04ba82f6f457e28c5e9e36e36b'/>
<id>a8811ec764f95a04ba82f6f457e28c5e9e36e36b</id>
<content type='text'>
In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
that has KRAIT processors the voltage/current value of each OPP
varies based on the silicon variant in use.

The required OPP related data is determined based on
the efuse value. This is similar to the existing code for
kryo cores. So adding support for krait cores here.

Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
Signed-off-by: Ansuel Smith &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
that has KRAIT processors the voltage/current value of each OPP
varies based on the silicon variant in use.

The required OPP related data is determined based on
the efuse value. This is similar to the existing code for
kryo cores. So adding support for krait cores here.

Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
Signed-off-by: Ansuel Smith &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: opp: Convert Allwinner H6 OPP to a schema</title>
<updated>2019-12-24T21:17:52+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2019-12-19T08:46:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b30d8cf5e1717b3498056833d24971d9977bf3ab'/>
<id>b30d8cf5e1717b3498056833d24971d9977bf3ab</id>
<content type='text'>
The Allwinner H6 SoCs use binning in order to provide binning to
cpufreq which is supported in Linux, with a matching Device Tree binding.

Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Allwinner H6 SoCs use binning in order to provide binning to
cpufreq which is supported in Linux, with a matching Device Tree binding.

Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'pm-opp', 'pm-qos', 'acpi-pm', 'pm-domains' and 'pm-tools'</title>
<updated>2019-09-17T07:49:19+00:00</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2019-09-17T07:49:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fc6763a2d7e0a7f49ccec97a46e92e9fb1f3f9dd'/>
<id>fc6763a2d7e0a7f49ccec97a46e92e9fb1f3f9dd</id>
<content type='text'>
* pm-opp:
  PM / OPP: Correct Documentation about library location
  opp: of: Support multiple suspend OPPs defined in DT
  dt-bindings: opp: Support multiple opp-suspend properties
  opp: core: add regulators enable and disable
  opp: Don't decrement uninitialized list_kref

* pm-qos:
  PM: QoS: Get rid of unused flags

* acpi-pm:
  ACPI: PM: Print debug messages on device power state changes

* pm-domains:
  PM / Domains: Verify PM domain type in dev_pm_genpd_set_performance_state()
  PM / Domains: Simplify genpd_lookup_dev()
  PM / Domains: Align in-parameter names for some genpd functions

* pm-tools:
  pm-graph: make setVal unbuffered again for python2 and python3
  cpupower: update German translation
  tools/power/cpupower: fix 64bit detection when cross-compiling
  cpupower: Add missing newline at end of file
  pm-graph v5.5
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* pm-opp:
  PM / OPP: Correct Documentation about library location
  opp: of: Support multiple suspend OPPs defined in DT
  dt-bindings: opp: Support multiple opp-suspend properties
  opp: core: add regulators enable and disable
  opp: Don't decrement uninitialized list_kref

* pm-qos:
  PM: QoS: Get rid of unused flags

* acpi-pm:
  ACPI: PM: Print debug messages on device power state changes

* pm-domains:
  PM / Domains: Verify PM domain type in dev_pm_genpd_set_performance_state()
  PM / Domains: Simplify genpd_lookup_dev()
  PM / Domains: Align in-parameter names for some genpd functions

* pm-tools:
  pm-graph: make setVal unbuffered again for python2 and python3
  cpupower: update German translation
  tools/power/cpupower: fix 64bit detection when cross-compiling
  cpupower: Add missing newline at end of file
  pm-graph v5.5
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'cpufreq/qcom-updates' into cpufreq/arm/linux-next</title>
<updated>2019-09-03T02:25:22+00:00</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@linaro.org</email>
</author>
<published>2019-09-03T02:25:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f75d2accca7785657311653c125bb22f342dc5d9'/>
<id>f75d2accca7785657311653c125bb22f342dc5d9</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'opp/qcom-updates' into opp/linux-next</title>
<updated>2019-09-03T02:24:17+00:00</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@linaro.org</email>
</author>
<published>2019-09-03T02:24:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=071afa50609d46f2f760851b90696f9a09714d24'/>
<id>071afa50609d46f2f760851b90696f9a09714d24</id>
<content type='text'>
</content>
<content type='xhtml'>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: opp: Add qcom-opp bindings with properties needed for CPR</title>
<updated>2019-09-03T02:23:51+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>niklas.cassel@linaro.org</email>
</author>
<published>2019-08-19T10:12:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=475a21e0eade5227488d97aebeaa882b16f38ca1'/>
<id>475a21e0eade5227488d97aebeaa882b16f38ca1</id>
<content type='text'>
Add qcom-opp bindings with properties needed for Core Power Reduction
(CPR).

CPR is included in a great variety of Qualcomm SoCs, e.g. msm8916 and
msm8996. CPR was first introduced in msm8974.

Co-developed-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add qcom-opp bindings with properties needed for Core Power Reduction
(CPR).

CPR is included in a great variety of Qualcomm SoCs, e.g. msm8916 and
msm8996. CPR was first introduced in msm8974.

Co-developed-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: opp: qcom-nvmem: Support pstates provided by a power domain</title>
<updated>2019-09-03T02:23:19+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>niklas.cassel@linaro.org</email>
</author>
<published>2019-08-30T10:29:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f6081a73091c0902efb45f47706d35284ebb4e9a'/>
<id>f6081a73091c0902efb45f47706d35284ebb4e9a</id>
<content type='text'>
Some Qualcomm SoCs have support for Core Power Reduction (CPR).
On these platforms, we need to attach to the power domain provider
providing the performance states, so that the leaky device (the CPU)
can configure the performance states (which represent different
CPU clock frequencies).

Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some Qualcomm SoCs have support for Core Power Reduction (CPR).
On these platforms, we need to attach to the power domain provider
providing the performance states, so that the leaky device (the CPU)
can configure the performance states (which represent different
CPU clock frequencies).

Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: opp: qcom-nvmem: Make speedbin related properties optional</title>
<updated>2019-07-26T07:58:59+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>niklas.cassel@linaro.org</email>
</author>
<published>2019-07-25T10:41:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a409906003a2b5418e6e60ac2524948ea80819f2'/>
<id>a409906003a2b5418e6e60ac2524948ea80819f2</id>
<content type='text'>
Not all Qualcomm platforms need to care about the speedbin efuse,
nor the value blown into the speedbin efuse.
Therefore, make the nvmem-cells and opp-supported-hw properties
optional.

Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Ilia Lin &lt;ilia.lin@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Not all Qualcomm platforms need to care about the speedbin efuse,
nor the value blown into the speedbin efuse.
Therefore, make the nvmem-cells and opp-supported-hw properties
optional.

Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Ilia Lin &lt;ilia.lin@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: opp: Re-organise kryo cpufreq to use it for other nvmem based qcom socs</title>
<updated>2019-07-26T07:58:24+00:00</updated>
<author>
<name>Sricharan R</name>
<email>sricharan@codeaurora.org</email>
</author>
<published>2019-07-25T10:41:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8cfda0df3a3020454848f55ed23a781169770c99'/>
<id>8cfda0df3a3020454848f55ed23a781169770c99</id>
<content type='text'>
The kryo cpufreq driver reads the nvmem cell and uses that data to
populate the opps. There are other qcom cpufreq socs like krait which
does similar thing. Except for the interpretation of the read data,
rest of the driver is same for both the cases. So pull the common things
out for reuse.

Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
[niklas.cassel@linaro.org: split dt-binding into a separate patch and
do not rename the compatible string.]
Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Ilia Lin &lt;ilia.lin@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The kryo cpufreq driver reads the nvmem cell and uses that data to
populate the opps. There are other qcom cpufreq socs like krait which
does similar thing. Except for the interpretation of the read data,
rest of the driver is same for both the cases. So pull the common things
out for reuse.

Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
[niklas.cassel@linaro.org: split dt-binding into a separate patch and
do not rename the compatible string.]
Signed-off-by: Niklas Cassel &lt;niklas.cassel@linaro.org&gt;
Reviewed-by: Ilia Lin &lt;ilia.lin@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
