<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/Documentation/devicetree/bindings/mtd, branch v4.12</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd</title>
<updated>2017-05-11T17:44:22+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-05-11T17:44:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9786e34e0a6055dbd1b46e16dfa791ac2b3da289'/>
<id>9786e34e0a6055dbd1b46e16dfa791ac2b3da289</id>
<content type='text'>
Pull MTD updates from Brian Norris:
 "NAND, from Boris:
   - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
     davinci, brcmnand, omap)
   - a huge cleanup/rework of the denali driver accompanied with core
     fixes/improvements to simplify the driver code
   - a complete rewrite of the atmel driver to support new DT bindings
     make future evolution easier
   - the addition of per-vendor detection/initialization steps to avoid
     extending the nand_ids table with more extended-id entries

  SPI NOR, from Cyrille:
   - fixes in the hisi, intel and Mediatek SPI controller drivers
   - fixes to some SPI flash memories not supporting the Chip Erase
     command.
   - add support to some new memory parts (Winbond, Macronix, Micron,
     ESMT).
   - add new driver for the STM32 QSPI controller

  And a few fixes for Gemini and Versatile platforms on physmap-of"

* tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits)
  MAINTAINERS: Update NAND subsystem git repositories
  mtd: nand: gpio: update binding
  mtd: nand: add ooblayout for old hamming layout
  mtd: oxnas_nand: Allocating more than necessary in probe()
  dt-bindings: mtd: Document the STM32 QSPI bindings
  mtd: mtk-nor: set controller's address width according to nor flash
  mtd: spi-nor: add driver for STM32 quad spi flash controller
  mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program
  mtd: nand: davinci: add comment on NAND subpage write status on keystone
  mtd: nand: omap2: Fix partition creation via cmdline mtdparts
  mtd: nand: NULL terminate a of_device_id table
  mtd: nand: Fix a couple error codes
  mtd: nand: allow drivers to request minimum alignment for passed buffer
  mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
  mtd: nand: denali: allow to override revision number
  mtd: nand: denali_dt: use pdev instead of ofdev for platform_device
  mtd: nand: denali_dt: remove dma-mask DT property
  mtd: nand: denali: support 64bit capable DMA engine
  mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant
  mtd: nand: denali: support HW_ECC_FIXUP capability
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MTD updates from Brian Norris:
 "NAND, from Boris:
   - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
     davinci, brcmnand, omap)
   - a huge cleanup/rework of the denali driver accompanied with core
     fixes/improvements to simplify the driver code
   - a complete rewrite of the atmel driver to support new DT bindings
     make future evolution easier
   - the addition of per-vendor detection/initialization steps to avoid
     extending the nand_ids table with more extended-id entries

  SPI NOR, from Cyrille:
   - fixes in the hisi, intel and Mediatek SPI controller drivers
   - fixes to some SPI flash memories not supporting the Chip Erase
     command.
   - add support to some new memory parts (Winbond, Macronix, Micron,
     ESMT).
   - add new driver for the STM32 QSPI controller

  And a few fixes for Gemini and Versatile platforms on physmap-of"

* tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits)
  MAINTAINERS: Update NAND subsystem git repositories
  mtd: nand: gpio: update binding
  mtd: nand: add ooblayout for old hamming layout
  mtd: oxnas_nand: Allocating more than necessary in probe()
  dt-bindings: mtd: Document the STM32 QSPI bindings
  mtd: mtk-nor: set controller's address width according to nor flash
  mtd: spi-nor: add driver for STM32 quad spi flash controller
  mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program
  mtd: nand: davinci: add comment on NAND subpage write status on keystone
  mtd: nand: omap2: Fix partition creation via cmdline mtdparts
  mtd: nand: NULL terminate a of_device_id table
  mtd: nand: Fix a couple error codes
  mtd: nand: allow drivers to request minimum alignment for passed buffer
  mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
  mtd: nand: denali: allow to override revision number
  mtd: nand: denali_dt: use pdev instead of ofdev for platform_device
  mtd: nand: denali_dt: remove dma-mask DT property
  mtd: nand: denali: support 64bit capable DMA engine
  mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant
  mtd: nand: denali: support HW_ECC_FIXUP capability
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: gpio: update binding</title>
<updated>2017-05-11T01:18:55+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@c-s.fr</email>
</author>
<published>2017-05-03T12:18:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7db789d08cb23aeedb4d6392c2994ce387067021'/>
<id>7db789d08cb23aeedb4d6392c2994ce387067021</id>
<content type='text'>
This patch updates the binding documentation in accordance with
commit 44dd182861f99 ("mtd: nand: gpio: make nCE GPIO optional")

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Reported-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch updates the binding documentation in accordance with
commit 44dd182861f99 ("mtd: nand: gpio: make nCE GPIO optional")

Signed-off-by: Christophe Leroy &lt;christophe.leroy@c-s.fr&gt;
Reported-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: mtd: Document the STM32 QSPI bindings</title>
<updated>2017-05-02T01:08:03+00:00</updated>
<author>
<name>Ludovic Barre</name>
<email>ludovic.barre@st.com</email>
</author>
<published>2017-04-13T17:15:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4ca41cb2ae09bfd9f84f053b8b9966e1bb8accc4'/>
<id>4ca41cb2ae09bfd9f84f053b8b9966e1bb8accc4</id>
<content type='text'>
This patch adds documentation of device tree bindings for the STM32
QSPI controller.

Signed-off-by: Ludovic Barre &lt;ludovic.barre@st.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds documentation of device tree bindings for the STM32
QSPI controller.

Signed-off-by: Ludovic Barre &lt;ludovic.barre@st.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: denali_dt: remove dma-mask DT property</title>
<updated>2017-04-25T12:18:36+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-03-30T06:45:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=60d920d32ca40660e382cf9ccbc236599a49e607'/>
<id>60d920d32ca40660e382cf9ccbc236599a49e607</id>
<content type='text'>
The driver sets appropriate DMA mask.  Delete the "dma-mask" DT
property.  See [1] for negative comments for this binding.

[1] https://lkml.org/lkml/2016/2/8/57

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The driver sets appropriate DMA mask.  Delete the "dma-mask" DT
property.  See [1] for negative comments for this binding.

[1] https://lkml.org/lkml/2016/2/8/57

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant</title>
<updated>2017-04-25T12:18:34+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-03-30T06:45:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a56609c4c3f34de76d905e39160511b3c53310ac'/>
<id>a56609c4c3f34de76d905e39160511b3c53310ac</id>
<content type='text'>
There are various customizable parameters, so several variants for
this IP.  A generic compatible like "denali,denali-nand-dt" is
useless.  Moreover, there are multiple things wrong with this string.
(Refer to Rob's comment [1])

The "denali,denali-nand-dt" was added by Altera for the SOCFPGA port.
Replace it with a more specific string "altr,socfpga-denali-nand".
There are no users (in upstream) of the old compatible string.

The Denali IP on SOCFPGA incorporates the hardware ECC fixup engine.
So, this capability should be associated with the compatible.

[1] https://lkml.org/lkml/2016/12/1/450

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are various customizable parameters, so several variants for
this IP.  A generic compatible like "denali,denali-nand-dt" is
useless.  Moreover, there are multiple things wrong with this string.
(Refer to Rob's comment [1])

The "denali,denali-nand-dt" was added by Altera for the SOCFPGA port.
Replace it with a more specific string "altr,socfpga-denali-nand".
There are no users (in upstream) of the old compatible string.

The Denali IP on SOCFPGA incorporates the hardware ECC fixup engine.
So, this capability should be associated with the compatible.

[1] https://lkml.org/lkml/2016/12/1/450

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: atmel: Document the new DT bindings</title>
<updated>2017-04-25T12:18:29+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@free-electrons.com</email>
</author>
<published>2017-03-16T08:02:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=82d0bf3417bd4a8f98b54da72d80c19d3d227800'/>
<id>82d0bf3417bd4a8f98b54da72d80c19d3d227800</id>
<content type='text'>
The old NAND bindings were not exactly describing the hardware topology
and were preventing definitions of several NAND chips under the same
NAND controller.

New bindings address these limitations and should be preferred over the
old ones for new SoCs/boards.
Old bindings are still supported for backward compatibility but are
marked deprecated in the doc.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Reviewed-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The old NAND bindings were not exactly describing the hardware topology
and were preventing definitions of several NAND chips under the same
NAND controller.

New bindings address these limitations and should be preferred over the
old ones for new SoCs/boards.
Old bindings are still supported for backward compatibility but are
marked deprecated in the doc.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Reviewed-by: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes</title>
<updated>2017-03-23T20:48:15+00:00</updated>
<author>
<name>Sekhar Nori</name>
<email>nsekhar@ti.com</email>
</author>
<published>2017-03-07T21:57:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=617c3d973b6aff3ba2f1b88ee2a1a37f1dff0a79'/>
<id>617c3d973b6aff3ba2f1b88ee2a1a37f1dff0a79</id>
<content type='text'>
W25Q64 is found on TI's AM335x ICEv2 board. Add it to list
for supported SPI flash devices. This flash can be identified
using JEDEC READ ID opcode.

Signed-off-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
W25Q64 is found on TI's AM335x ICEv2 board. Add it to list
for supported SPI flash devices. This flash can be identified
using JEDEC READ ID opcode.

Signed-off-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: mtd: add a common label property to all mtd devices</title>
<updated>2017-02-10T18:16:49+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2017-02-09T09:21:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2bfc7452742617fe1182b742917e6e9032eae52c'/>
<id>2bfc7452742617fe1182b742917e6e9032eae52c</id>
<content type='text'>
This can be used to easily identify a specific chip on a system with
multiple chips.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Acked-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This can be used to easily identify a specific chip on a system with
multiple chips.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Acked-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linux</title>
<updated>2017-02-10T18:05:51+00:00</updated>
<author>
<name>Brian Norris</name>
<email>computersforpeace@gmail.com</email>
</author>
<published>2017-02-10T18:05:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=398d8739bb900562f40e22aebdfc9970803d04b7'/>
<id>398d8739bb900562f40e22aebdfc9970803d04b7</id>
<content type='text'>
From Cyrille:

"""
This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
"""
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
From Cyrille:

"""
This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
"""
</pre>
</div>
</content>
</entry>
<entry>
<title>Documentation: mtk-quadspi: update DT bindings</title>
<updated>2017-02-10T13:22:00+00:00</updated>
<author>
<name>Guochun Mao</name>
<email>guochun.mao@mediatek.com</email>
</author>
<published>2017-01-25T03:38:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=35fd766117de41ed475948410c3ec5ab07cd3d03'/>
<id>35fd766117de41ed475948410c3ec5ab07cd3d03</id>
<content type='text'>
Add "mediatek,mt2701-nor" for nor flash node's compatible.

Signed-off-by: Guochun Mao &lt;guochun.mao@mediatek.com&gt;
Acked-by: John Crispin &lt;john@phrozen.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add "mediatek,mt2701-nor" for nor flash node's compatible.

Signed-off-by: Guochun Mao &lt;guochun.mao@mediatek.com&gt;
Acked-by: John Crispin &lt;john@phrozen.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Cyrille Pitchen &lt;cyrille.pitchen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
