linux.git/Documentation/devicetree/bindings/mfd, branch v6.9 Linux kernel source tree dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible 2024-02-29T17:16:19+00:00 Roger Quadros rogerq@kernel.org 2024-02-26T12:03:07+00:00 e9f06bd428d3f07c8d26506ed35d9f8bb836950b Add the compatible for TI AM62 USB PHY Control register. This register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It is used to indicate the USB PHY PLL reference clock rate and core voltage level to the USB controller. [1] - https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Roger Quadros <rogerq@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240226-b4-for-v6-5-am62-usb-typec-dt-v6-1-acf77fff4344@kernel.org Signed-off-by: Lee Jones <lee@kernel.org> 
Add the compatible for TI AM62 USB PHY Control register. This
register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
is used to indicate the USB PHY PLL reference clock rate and
core voltage level to the USB controller.

[1] - https://www.ti.com/lit/pdf/spruiv7

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240226-b4-for-v6-5-am62-usb-typec-dt-v6-1-acf77fff4344@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: dlg,da9063: Make #interrupt-cells required 2024-02-29T17:15:26+00:00 Geert Uytterhoeven geert+renesas@glider.be 2024-02-26T10:50:02+00:00 d3dc362b3a3d20d64208426cc86146eb241d7c7f '#interrupt-cells' is a required provided for interrupt providers, hence make it required. While at it, move '#interrupt-cells' in the example to match common sort order. Fixes: 361104b05684 ("dt-bindings: mfd: Convert da9063 to yaml") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/f512045738d2102c771a171a514ed7cf612c6d6f.1708944455.git.geert+renesas@glider.be Signed-off-by: Lee Jones <lee@kernel.org> 
'#interrupt-cells' is a required provided for interrupt providers,
hence make it required.

While at it, move '#interrupt-cells' in the example to match common sort
order.

Fixes: 361104b05684 ("dt-bindings: mfd: Convert da9063 to yaml")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/f512045738d2102c771a171a514ed7cf612c6d6f.1708944455.git.geert+renesas@glider.be
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: Convert atmel-flexcom to json-schema 2024-02-23T17:14:14+00:00 Balakrishnan Sambath balakrishnan.s@microchip.com 2024-02-23T09:16:23+00:00 ec0131916367e73420c66e9c4089f11872e028f1 Convert the Atmel flexcom device tree bindings to json schema. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com> Link: https://lore.kernel.org/r/20240223-b4-sama5d2-flexcom-yaml-v2-2-7e96c60c7701@microchip.com Signed-off-by: Lee Jones <lee@kernel.org> 
Convert the Atmel flexcom device tree bindings to json schema.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com>
Link: https://lore.kernel.org/r/20240223-b4-sama5d2-flexcom-yaml-v2-2-7e96c60c7701@microchip.com
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: cros-ec: Add properties for GPIO controller 2024-02-23T17:14:08+00:00 Stephen Boyd swboyd@chromium.org 2024-02-19T20:23:23+00:00 7b79740d42e7535901296f7acbab1043633422e6 The ChromeOS embedded controller (EC) supports setting the state of GPIOs when the system is unlocked, and getting the state of GPIOs in all cases. The GPIOs are on the EC itself, so the EC acts similar to a GPIO expander. Add the #gpio-cells and gpio-controller properties to the cros-ec binding so that other devices described in DT can get the GPIOs on the EC. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240219202325.4095816-2-swboyd@chromium.org Signed-off-by: Lee Jones <lee@kernel.org> 
The ChromeOS embedded controller (EC) supports setting the state of
GPIOs when the system is unlocked, and getting the state of GPIOs in all
cases. The GPIOs are on the EC itself, so the EC acts similar to a GPIO
expander. Add the #gpio-cells and gpio-controller properties to the
cros-ec binding so that other devices described in DT can get the GPIOs
on the EC.

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240219202325.4095816-2-swboyd@chromium.org
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: ti,twl: Document system-power-controller 2024-02-23T16:11:34+00:00 Andreas Kemnade andreas@kemnade.info 2024-02-17T08:20:03+00:00 0c7cc7497f6f62a65037e94cf0d885ab0af3c0d3 Add system-power-controller property because these chips can power off the device. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240217082007.3238948-2-andreas@kemnade.info Signed-off-by: Lee Jones <lee@kernel.org> 
Add system-power-controller property because these chips
can power off the device.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240217082007.3238948-2-andreas@kemnade.info
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: syscon: Add ti,am654-serdes-ctrl compatible 2024-02-23T14:58:02+00:00 Andrew Davis afd@ti.com 2024-02-05T17:47:36+00:00 17bb3a9d346c955c2c43968760e0e0443a590e01 Add TI SERDES control registers compatible. This is a region found in the TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a SERDES clock and lane select mux. [0] https://www.ti.com/lit/pdf/spruid7 Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240205174736.27749-1-afd@ti.com Signed-off-by: Lee Jones <lee@kernel.org> 
Add TI SERDES control registers compatible. This is a region found in the
TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
SERDES clock and lane select mux.

[0] https://www.ti.com/lit/pdf/spruid7

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240205174736.27749-1-afd@ti.com
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: syscon: Add ti,j784s4-pcie-ctrl compatible 2024-02-23T14:58:02+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2024-02-04T09:03:36+00:00 cc1965b02d6cb18d9220dae06f7e2e0b0ebbea48 The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC are used to configure the link speed, lane count and mode of operation of the respective PCIe instance. Add compatible for allowing the PCIe driver to obtain a regmap for the PCIE_CTRL register within the System Controller device-tree node in order to configure the PCIe instance accordingly. The Technical Reference Manual for J784S4 SoC with details of the PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52 Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240204090336.3209063-1-s-vadapalli@ti.com Signed-off-by: Lee Jones <lee@kernel.org> 
The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC
are used to configure the link speed, lane count and mode of operation
of the respective PCIe instance. Add compatible for allowing the PCIe
driver to obtain a regmap for the PCIE_CTRL register within the System
Controller device-tree node in order to configure the PCIe instance
accordingly.

The Technical Reference Manual for J784S4 SoC with details of the
PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240204090336.3209063-1-s-vadapalli@ti.com
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: atmel,hlcdc: Convert to DT schema format 2024-02-23T14:58:02+00:00 Dharma Balasubiramani dharma.b@microchip.com 2024-02-02T00:17:33+00:00 9fb7369cf5dfcfff0dd0bae91c27d5d641d780e2 Convert the atmel,hlcdc binding to DT schema format. Align clocks and clock-names properties to clearly indicate that the LCD controller expects lvds_pll_clk when interfaced with the lvds display. This alignment with the specific hardware requirements ensures accurate device tree configuration for systems utilizing the HLCDC IP. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240202001733.91455-4-dharma.b@microchip.com Signed-off-by: Lee Jones <lee@kernel.org> 
Convert the atmel,hlcdc binding to DT schema format.

Align clocks and clock-names properties to clearly indicate that the LCD
controller expects lvds_pll_clk when interfaced with the lvds display. This
alignment with the specific hardware requirements ensures accurate device tree
configuration for systems utilizing the HLCDC IP.

Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240202001733.91455-4-dharma.b@microchip.com
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: qcom,tcsr: Add compatibles for QCM2290 and SM6115 2024-02-23T14:58:01+00:00 Dmitry Baryshkov dmitry.baryshkov@linaro.org 2024-01-16T01:08:27+00:00 5dce78032b20eae46a7e34629c026eca344b0e26 Add qcom,qcm2290-tcsr and qcom,sm6115-tcsr, compatibles for TCSR blocks on the corresponding platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240116-usbc-phy-vls-clamp-v1-1-73b2da7691c5@linaro.org Signed-off-by: Lee Jones <lee@kernel.org> 
Add qcom,qcm2290-tcsr and qcom,sm6115-tcsr, compatibles for TCSR blocks
on the corresponding platforms.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240116-usbc-phy-vls-clamp-v1-1-73b2da7691c5@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
dt-bindings: mfd: iqs62x: Do not override firmware-name $ref 2024-02-23T14:58:01+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2024-01-15T18:20:42+00:00 ed3cb341e4476787fa7c109365f2edf9f96b5d10 dtschema package defines firmware-name as string-array, so individual bindings should not make it a string but instead just narrow the number of expected firmware file names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jeff LaBundy <jeff@labundy.com> Link: https://lore.kernel.org/r/20240115182042.1610134-1-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones <lee@kernel.org> 
dtschema package defines firmware-name as string-array, so individual
bindings should not make it a string but instead just narrow the number
of expected firmware file names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Jeff LaBundy <jeff@labundy.com>
Link: https://lore.kernel.org/r/20240115182042.1610134-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>