linux.git/Documentation/devicetree/bindings/interrupt-controller, branch v5.11 Linux kernel source tree dt-bindings: Fix JSON pointers 2020-12-18T21:14:44+00:00 Rob Herring robh@kernel.org 2020-12-17T22:34:29+00:00 d69c6ddd019f31081cc0232fa8ad8ea1cabdf22c The correct syntax for JSON pointers begins with a '/' after the '#'. Without a '/', the string should be interpreted as a subschema identifier. The jsonschema module currently doesn't handle subschema identifiers and incorrectly allows JSON pointers to begin without a '/'. Let's fix this before it becomes a problem when jsonschema module is fixed. Converted with: perl -p -i -e 's/yaml#definitions/yaml#\/definitions/g' `find Documentation/devicetree/bindings/ -name "*.yaml"` Cc: Maxime Ripard <mripard@kernel.org> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Daniel Thompson <daniel.thompson@linaro.org> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Mark Brown <broonie@kernel.org> Cc: netdev@vger.kernel.org Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Sebastian Reichel <sre@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Jakub Kicinski <kuba@kernel.org> Link: https://lore.kernel.org/r/20201217223429.354283-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> 
The correct syntax for JSON pointers begins with a '/' after the '#'.
Without a '/', the string should be interpreted as a subschema
identifier. The jsonschema module currently doesn't handle subschema
identifiers and incorrectly allows JSON pointers to begin without a '/'.
Let's fix this before it becomes a problem when jsonschema module is
fixed.

Converted with:
perl -p -i -e 's/yaml#definitions/yaml#\/definitions/g' `find Documentation/devicetree/bindings/ -name "*.yaml"`

Cc: Maxime Ripard <mripard@kernel.org>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: netdev@vger.kernel.org
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Jakub Kicinski <kuba@kernel.org>
Link: https://lore.kernel.org/r/20201217223429.354283-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Merge tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2020-12-17T00:27:35+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-12-17T00:27:35+00:00 9805529ec544ea7a82d891d5239a8ebd3dbb2a3e Pull ARM device tree updates from Arnd Bergmann: "Across all platforms, there is a continued move towards DT schema for validating the dts files. As a result there are bug fixes for mistakes that are found using these schema, in addition to warnings from the dtc compiler. As usual, many changes are for adding support for additional on-chip and on-board components in the machines we already support. The newly supported SoCs for this release are: - MStar Infinity2M, a low-end IP camera chip based on a dual-core Cortex-A7, otherwise similar to the Infinity chip we already support. This is also known as the SigmaStar SSD202D, and we add support for the Honestar ssd201htv2 development kit. - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller (BMC), in the same family as the NPCM750. This gets used in the Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of which are added as well. - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own Brahma-B53 CPU. Support is also added for the Asus ROG Rapture GT-AC5300 high-end WiFi router based on this chip. - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores, meant for faster Chromebooks and tablets. It gets added along with its reference design. - Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's generation, also added along with its reference board. This one is still based on Cortex-A75/A55. - Mediatek MT8167 is a version of the already supported MT8516 chip, both based on Cortex-A35. It gets added along with the "Pumpkin" single board computer, but is likely to also make its way into low-end tablets in the future. For the already supported chips, there are a number of new boards. Interestingly there are more 32-bit machines added this time than 64-bit. Here is a brief list of the new boards: - Three new Mikrotik router variants based on Marvell Prestera 98DX3236, a close relative of the more common Armada XP - A reference board for the Marvell Armada 382 - Three new servers using ASpeed baseboard management controllers, the actual machines being from Bytedance, Facebook and IBM, and one machine using the Nuvoton NPCM750 BMC. - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412. - The usual set of 32-bit i.MX industrial/embedded hardware: * Protonic WD3 (tractor e-cockpit) * Kamstrup OMNIA Flex Concentrator (smart grid platform) * Van der Laan LANMCU (food storage) * Altesco I6P (vehicle inspection stations) * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard - DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the aleady supported DHCOM module - Three new Allwinner SoC based single-board computers: * NanoPi R1 (H3 based) * FriendlyArm ZeroPi (H3 based) * Elimo Initium SBC (S3 based) - Ouya Game Console based on Nvidia Tegra 3 - Version 5 of the already supported Zynq Z-Turn MYIR Board - LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which is a repackaged 16-core LX2160A - A series of Kontron i.MX8M Mini baseboard/SoM versions - Espressobin Ultra, a new variant of the popular Armada 3700 based board, - IEI Puzzle-M801, a rackmount network appliance based on Marvell Armada 8040 - Microsoft Lumia 950 XL, a phone - HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and sm8150, respectively - Three new board variants of the "Trogdor" Chromebook (sc7180) - New board variants of the Renesas based "Kingfisher" and "HiHope" reference boards - Kobol Helios64, an open source NAS appliance based on Rockchips RK3399 - Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few carrier boards" * tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits) arm64: dts: sparx5: Add SGPIO devices arm64: dts: sparx5: Add reset support dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver ARM: mstar: SMP support ARM: mstar: Wire up smpctrl for SSD201/SSD202D ARM: mstar: Add smp ctrl registers to infinity2m dtsi ARM: mstar: Add dts for Honestar ssd201htv2 ARM: mstar: Add chip level dtsi for SSD202D ARM: mstar: Add common dtsi for SSD201/SSD202D ARM: mstar: Add infinity2m support dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards dt-bindings: vendor-prefixes: Add honestar vendor prefix dt-bindings: mstar: Add binding details for mstar,smpctrl ARM: mstar: Fill in GPIO controller properties for infinity ARM: mstar: Add gpio controller to MStar base dtsi ARM: zynq: Fix incorrect reference to XM013 instead of XM011 ARM: zynq: Convert at25 binding to new description on zc770-xm013 ARM: zynq: Fix OCM mapping to be aligned with binding on zc702 ARM: zynq: Fix leds subnode name for zc702/zybo-z7 ARM: zynq: Rename bus to be align with simple-bus yaml ... 
Pull ARM device tree updates from Arnd Bergmann:
 "Across all platforms, there is a continued move towards DT schema for
  validating the dts files. As a result there are bug fixes for mistakes
  that are found using these schema, in addition to warnings from the
  dtc compiler.

  As usual, many changes are for adding support for additional on-chip
  and on-board components in the machines we already support.

  The newly supported SoCs for this release are:

   - MStar Infinity2M, a low-end IP camera chip based on a dual-core
     Cortex-A7, otherwise similar to the Infinity chip we already
     support. This is also known as the SigmaStar SSD202D, and we add
     support for the Honestar ssd201htv2 development kit.

   - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
     (BMC), in the same family as the NPCM750. This gets used in the
     Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
     which are added as well.

   - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
     Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
     GT-AC5300 high-end WiFi router based on this chip.

   - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
     meant for faster Chromebooks and tablets. It gets added along with
     its reference design.

   - Mediatek MT6779 (Helio P90) is a high-end phone chip from last
     year's generation, also added along with its reference board. This
     one is still based on Cortex-A75/A55.

   - Mediatek MT8167 is a version of the already supported MT8516 chip,
     both based on Cortex-A35. It gets added along with the "Pumpkin"
     single board computer, but is likely to also make its way into
     low-end tablets in the future.

  For the already supported chips, there are a number of new boards.
  Interestingly there are more 32-bit machines added this time than
  64-bit. Here is a brief list of the new boards:

   - Three new Mikrotik router variants based on Marvell Prestera
     98DX3236, a close relative of the more common Armada XP

   - A reference board for the Marvell Armada 382

   - Three new servers using ASpeed baseboard management controllers,
     the actual machines being from Bytedance, Facebook and IBM, and one
     machine using the Nuvoton NPCM750 BMC.

   - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.

   - The usual set of 32-bit i.MX industrial/embedded hardware:
       * Protonic WD3 (tractor e-cockpit)
       * Kamstrup OMNIA Flex Concentrator (smart grid platform)
       * Van der Laan LANMCU (food storage)
       * Altesco I6P (vehicle inspection stations)
       * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard

   - DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
     aleady supported DHCOM module

   - Three new Allwinner SoC based single-board computers:
       * NanoPi R1 (H3 based)
       * FriendlyArm ZeroPi (H3 based)
       * Elimo Initium SBC (S3 based)

   - Ouya Game Console based on Nvidia Tegra 3

   - Version 5 of the already supported Zynq Z-Turn MYIR Board

   - LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
     is a repackaged 16-core LX2160A

   - A series of Kontron i.MX8M Mini baseboard/SoM versions

   - Espressobin Ultra, a new variant of the popular Armada 3700 based
     board,

   - IEI Puzzle-M801, a rackmount network appliance based on Marvell
     Armada 8040

   - Microsoft Lumia 950 XL, a phone

   - HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
     sm8150, respectively

   - Three new board variants of the "Trogdor" Chromebook (sc7180)

   - New board variants of the Renesas based "Kingfisher" and "HiHope"
     reference boards

   - Kobol Helios64, an open source NAS appliance based on Rockchips
     RK3399

   - Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
     carrier boards"

* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
  arm64: dts: sparx5: Add SGPIO devices
  arm64: dts: sparx5: Add reset support
  dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
  ARM: mstar: SMP support
  ARM: mstar: Wire up smpctrl for SSD201/SSD202D
  ARM: mstar: Add smp ctrl registers to infinity2m dtsi
  ARM: mstar: Add dts for Honestar ssd201htv2
  ARM: mstar: Add chip level dtsi for SSD202D
  ARM: mstar: Add common dtsi for SSD201/SSD202D
  ARM: mstar: Add infinity2m support
  dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
  dt-bindings: vendor-prefixes: Add honestar vendor prefix
  dt-bindings: mstar: Add binding details for mstar,smpctrl
  ARM: mstar: Fill in GPIO controller properties for infinity
  ARM: mstar: Add gpio controller to MStar base dtsi
  ARM: zynq: Fix incorrect reference to XM013 instead of XM011
  ARM: zynq: Convert at25 binding to new description on zc770-xm013
  ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
  ARM: zynq: Fix leds subnode name for zc702/zybo-z7
  ARM: zynq: Rename bus to be align with simple-bus yaml
  ...
dt-bindings: interrupt-controller: Add binding for few Microsemi interrupt controllers 2020-12-11T14:47:49+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2020-11-25T10:32:02+00:00 b307ee828f61bc65d918e820a93b5c547a73dda3 Add the Device Tree binding documentation for the Microsemi Jaguar2, Luton and Serval interrupt controller that is part of the ICPU. It is connected directly to the MIPS core interrupt controller. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201125103206.136498-3-gregory.clement@bootlin.com 
Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201125103206.136498-3-gregory.clement@bootlin.com
dt-bindings: interrupt-controller: convert icpu intr bindings to json-schema 2020-12-11T14:47:49+00:00 Gregory CLEMENT gregory.clement@bootlin.com 2020-11-25T10:32:01+00:00 47d5e0b0e1c151c06885a78a108001ead96adc75 Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt Controller to YAML format Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201125103206.136498-2-gregory.clement@bootlin.com 
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt
Controller to YAML format

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201125103206.136498-2-gregory.clement@bootlin.com
dt-bindings: interrupt-controller: update bindings for supporting more SoCs 2020-12-11T14:45:21+00:00 Biwen Li biwen.li@nxp.com 2020-11-30T10:15:15+00:00 9898a59358d7cb925f63bb77bd40224d1bc4857e Update bindings for Layerscape external irqs, support more SoCs(LS1043A, LS1046A, LS1088A, LS208xA, LX216xA) Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201130101515.27431-11-biwen.li@oss.nxp.com 
Update bindings for Layerscape external irqs,
support more SoCs(LS1043A, LS1046A, LS1088A,
LS208xA, LX216xA)

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201130101515.27431-11-biwen.li@oss.nxp.com
Merge tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt 2020-11-27T17:03:16+00:00 Arnd Bergmann arnd@arndb.de 2020-11-27T17:03:16+00:00 3f02c6a8280bf04086cf74f51968f69a3979b757 dt-bindings: Changes for v5.11-rc1 This contains a couple of conversions of bindings to json-schema, as well as symbolic names for the various memory clients on Tegra20, Tegra30 and Tegra124. There's also a couple of fixes for Tegra194 pinmux and ARM GIC bindings. Finally, a new vendor prefix is added for Ouya and the Ouya game console compatible string is defined. * tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: bus: Convert ACONNECT doc to json-schema dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles dt-bindings: dma: Convert ADMA doc to json-schema dt-bindings: Fix entry name for I/O High Voltage property dt-bindings: ARM: tegra: Add Ouya game console dt-bindings: Add vendor prefix for Ouya Inc. dt-bindings: memory: tegra124: Add memory client IDs dt-bindings: memory: tegra30: Add memory client IDs dt-bindings: memory: tegra20: Add memory client IDs Link: https://lore.kernel.org/r/20201127144329.124891-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> 
dt-bindings: Changes for v5.11-rc1

This contains a couple of conversions of bindings to json-schema, as
well as symbolic names for the various memory clients on Tegra20,
Tegra30 and Tegra124. There's also a couple of fixes for Tegra194
pinmux and ARM GIC bindings. Finally, a new vendor prefix is added
for Ouya and the Ouya game console compatible string is defined.

* tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: bus: Convert ACONNECT doc to json-schema
  dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
  dt-bindings: dma: Convert ADMA doc to json-schema
  dt-bindings: Fix entry name for I/O High Voltage property
  dt-bindings: ARM: tegra: Add Ouya game console
  dt-bindings: Add vendor prefix for Ouya Inc.
  dt-bindings: memory: tegra124: Add memory client IDs
  dt-bindings: memory: tegra30: Add memory client IDs
  dt-bindings: memory: tegra20: Add memory client IDs

Link: https://lore.kernel.org/r/20201127144329.124891-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles 2020-11-26T18:05:17+00:00 Sameer Pujar spujar@nvidia.com 2020-11-06T15:43:32+00:00 d806cdaea133c0c4d66359e4398651be4715f51f Update Tegra compatibles to support newer Tegra chips and required combinations. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> 
Update Tegra compatibles to support newer Tegra chips and required
combinations.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Merge tag 'irq-urgent-2020-11-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2020-11-08T17:52:57+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-11-08T17:52:57+00:00 15a9844458cf3a7afcd720eca81ecb3a16213cb4 Pull irq fixes from Thomas Gleixner: "A set of fixes for interrupt chip drivers: - Fix the fallout of the IPI as interrupt conversion in Kconfig and the BCM2836 interrupt chip driver - Fixes for interrupt affinity setting and the handling of hierarchical irq domains in the SiFive PLIC driver - Make the unmapped event handling in the TI SCI driver work correctly - A few minor fixes and cleanups in various chip drivers and Kconfig" * tag 'irq-urgent-2020-11-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dt-bindings: irqchip: ti, sci-inta: Fix diagram indentation for unmapped events irqchip/ti-sci-inta: Add support for unmapped event handling dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling irqchip/renesas-intc-irqpin: Merge irlm_bit and needs_irlm irqchip/sifive-plic: Fix chip_data access within a hierarchy irqchip/sifive-plic: Fix broken irq_set_affinity() callback irqchip/stm32-exti: Add all LP timer exti direct events support irqchip/bcm2836: Fix missing __init annotation irqchip/mips: Drop selection of IRQ_DOMAIN_HIERARCHY irqchip/mst: Make mst_intc_of_init static irqchip/mst: MST_IRQ should depend on ARCH_MEDIATEK or ARCH_MSTARV7 genirq: Let GENERIC_IRQ_IPI select IRQ_DOMAIN_HIERARCHY 
Pull irq fixes from Thomas Gleixner:
 "A set of fixes for interrupt chip drivers:

   - Fix the fallout of the IPI as interrupt conversion in Kconfig and
     the BCM2836 interrupt chip driver

   - Fixes for interrupt affinity setting and the handling of
     hierarchical irq domains in the SiFive PLIC driver

   - Make the unmapped event handling in the TI SCI driver work
     correctly

   - A few minor fixes and cleanups in various chip drivers and Kconfig"

* tag 'irq-urgent-2020-11-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  dt-bindings: irqchip: ti, sci-inta: Fix diagram indentation for unmapped events
  irqchip/ti-sci-inta: Add support for unmapped event handling
  dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling
  irqchip/renesas-intc-irqpin: Merge irlm_bit and needs_irlm
  irqchip/sifive-plic: Fix chip_data access within a hierarchy
  irqchip/sifive-plic: Fix broken irq_set_affinity() callback
  irqchip/stm32-exti: Add all LP timer exti direct events support
  irqchip/bcm2836: Fix missing __init annotation
  irqchip/mips: Drop selection of IRQ_DOMAIN_HIERARCHY
  irqchip/mst: Make mst_intc_of_init static
  irqchip/mst: MST_IRQ should depend on ARCH_MEDIATEK or ARCH_MSTARV7
  genirq: Let GENERIC_IRQ_IPI select IRQ_DOMAIN_HIERARCHY
dt-bindings: irqchip: ti, sci-inta: Fix diagram indentation for unmapped events 2020-11-03T15:25:55+00:00 Peter Ujfalusi peter.ujfalusi@ti.com 2020-11-03T13:50:04+00:00 82768a86c64659c7181571ebfbc41ec9f2e52dde One space has been missing by the diagram update. Fixes: bb2bd7c7f3d0 ("dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling") Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring <robh@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20201103135004.2363-1-peter.ujfalusi@ti.com 
One space has been missing by the diagram update.

Fixes: bb2bd7c7f3d0 ("dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling")
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201103135004.2363-1-peter.ujfalusi@ti.com
dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling 2020-11-01T12:00:50+00:00 Peter Ujfalusi peter.ujfalusi@ti.com 2020-10-20T07:32:42+00:00 bb2bd7c7f3d0946acc2104db31df228d10f7b598 The new DMA architecture introduced with AM64 introduced new event types: unampped events. These events are mapped within INTA in contrast to other K3 devices where the events with similar function was originating from the UDMAP or ringacc. The ti,unmapped-event-sources should contain phandle array to the devices in the system (typically DMA controllers) from where the unmapped events originate. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201020073243.19255-2-peter.ujfalusi@ti.com 
The new DMA architecture introduced with AM64 introduced new event types:
unampped events.

These events are mapped within INTA in contrast to other K3 devices where
the events with similar function was originating from the UDMAP or ringacc.

The ti,unmapped-event-sources should contain phandle array to the devices
in the system (typically DMA controllers) from where the unmapped events
originate.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201020073243.19255-2-peter.ujfalusi@ti.com