linux.git/Documentation/devicetree/bindings/interconnect, branch v6.8 Linux kernel source tree Merge branch 'icc-qcm2290' into icc-next 2023-12-14T22:43:01+00:00 Georgi Djakov djakov@kernel.org 2023-12-14T22:43:01+00:00 addb5295403270f9b287f2d76f1072b6f653af1d More QCM2290-related patches to document the bandwidth monitor instance. * icc-qcm2290 dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance Signed-off-by: Georgi Djakov <djakov@kernel.org> 
More QCM2290-related patches to document the bandwidth monitor instance.

* icc-qcm2290
  dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance

Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-sm6115' into icc-next 2023-12-14T22:42:31+00:00 Georgi Djakov djakov@kernel.org 2023-12-14T22:42:07+00:00 c9de516ef6339f42d80da73c7f827390309a73b5 Add DT bindings and a driver for managing NoC providers on SM6115. * icc-sm6115 dt-bindings: interconnect: Add Qualcomm SM6115 NoC interconnect: qcom: Add SM6115 interconnect provider driver dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM6115 bwmon instance interconnect: qcom: sm6115: Fix up includes Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-2-bd8907b8cfd7@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Add DT bindings and a driver for managing NoC providers on SM6115.

* icc-sm6115
  dt-bindings: interconnect: Add Qualcomm SM6115 NoC
  interconnect: qcom: Add SM6115 interconnect provider driver
  dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM6115 bwmon instance
  interconnect: qcom: sm6115: Fix up includes

Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-2-bd8907b8cfd7@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance 2023-12-13T14:40:21+00:00 Konrad Dybcio konrad.dybcio@linaro.org 2023-11-29T14:44:00+00:00 85bfa5d497b41dbd02f247dfda04076b935728c1 QCM2290 has a single BWMONv4 intance for CPU. Document it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-3-4cbb567743bb@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
QCM2290 has a single BWMONv4 intance for CPU. Document it.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-3-4cbb567743bb@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM6115 bwmon instance 2023-12-13T14:23:31+00:00 Konrad Dybcio konrad.dybcio@linaro.org 2023-12-11T09:23:58+00:00 80c5227af3ba3a93b33e6e78c65d38a6f191ca91 SM6115 has a single BWMONv4 intance for CPU. Document it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231209-topic-6115iccdt-v1-1-f62da62b7276@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
SM6115 has a single BWMONv4 intance for CPU. Document it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231209-topic-6115iccdt-v1-1-f62da62b7276@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: Add Qualcomm SM6115 NoC 2023-12-06T15:16:07+00:00 Konrad Dybcio konrad.dybcio@linaro.org 2023-11-29T14:41:01+00:00 658902913c7044ac5d56b14cea54e735a071fe41 Add bindings for Qualcomm SM6115 Network-On-Chip interconnect. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Add bindings for Qualcomm SM6115 Network-On-Chip interconnect.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-x1e80100' into icc-next 2023-11-23T22:27:30+00:00 Georgi Djakov djakov@kernel.org 2023-11-23T22:27:30+00:00 ecd3439595d3a7ecb729f509afae91f34f18af93 * icc-x1e80100 dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC interconnect: qcom: introduce RPMh Network-On-Chip Interconnect on SM8650 SoC dt-bindings: interconnect: qcom-bwmon: document SM8650 BWMONs This series adds interconnect support for the Qualcomm X1E80100 platform, aka Snapdragon X Elite. Our v1 post of the patchsets adding support for Snapdragon X Elite SoC had the part number sc8380xp which is now updated to the new part number x1e80100 based on the new branding scheme and refers to the exact same SoC. Release Link: https://www.qualcomm.com/news/releases/2023/10/qualcomm-unleashes-snapdragon-x-elite--the-ai-super-charged-plat Link: https://lore.kernel.org/r/20231123135028.29433-1-quic_sibis@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
* icc-x1e80100
  dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC
  interconnect: qcom: introduce RPMh Network-On-Chip Interconnect on SM8650 SoC
  dt-bindings: interconnect: qcom-bwmon: document SM8650 BWMONs

This series adds interconnect support for the Qualcomm X1E80100 platform,
aka Snapdragon X Elite.

Our v1 post of the patchsets adding support for Snapdragon X Elite SoC had
the part number sc8380xp which is now updated to the new part number x1e80100
based on the new branding scheme and refers to the exact same SoC.
Release Link: https://www.qualcomm.com/news/releases/2023/10/qualcomm-unleashes-snapdragon-x-elite--the-ai-super-charged-plat

Link: https://lore.kernel.org/r/20231123135028.29433-1-quic_sibis@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: Add Qualcomm X1E80100 SoC 2023-11-23T22:24:07+00:00 Rajendra Nayak quic_rjendra@quicinc.com 2023-11-23T13:50:27+00:00 dc84a76f054c01cc1d769a86ffa3a7e13867915a The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled
and tuned dynamically according to the bandwidth demand.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: qcom-bwmon: document SM8650 BWMONs 2023-11-23T22:15:58+00:00 Neil Armstrong neil.armstrong@linaro.org 2023-10-25T07:24:39+00:00 0403ae6f165ba51c185f22aa98fa397da4619fc7 Document SM8650 BWMONs which has - just like SM8550 - a BWMONv4 for CPU-LLCC and a BWMONv5 for DDR-LLCC paths. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-bwmon-v1-1-11efcdd8799e@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Document SM8650 BWMONs which has - just like SM8550 - a BWMONv4 for
CPU-LLCC and a BWMONv5 for DDR-LLCC paths.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-bwmon-v1-1-11efcdd8799e@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC 2023-11-23T22:14:52+00:00 Neil Armstrong neil.armstrong@linaro.org 2023-11-23T13:32:12+00:00 80abebd9bf72516a3a6ed50f69908b9dbbf72a93 Document the RPMh Network-On-Chip Interconnect of the SM8650 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Document the RPMh Network-On-Chip Interconnect of the SM8650 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-misc' into icc-next 2023-10-10T11:11:07+00:00 Georgi Djakov djakov@kernel.org 2023-10-10T11:11:07+00:00 9330bf741fdac78c398a866f979fd29fea435a88 * icc-misc interconnect: imx: Replace custom implementation of COUNT_ARGS() interconnect: msm8974: Replace custom implementation of COUNT_ARGS() interconnect: qcom: osm-l3: Replace custom implementation of COUNT_ARGS() interconnect: fix error handling in qnoc_probe() interconnect: imx: Replace inclusion of kernel.h in the header dt-bindings: interconnect: qcom,rpmh: do not require reg on SDX65 MC virt Signed-off-by: Georgi Djakov <djakov@kernel.org> 
* icc-misc
  interconnect: imx: Replace custom implementation of COUNT_ARGS()
  interconnect: msm8974: Replace custom implementation of COUNT_ARGS()
  interconnect: qcom: osm-l3: Replace custom implementation of COUNT_ARGS()
  interconnect: fix error handling in qnoc_probe()
  interconnect: imx: Replace inclusion of kernel.h in the header
  dt-bindings: interconnect: qcom,rpmh: do not require reg on SDX65 MC virt

Signed-off-by: Georgi Djakov <djakov@kernel.org>