linux.git/Documentation/devicetree/bindings/display/bridge, branch master Linux kernel source tree dt-bindings: display: bridge: Document Renesas RZ/G3L LVDS encoder 2026-08-05T13:08:35+00:00 Biju Das biju.das.jz@bp.renesas.com 2026-07-29T12:55:01+00:00 9a882c7737bf572fd0098240948168ac637aed9f Document the LVDS encoder IP found on the RZ/G3L SoC. It supports single-link mode. LVDS and the DSI interface share a peripheral clock and the MIPI_DSI_PRESET_N reset signal. However, the LVDS module cannot be used at the same time as MIPI-DSI. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260729125516.230757-10-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> 
Document the LVDS encoder IP found on the RZ/G3L SoC. It supports
single-link mode. LVDS and the DSI interface share a peripheral clock and
the MIPI_DSI_PRESET_N reset signal. However, the LVDS module cannot be
used at the same time as MIPI-DSI.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260729125516.230757-10-biju.das.jz@bp.renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
dt-bindings: display: bridge: renesas,dsi: Document RZ/G3L 2026-08-05T13:08:17+00:00 Biju Das biju.das.jz@bp.renesas.com 2026-07-29T12:54:53+00:00 a4377c7722b824d3d2eb940eb681cf37b0969a24 The RZ/G3L DSI IP is similar to the RZ/G2L but has different global PHY timings and also the PLLCLK is ungateble clock. Add the compatible string "renesas,r9a08g046-mipi-dsi" to handle these difference for the Renesas RZ/G3L SoC. The power to DSI region is controlled by SYSC block. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260729125516.230757-2-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> 
The RZ/G3L DSI IP is similar to the RZ/G2L but has different global PHY
timings and also the PLLCLK is ungateble clock. Add the compatible
string "renesas,r9a08g046-mipi-dsi" to handle these difference for the
Renesas RZ/G3L SoC. The power to DSI region is controlled by SYSC block.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260729125516.230757-2-biju.das.jz@bp.renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Merge tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 2026-06-17T18:54:57+00:00 Linus Torvalds torvalds@linux-foundation.org 2026-06-17T18:54:57+00:00 09fb6892f34abdb6d9b50ae7337b7b7b56dc82d6 Pull devicetree updates from Rob Herring: "DT core: - Add support for handling multiple cells in "iommu-map" entries - Support only 1 entry in /reserved-memory "reg" entries. Support for more than 1 entry has been broken - Fix a UAF on alloc_reserved_mem_array() failure - Make "ibm,phandle" handling logic specific to PPC - Use memcpy() instead of strcpy() for known length strings - Ensure __of_find_n_match_cpu_property() handles malformed "reg" entries - Add various checks that expected strings are strings before accessing them - Drop redundant memset() when unflattening DT DT bindings: - Add a DTS style checker. Currently hooked up to dt_binding_check to check examples - Convert st,nomadik platform, ti,omap-dmm, and ti,irq-crossbar bindings to DT schema - Add Apple System Management Controller hwmon, Qualcomm Hamoa Embedded Controller, Qualcomm IPQ6018 PWM controller, fsl,mc1323, Samsung SOFEF01-M DDIC panel, Freescale i.MX53 Television Encoder, Samsung S2M series PMIC extcon, and MT6365 PMIC AuxADC schemas - Extend bindings for QCom Maili and Nord PDC, QCom Hali fastrpc, qcom,eliza-imem, qcom,oryon-1-5 CPU, and MT6365 Keys - Consolidate "sram" property definitions - Fix constraints on "nvmem" properties which only contain phandles and no arg cells - Another pass of fixing "phandle-array" constraints - Add Gira vendor prefix" * tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits) dt-bindings: interrupt-controller: qcom,pdc: Add Maili compatible string dt-bindings: interrupt-controller: ti,irq-crossbar: Convert to DT schema dt-bindings: vendor-prefixes: add Gira dt-bindings: embedded-controller: Add Qualcomm reference device EC description dt-bindings: pwm: add IPQ6018 binding dt-bindings: hwmon: Add Apple System Management Controller hwmon schema docs: dt: writing-schema: Clarify what is required in a schema of: Respect #{iommu,msi}-cells in maps of: Factor arguments passed to of_map_id() into a struct of: Add convenience wrappers for of_map_id() of: reserved_mem: zero total_reserved_mem_cnt if no valid /reserved-memory entry of: reserved_mem: handle NULL name in of_reserved_mem_lookup() dt-bindings: cache: l2c2x0: Add missing power-domains dt-bindings: interrupt-controller: renesas,r9a09g077-icu: Fix reg size in example dt-bindings: nvmem: consumer: Make 'nvmem' an array of one-item entries drivers/of/overlay: Use memcpy() to copy known length strings dt-bindings: add self-test fixtures for style checker dt-bindings: wire style checker into dt_binding_check scripts/jobserver-exec: propagate child exit status dt-bindings: add DTS style checker ... 
Pull devicetree updates from Rob Herring:
 "DT core:

   - Add support for handling multiple cells in "iommu-map" entries

   - Support only 1 entry in /reserved-memory "reg" entries. Support for
     more than 1 entry has been broken

   - Fix a UAF on alloc_reserved_mem_array() failure

   - Make "ibm,phandle" handling logic specific to PPC

   - Use memcpy() instead of strcpy() for known length strings

   - Ensure __of_find_n_match_cpu_property() handles malformed "reg"
     entries

   - Add various checks that expected strings are strings before
     accessing them

   - Drop redundant memset() when unflattening DT

  DT bindings:

   - Add a DTS style checker. Currently hooked up to dt_binding_check to
     check examples

   - Convert st,nomadik platform, ti,omap-dmm, and ti,irq-crossbar
     bindings to DT schema

   - Add Apple System Management Controller hwmon, Qualcomm Hamoa
     Embedded Controller, Qualcomm IPQ6018 PWM controller, fsl,mc1323,
     Samsung SOFEF01-M DDIC panel, Freescale i.MX53 Television Encoder,
     Samsung S2M series PMIC extcon, and MT6365 PMIC AuxADC schemas

   - Extend bindings for QCom Maili and Nord PDC, QCom Hali fastrpc,
     qcom,eliza-imem, qcom,oryon-1-5 CPU, and MT6365 Keys

   - Consolidate "sram" property definitions

   - Fix constraints on "nvmem" properties which only contain phandles
     and no arg cells

   - Another pass of fixing "phandle-array" constraints

   - Add Gira vendor prefix"

* tag 'devicetree-for-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits)
  dt-bindings: interrupt-controller: qcom,pdc: Add Maili compatible string
  dt-bindings: interrupt-controller: ti,irq-crossbar: Convert to DT schema
  dt-bindings: vendor-prefixes: add Gira
  dt-bindings: embedded-controller: Add Qualcomm reference device EC description
  dt-bindings: pwm: add IPQ6018 binding
  dt-bindings: hwmon: Add Apple System Management Controller hwmon schema
  docs: dt: writing-schema: Clarify what is required in a schema
  of: Respect #{iommu,msi}-cells in maps
  of: Factor arguments passed to of_map_id() into a struct
  of: Add convenience wrappers for of_map_id()
  of: reserved_mem: zero total_reserved_mem_cnt if no valid /reserved-memory entry
  of: reserved_mem: handle NULL name in of_reserved_mem_lookup()
  dt-bindings: cache: l2c2x0: Add missing power-domains
  dt-bindings: interrupt-controller: renesas,r9a09g077-icu: Fix reg size in example
  dt-bindings: nvmem: consumer: Make 'nvmem' an array of one-item entries
  drivers/of/overlay: Use memcpy() to copy known length strings
  dt-bindings: add self-test fixtures for style checker
  dt-bindings: wire style checker into dt_binding_check
  scripts/jobserver-exec: propagate child exit status
  dt-bindings: add DTS style checker
  ...
Merge tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2026-06-17T18:16:56+00:00 Linus Torvalds torvalds@linux-foundation.org 2026-06-17T18:16:56+00:00 aab799b1bdd1ff3e6912f96e66c910b8a5d011bb Pull SoC devicetree updates from Arnd Bergmann: "There are fewer devicetree updates this time that the last few ones, with five SoC types getting added: - Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using four Cortex-A55 and one Cortex-A78 core, which is a significant upgrade from older generations - ZTE zx297520v3 is an older low-end wireless SoC using a single Cortex-A53 core, which so far can only run 32-bit kernels. This brings back the ZX family of chips that was removed in 2021 after support for the original zx296702 and zx296718 chips was never completed. - Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N (R8A77965) automotive SoC. - Apple t8122 (M3) is the 2023 generation of their laptop SoCs, which has now been reverse-engineered to the point of having initial kernel support for five laptop models. - ASPEED AST27xx is their first baseboard managment controller using a 64-bit core, the Cortex-A35, following earlier generations using ARMv5/v6/v7 CPUs. These all come with one or more initial boards, and in total there are 39 new boards getting added across SoC families, including: - Two NAS boxes using the old Cortina Systems Gemini SoC based on an ARMv4 FA526 CPU core - 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A SoCs from Variscite, Toradex and SolidRun, plus a number of overlays for combinations with additional boards - One new carrier board and SoM using TI K3 AM62x, in addition to new overlays for older SoMs - Two new boards using Spacemit K3 (no relation with TI) RISC-V SoCs. - Three phones from Google, Nothing and Motorola, all using Qualcomm Snapdragon SoCs - AST26xx BMC support for two server boards While there is still a significant number of patches improving hardware support for the existing boards across vendors (NXP, Qualcomm, Renesas, Rockchips, Mediatek, ...), a much smaller number of cleanups and warning fixes have made it in this time" * tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (665 commits) arm64: dts: aspeed: Fix duplicate pinctrl labels and address scheme arm64: dts: bst: enable eMMC controller in C1200 dt-bindings: display/lvds-codec: add ti,sn65lvds93 arm64: dts: allwinner: a523: Add missing GPIO interrupt arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap arm64: dts: aspeed: Add initial AST27xx SoC device tree arm64: Kconfig: Add ASPEED SoC family Kconfig support dt-bindings: arm: aspeed: Add AST2700 board compatible arm64: dts: allwinner: a523: add gpadc node arm64: dts: allwinner: Add EL2 virtual timer interrupt ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays arm64: dts: imx93-var-som-symphony: enable ADC arm64: dts: imx93-var-som-symphony: enable TPM3 PWM arm64: dts: imx93-var-som-symphony: keep RGB_SEL low arm64: dts: imx93-var-som-symphony: enable UART7 arm64: dts: imx93-var-som-symphony: add TPM support arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling ... 
Pull SoC devicetree updates from Arnd Bergmann:
 "There are fewer devicetree updates this time that the last few ones,
  with five SoC types getting added:

   - Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using
     four Cortex-A55 and one Cortex-A78 core, which is a significant
     upgrade from older generations

   - ZTE zx297520v3 is an older low-end wireless SoC using a single
     Cortex-A53 core, which so far can only run 32-bit kernels. This
     brings back the ZX family of chips that was removed in 2021 after
     support for the original zx296702 and zx296718 chips was never
     completed.

   - Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N
     (R8A77965) automotive SoC.

   - Apple t8122 (M3) is the 2023 generation of their laptop SoCs, which
     has now been reverse-engineered to the point of having initial
     kernel support for five laptop models.

   - ASPEED AST27xx is their first baseboard managment controller using
     a 64-bit core, the Cortex-A35, following earlier generations using
     ARMv5/v6/v7 CPUs.

  These all come with one or more initial boards, and in total there are
  39 new boards getting added across SoC families, including:

   - Two NAS boxes using the old Cortina Systems Gemini SoC based on an
     ARMv4 FA526 CPU core

   - 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A SoCs
     from Variscite, Toradex and SolidRun, plus a number of overlays for
     combinations with additional boards

   - One new carrier board and SoM using TI K3 AM62x, in addition to new
     overlays for older SoMs

   - Two new boards using Spacemit K3 (no relation with TI) RISC-V SoCs.

   - Three phones from Google, Nothing and Motorola, all using Qualcomm
     Snapdragon SoCs

   - AST26xx BMC support for two server boards

  While there is still a significant number of patches improving
  hardware support for the existing boards across vendors (NXP,
  Qualcomm, Renesas, Rockchips, Mediatek, ...), a much smaller number
  of cleanups and warning fixes have made it in this time"

* tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (665 commits)
  arm64: dts: aspeed: Fix duplicate pinctrl labels and address scheme
  arm64: dts: bst: enable eMMC controller in C1200
  dt-bindings: display/lvds-codec: add ti,sn65lvds93
  arm64: dts: allwinner: a523: Add missing GPIO interrupt
  arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap
  arm64: dts: aspeed: Add initial AST27xx SoC device tree
  arm64: Kconfig: Add ASPEED SoC family Kconfig support
  dt-bindings: arm: aspeed: Add AST2700 board compatible
  arm64: dts: allwinner: a523: add gpadc node
  arm64: dts: allwinner: Add EL2 virtual timer interrupt
  ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node
  dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties
  dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties
  arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays
  arm64: dts: imx93-var-som-symphony: enable ADC
  arm64: dts: imx93-var-som-symphony: enable TPM3 PWM
  arm64: dts: imx93-var-som-symphony: keep RGB_SEL low
  arm64: dts: imx93-var-som-symphony: enable UART7
  arm64: dts: imx93-var-som-symphony: add TPM support
  arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling
  ...
dt-bindings: display/lvds-codec: add ti,sn65lvds93 2026-06-11T14:40:09+00:00 Hugo Villeneuve hvilleneuve@dimonoff.com 2026-03-05T18:06:29+00:00 88c0120853e96b66d57eff33e06409f49457eec5 Add compatible string for TI SN65LVDS93. Similar to SN65LVDS83 but with an industrial temperature range. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> 
Add compatible string for TI SN65LVDS93. Similar to
SN65LVDS83 but with an industrial temperature range.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
dt-bindings: display: bridge: lt9211: Require data-lanes on DSI input ports 2026-05-08T12:04:47+00:00 Marek Vasut marex@nabladev.com 2026-04-07T20:31:03+00:00 c2738d88b624a977e42a1734fad4b15993ac354a The Lontium LT9211 is capable of 1..4 DSI lanes per input DSI port, describe the lane count for each input port in the schema. For example Linux kernel driver does already use that information and fails to probe if it is missing. Signed-off-by: Marek Vasut <marex@nabladev.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260407203109.34302-1-marex@nabladev.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> 
The Lontium LT9211 is capable of 1..4 DSI lanes per input DSI port,
describe the lane count for each input port in the schema.

For example Linux kernel driver does already use that information and
fails to probe if it is missing.

Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260407203109.34302-1-marex@nabladev.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
dt-bindings: display: bridge: ssd2825: inherit dsi-controller properties 2026-05-05T15:31:50+00:00 Svyatoslav Ryhel clamor95@gmail.com 2026-04-17T06:46:57+00:00 ce154baa18083202abd685c00141c5144631ffba SSD2825 being RGB-DSI bridge should inherit dsi-controller properties same way other DSI controllers and DSI bridges do. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260417064657.20293-2-clamor95@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> 
SSD2825 being RGB-DSI bridge should inherit dsi-controller properties same
way other DSI controllers and DSI bridges do.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260417064657.20293-2-clamor95@gmail.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Merge drm/drm-next into drm-misc-next 2026-04-27T08:49:13+00:00 Thomas Zimmermann tzimmermann@suse.de 2026-04-27T08:49:13+00:00 cafac16b6207b88ad92fbba1169ae4f43865cb0d Getting fixes and updates from v7.1-rc1. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> 
Getting fixes and updates from v7.1-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
dt-bindigs: display: extend the simple bridge with MStar TSUMU88ADT3-LF-1 bridge 2026-04-22T19:35:41+00:00 Svyatoslav Ryhel clamor95@gmail.com 2026-04-17T06:49:52+00:00 147782489b48e7bda472151cee48985d6704a919 A simple bridge used in ASUS Transformer AiO P1801-T. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Robert Foss <rfoss@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260417064953.20511-3-clamor95@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> 
A simple bridge used in ASUS Transformer AiO P1801-T.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260417064953.20511-3-clamor95@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
dt-bindigs: display: extend the LVDS codec with Triple 10-BIT LVDS Transmitter 2026-04-22T19:35:41+00:00 David Heidelberg david@ixit.cz 2026-04-17T06:49:51+00:00 f7e677a23701a95e71569be88759bf195fd9a42d LVDS transmitter used in the Microsoft Surface RT. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Robert Foss <rfoss@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260417064953.20511-2-clamor95@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> 
LVDS transmitter used in the Microsoft Surface RT.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260417064953.20511-2-clamor95@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>