<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/Documentation/devicetree/bindings/clock, branch v6.8</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>dt-bindings: clock: gs101: rename cmu_misc clock-names</title>
<updated>2024-01-22T10:38:31+00:00</updated>
<author>
<name>Tudor Ambarus</name>
<email>tudor.ambarus@linaro.org</email>
</author>
<published>2024-01-09T11:49:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1755c4b0372a2cf1e7124956b8cfebcb51083208'/>
<id>1755c4b0372a2cf1e7124956b8cfebcb51083208</id>
<content type='text'>
'bus' and 'ip' are sufficient because naming is local to the module.
As the bindings have not made a release yet, rename the cmu_misc
clock-names.

Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Suggested-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20240109114908.3623645-2-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
'bus' and 'ip' are sufficient because naming is local to the module.
As the bindings have not made a release yet, rename the cmu_misc
clock-names.

Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Suggested-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20240109114908.3623645-2-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2024-01-12T23:05:30+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-01-12T23:05:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=38814330fedd778edffcabe0c8cb462ee365782e'/>
<id>38814330fedd778edffcabe0c8cb462ee365782e</id>
<content type='text'>
Pull devicetree updates from Rob Herring:

 - Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings
   to schemas

 - Improvements in Samsung GPU schemas

 - A few more cases of dropping unneeded quotes in schemas

 - Merge QCom idle-states txt binding into common idle-states schema

 - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain
   Controller

 - Add NXP i.mx8dl to SCU PD

 - Add synaptics r63353 panel controller

 - Clarify the wording around the use of 'wakeup-source' property

 - Add a DTS coding style doc

 - Add smi vendor prefix

 - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel
   tree

 - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present

 - Fix double free in of_parse_phandle_with_args_map()

 - A couple of kerneldoc fixes

* tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (37 commits)
  of: unittest: Fix of_count_phandle_with_args() expected value message
  dt-bindings: fpga: altera: Convert bridge bindings to yaml
  dt-bindings: fpga: Convert bridge binding to yaml
  dt-bindings: vendor-prefixes: Add smi
  dt-bindings: power: Clarify wording for wakeup-source property
  of: Fix double free in of_parse_phandle_with_args_map
  dt-bindings: ignore paths outside kernel for DT_SCHEMA_FILES
  drivers: of: Fixed kernel doc warning
  dt-bindings: tpm: Document Microsoft fTPM bindings
  dt-bindings: tpm: Convert IBM vTPM bindings to DT schema
  dt-bindings: tpm: Convert Google Cr50 bindings to DT schema
  dt-bindings: tpm: Consolidate TCG TIS bindings
  dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible
  dt-bindings: arm: Add remote etm dt-binding
  dt-bindings: mmc: sdhci-pxa: Fix 'regs' typo
  media: dt-bindings: samsung,s5p-mfc: Fix iommu properties schemas
  dt-bindings: display: panel: Add synaptics r63353 panel controller
  dt-bindings: arm: merge qcom,idle-state with idle-state
  dt-bindings: drm: rockchip: convert inno_hdmi-rockchip.txt to yaml
  dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull devicetree updates from Rob Herring:

 - Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings
   to schemas

 - Improvements in Samsung GPU schemas

 - A few more cases of dropping unneeded quotes in schemas

 - Merge QCom idle-states txt binding into common idle-states schema

 - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain
   Controller

 - Add NXP i.mx8dl to SCU PD

 - Add synaptics r63353 panel controller

 - Clarify the wording around the use of 'wakeup-source' property

 - Add a DTS coding style doc

 - Add smi vendor prefix

 - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel
   tree

 - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present

 - Fix double free in of_parse_phandle_with_args_map()

 - A couple of kerneldoc fixes

* tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (37 commits)
  of: unittest: Fix of_count_phandle_with_args() expected value message
  dt-bindings: fpga: altera: Convert bridge bindings to yaml
  dt-bindings: fpga: Convert bridge binding to yaml
  dt-bindings: vendor-prefixes: Add smi
  dt-bindings: power: Clarify wording for wakeup-source property
  of: Fix double free in of_parse_phandle_with_args_map
  dt-bindings: ignore paths outside kernel for DT_SCHEMA_FILES
  drivers: of: Fixed kernel doc warning
  dt-bindings: tpm: Document Microsoft fTPM bindings
  dt-bindings: tpm: Convert IBM vTPM bindings to DT schema
  dt-bindings: tpm: Convert Google Cr50 bindings to DT schema
  dt-bindings: tpm: Consolidate TCG TIS bindings
  dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible
  dt-bindings: arm: Add remote etm dt-binding
  dt-bindings: mmc: sdhci-pxa: Fix 'regs' typo
  media: dt-bindings: samsung,s5p-mfc: Fix iommu properties schemas
  dt-bindings: display: panel: Add synaptics r63353 panel controller
  dt-bindings: arm: merge qcom,idle-state with idle-state
  dt-bindings: drm: rockchip: convert inno_hdmi-rockchip.txt to yaml
  dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2024-01-12T21:42:35+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-01-12T21:42:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c736c9a9553f9cfcb1b03e65f91bc29fc6446fd3'/>
<id>c736c9a9553f9cfcb1b03e65f91bc29fc6446fd3</id>
<content type='text'>
Pull clk updates from Stephen Boyd:
 "Only a couple new SoCs have support added this time, primarily for
  Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
  of non-critical fixes and cleanups to various clk drivers and their DT
  bindings.

  Nothing is changed in the core clk framework this time, although
  there's a patch to fix a basic clk type initialization function. In
  general, this pile looks to be on the smaller side.

  New Drivers:
   - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
   - Mediatek MT7988 SoC clocks

  Updates:
   - Update Zynqmp driver for Versal NET platforms
   - Add clk driver for Versal clocking wizard IP
   - Support for stm32mp25 clks
   - Add glitch free PLL setting support to si5351 clk driver
   - Add DSI clocks on Amlogic g12/sm1
   - Add CSI and ISP clocks on Amlogic g12/sm1
   - Document bindings for i.MX93 ANATOP clock driver
   - Free clk_node in i.MX SCU driver for resource with different owner
   - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
   - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
   - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
   - Add interrupt controller and Ethernet clocks and resets on Renesas
     RZ/G3S
   - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
   - Reuse reset functionality in the Renesas RZ/G2L clock driver
   - Global and RPMh clock support for the Qualcomm X1E80100 SoC
   - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
   - Add a new type of branch clock, with support for controlling
     separate memory control bits, to the Qualcomm clk driver
   - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
     and QRU1000
   - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
   - Add support for the camera clock controller on Qualcomm SC8280XP
   - Correct PLL configuration in GPU and video clock controllers for
     Qualcomm SM8150
   - Add runtime PM support and a few missing resets to Qualcomm SM8150
     video clock controller
   - Fix configuration of various GCC GDSCs on Qualcomm SM8550
   - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
   - Fix up GPU and display clock controllers PLL configuration settings
     on Qualcomm SM8550
   - Cleanup variable init in Allwinner nkm module
   - Convert various DT bindings to YAML
   - A few kernel-doc fixes for Samsung SoC clock controllers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull clk updates from Stephen Boyd:
 "Only a couple new SoCs have support added this time, primarily for
  Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
  of non-critical fixes and cleanups to various clk drivers and their DT
  bindings.

  Nothing is changed in the core clk framework this time, although
  there's a patch to fix a basic clk type initialization function. In
  general, this pile looks to be on the smaller side.

  New Drivers:
   - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
   - Mediatek MT7988 SoC clocks

  Updates:
   - Update Zynqmp driver for Versal NET platforms
   - Add clk driver for Versal clocking wizard IP
   - Support for stm32mp25 clks
   - Add glitch free PLL setting support to si5351 clk driver
   - Add DSI clocks on Amlogic g12/sm1
   - Add CSI and ISP clocks on Amlogic g12/sm1
   - Document bindings for i.MX93 ANATOP clock driver
   - Free clk_node in i.MX SCU driver for resource with different owner
   - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
   - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
   - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
   - Add interrupt controller and Ethernet clocks and resets on Renesas
     RZ/G3S
   - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
   - Reuse reset functionality in the Renesas RZ/G2L clock driver
   - Global and RPMh clock support for the Qualcomm X1E80100 SoC
   - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
   - Add a new type of branch clock, with support for controlling
     separate memory control bits, to the Qualcomm clk driver
   - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
     and QRU1000
   - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
   - Add support for the camera clock controller on Qualcomm SC8280XP
   - Correct PLL configuration in GPU and video clock controllers for
     Qualcomm SM8150
   - Add runtime PM support and a few missing resets to Qualcomm SM8150
     video clock controller
   - Fix configuration of various GCC GDSCs on Qualcomm SM8550
   - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
   - Fix up GPU and display clock controllers PLL configuration settings
     on Qualcomm SM8550
   - Cleanup variable init in Allwinner nkm module
   - Convert various DT bindings to YAML
   - A few kernel-doc fixes for Samsung SoC clock controllers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-rs9' into clk-next</title>
<updated>2024-01-09T19:55:47+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-01-09T19:55:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4f964cfef39d48a8e6748847df9a1ed310b96c4e'/>
<id>4f964cfef39d48a8e6748847df9a1ed310b96c4e</id>
<content type='text'>
* clk-rs9:
  clk: rs9: Add support for 9FGV0841
  clk: rs9: Replace model check with bitshift from chip data
  clk: rs9: Limit check to vendor ID in VID register
  dt-bindings: clk: rs9: Add 9FGV0841
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-rs9:
  clk: rs9: Add support for 9FGV0841
  clk: rs9: Replace model check with bitshift from chip data
  clk: rs9: Limit check to vendor ID in VID register
  dt-bindings: clk: rs9: Add 9FGV0841
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next</title>
<updated>2024-01-09T19:55:06+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-01-09T19:55:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a4dcb2f84be44da9e7ae0e420adcab1f6efb8de6'/>
<id>a4dcb2f84be44da9e7ae0e420adcab1f6efb8de6</id>
<content type='text'>
 - Update Zynqmp driver for Versal NET platforms
 - Add clk driver for Versal clocking wizard IP

* clk-zynq:
  drivers: clk: zynqmp: update divider round rate logic
  drivers: clk: zynqmp: calculate closest mux rate

* clk-xilinx:
  clocking-wizard: Add support for versal clocking wizard
  dt-bindings: clock: xilinx: add versal compatible

* clk-stm:
  dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
  clk: stm32mp1: use stm32mp13 reset driver
  clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 - Update Zynqmp driver for Versal NET platforms
 - Add clk driver for Versal clocking wizard IP

* clk-zynq:
  drivers: clk: zynqmp: update divider round rate logic
  drivers: clk: zynqmp: calculate closest mux rate

* clk-xilinx:
  clocking-wizard: Add support for versal clocking wizard
  dt-bindings: clock: xilinx: add versal compatible

* clk-stm:
  dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
  clk: stm32mp1: use stm32mp13 reset driver
  clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next</title>
<updated>2024-01-09T19:52:49+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-01-09T19:52:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=23bd8c4ad182534ba4096ca657c27cdbe7a49aec'/>
<id>23bd8c4ad182534ba4096ca657c27cdbe7a49aec</id>
<content type='text'>
* clk-imx:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module

* clk-qcom: (41 commits)
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
  clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
  clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
  clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
  clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
  clk: qcom: videocc-sm8150: Add runtime PM support
  clk: qcom: videocc-sm8150: Add missing PLL config property
  clk: qcom: videocc-sm8150: Update the videocc resets
  dt-bindings: clock: Update the videocc resets for sm8150
  clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
  clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
  dt-bindings: clock: qcom: Add X1E80100 GCC clocks
  clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
  clk: qcom: branch: Add mem ops support for branch2 clocks
  ...

* clk-amlogic:
  clk: meson: g12a: add CSI &amp; ISP gates clocks
  clk: meson: g12a: add MIPI ISP clocks
  dt-bindings: clock: g12a-clkc: add MIPI ISP &amp; CSI PHY clock ids
  clk: meson: g12a: add CTS_ENCL &amp; CTS_ENCL_SEL clocks
  dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids

* clk-mediatek:
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: brcm,kona-ccu: convert to YAML
  dt-bindings: arm: mediatek: move ethsys controller &amp; convert to DT schema
  dt-bindings: Remove alt_ref from versal
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-imx:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module

* clk-qcom: (41 commits)
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
  clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
  clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
  clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
  clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
  clk: qcom: videocc-sm8150: Add runtime PM support
  clk: qcom: videocc-sm8150: Add missing PLL config property
  clk: qcom: videocc-sm8150: Update the videocc resets
  dt-bindings: clock: Update the videocc resets for sm8150
  clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
  clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
  dt-bindings: clock: qcom: Add X1E80100 GCC clocks
  clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
  clk: qcom: branch: Add mem ops support for branch2 clocks
  ...

* clk-amlogic:
  clk: meson: g12a: add CSI &amp; ISP gates clocks
  clk: meson: g12a: add MIPI ISP clocks
  dt-bindings: clock: g12a-clkc: add MIPI ISP &amp; CSI PHY clock ids
  clk: meson: g12a: add CTS_ENCL &amp; CTS_ENCL_SEL clocks
  dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids

* clk-mediatek:
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: brcm,kona-ccu: convert to YAML
  dt-bindings: arm: mediatek: move ethsys controller &amp; convert to DT schema
  dt-bindings: Remove alt_ref from versal
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-versa', 'clk-silabs', 'clk-samsung', 'clk-starfive' and 'clk-sophgo' into clk-next</title>
<updated>2024-01-09T19:52:35+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2024-01-09T19:52:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8066514dc53dd649be6b24a7a92c3602d42357d7'/>
<id>8066514dc53dd649be6b24a7a92c3602d42357d7</id>
<content type='text'>
 - Add glitch free PLL setting support to si5351 clk driver

* clk-versa:
  clk: versaclock3: Drop ret variable
  clk: versaclock3: Add missing space between ')' and '{'
  clk: versaclock3: Use u8 return type for get_parent() callback
  clk: versaclock3: Avoid unnecessary padding
  clk: versaclock3: Update vc3_get_div() to avoid divide by zero

* clk-silabs:
  clk: si5351: allow PLLs to be adjusted without reset
  dt-bindings: clock: si5351: add PLL reset mode property
  dt-bindings: clock: si5351: convert to yaml

* clk-samsung:
  clk: samsung: Improve kernel-doc comments
  clk: samsung: Fix kernel-doc comments

* clk-starfive:
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro

* clk-sophgo:
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 - Add glitch free PLL setting support to si5351 clk driver

* clk-versa:
  clk: versaclock3: Drop ret variable
  clk: versaclock3: Add missing space between ')' and '{'
  clk: versaclock3: Use u8 return type for get_parent() callback
  clk: versaclock3: Avoid unnecessary padding
  clk: versaclock3: Update vc3_get_div() to avoid divide by zero

* clk-silabs:
  clk: si5351: allow PLLs to be adjusted without reset
  dt-bindings: clock: si5351: add PLL reset mode property
  dt-bindings: clock: si5351: convert to yaml

* clk-samsung:
  clk: samsung: Improve kernel-doc comments
  clk: samsung: Fix kernel-doc comments

* clk-starfive:
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro

* clk-sophgo:
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: mediatek: add clock controllers of MT7988</title>
<updated>2024-01-03T23:55:17+00:00</updated>
<author>
<name>Daniel Golle</name>
<email>daniel@makrotopia.org</email>
</author>
<published>2023-12-17T21:49:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=afd36e9d91b0a840983b829a9e95407d8151f7e7'/>
<id>afd36e9d91b0a840983b829a9e95407d8151f7e7</id>
<content type='text'>
Add various clock controllers found in the MT7988 SoC to existing
bindings (if applicable) and add files for the new ethwarp, mcusys
and xfi-pll clock controllers not previously present in any SoC.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/07e76a544ce4392bcb88e34d5480e99bb7994618.1702849494.git.daniel@makrotopia.org
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add various clock controllers found in the MT7988 SoC to existing
bindings (if applicable) and add files for the new ethwarp, mcusys
and xfi-pll clock controllers not previously present in any SoC.

Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/07e76a544ce4392bcb88e34d5480e99bb7994618.1702849494.git.daniel@makrotopia.org
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC</title>
<updated>2024-01-03T23:52:52+00:00</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2023-12-18T04:04:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5a72f0711151b5ccdd14e22ff5f2ba3605483a95'/>
<id>5a72f0711151b5ccdd14e22ff5f2ba3605483a95</id>
<content type='text'>
Add definition for the clock controller of the CV1800 series SoC.

For CV181X, it has a clock that CV180X does not have. To avoid misuse,
also add a compatible string to identify CV181X series SoC.

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add definition for the clock controller of the CV1800 series SoC.

For CV181X, it has a clock that CV180X does not have. To avoid misuse,
also add a compatible string to identify CV181X series SoC.

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt</title>
<updated>2023-12-22T11:45:31+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2023-12-22T11:45:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2d7123c7e1678a01901887562f88890f39d1a51c'/>
<id>2d7123c7e1678a01901887562f88890f39d1a51c</id>
<content type='text'>
Qualcomm ARM64 updates for v6.8

Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.

On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.

CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.

Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.

MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.

Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.

Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.

UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.

On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.

On SA8775P tsens and thermal is added, as well as the random number
generator.

Sound and RTC support is added for the Acer Aspire 1.

On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.

A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.

On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.

The display subsystem in SDM670 is described.

On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.

On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.

The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.

On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.

GPU and random number generator support are added to SM8450, and enabled
on the HDK board.

On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.

Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.

* tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits)
  arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
  arm64: dts: qcom: sc8180x: Describe the GIC redistributor
  arm64: dts: qcom: sc8180x: Add interconnects to UFS
  arm64: dts: qcom: sc8180x: Add missing MDP clocks
  arm64: dts: qcom: sc8180x: Add UFS GDSC
  arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
  arm64: dts: qcom: sc7280: Rename reserved-memory nodes
  arm64: dts: qcom: sc7280: Remove unused second MPSS reg
  arm64: dts: qcom: sdm670: add display subsystem
  arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode
  arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host
  arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY
  arm64: dts: qcom: sm8150: add DisplayPort controller
  arm64: dts: qcom: sm8150-hdk: fix SS USB regulators
  arm64: dts: qcom: sm8150-hdk: enable HDMI output
  arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX
  arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes
  arm64: dts: qcom: sm8550-qrd: add PM8010 regulators
  arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators
  arm64: dts: qcom: qcm2290: Hook up MPM
  ...

Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Qualcomm ARM64 updates for v6.8

Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.

On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.

CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.

Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.

MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.

Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.

Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.

UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.

On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.

On SA8775P tsens and thermal is added, as well as the random number
generator.

Sound and RTC support is added for the Acer Aspire 1.

On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.

A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.

On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.

The display subsystem in SDM670 is described.

On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.

On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.

The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.

On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.

GPU and random number generator support are added to SM8450, and enabled
on the HDK board.

On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.

Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.

* tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits)
  arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
  arm64: dts: qcom: sc8180x: Describe the GIC redistributor
  arm64: dts: qcom: sc8180x: Add interconnects to UFS
  arm64: dts: qcom: sc8180x: Add missing MDP clocks
  arm64: dts: qcom: sc8180x: Add UFS GDSC
  arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
  arm64: dts: qcom: sc7280: Rename reserved-memory nodes
  arm64: dts: qcom: sc7280: Remove unused second MPSS reg
  arm64: dts: qcom: sdm670: add display subsystem
  arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode
  arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host
  arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY
  arm64: dts: qcom: sm8150: add DisplayPort controller
  arm64: dts: qcom: sm8150-hdk: fix SS USB regulators
  arm64: dts: qcom: sm8150-hdk: enable HDMI output
  arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX
  arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes
  arm64: dts: qcom: sm8550-qrd: add PM8010 regulators
  arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators
  arm64: dts: qcom: qcm2290: Hook up MPM
  ...

Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
