linux.git/Documentation/devicetree/bindings/clock, branch v5.10 Linux kernel source tree dt-bindings: clock: imx5: fix example 2020-11-13T14:49:59+00:00 Marc Kleine-Budde mkl@pengutronix.de 2020-11-11T21:35:48+00:00 bdac39a3bd28891fb0ded91c9152459c57773462 Since commit: 0e030a373df3 ("can: flexcan: fix endianess detection") the fsl,imx53-flexcan isn't compatible with the fsl,p1010-flexcan any more. As the former accesses the IP core in Little Endian mode and the latter uses Big Endian mode. With the conversion of the flexcan DT bindings to yaml, the dt_binding_check this throws the following error: Documentation/devicetree/bindings/clock/imx5-clock.example.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx53-flexcan', 'fsl,p1010-flexcan'] is too long Additional items are not allowed ('fsl,p1010-flexcan' was unexpected) 'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan'] 'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan'] 'fsl,imx6q-flexcan' was expected 'fsl,lx2160ar1-flexcan' was expected From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml The error is fixed by replacing the "fsl,p1010-flexcan" compatible (which turned out the be incompatible) with "fsl,imx25-flexcan" in the binding example. Reported-by: Rob Herring <robh+dt@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20201111213548.1621094-1-mkl@pengutronix.de [robh: Add "fsl,imx25-flexcan" as fallback] Signed-off-by: Rob Herring <robh@kernel.org> 
Since commit:

    0e030a373df3 ("can: flexcan: fix endianess detection")

the fsl,imx53-flexcan isn't compatible with the fsl,p1010-flexcan any more. As
the former accesses the IP core in Little Endian mode and the latter uses Big
Endian mode.

With the conversion of the flexcan DT bindings to yaml, the dt_binding_check
this throws the following error:

Documentation/devicetree/bindings/clock/imx5-clock.example.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed:
	['fsl,imx53-flexcan', 'fsl,p1010-flexcan'] is too long
	Additional items are not allowed ('fsl,p1010-flexcan' was unexpected)
	'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan']
	'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan']
	'fsl,imx6q-flexcan' was expected
	'fsl,lx2160ar1-flexcan' was expected
	From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml

The error is fixed by replacing the "fsl,p1010-flexcan" compatible
(which turned out the be incompatible) with "fsl,imx25-flexcan" in the
binding example.

Reported-by: Rob Herring <robh+dt@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20201111213548.1621094-1-mkl@pengutronix.de
[robh: Add "fsl,imx25-flexcan" as fallback]
Signed-off-by: Rob Herring <robh@kernel.org>
MAINTAINERS: fix broken doc refs due to yaml conversion 2020-10-28T17:41:15+00:00 Mauro Carvalho Chehab mchehab+huawei@kernel.org 2020-10-27T09:51:21+00:00 ef900cccb864d72292b6f5564850d157036905ea Several *.txt files got converted to yaml. Update their references at MAINTAINERS file accordingly. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/3b58afec5195d4ea505ea9b3f74d53f7abed4e6f.1603791716.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net> 
Several *.txt files got converted to yaml. Update their
references at MAINTAINERS file accordingly.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/3b58afec5195d4ea505ea9b3f74d53f7abed4e6f.1603791716.git.mchehab+huawei@kernel.org
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 2020-10-22T19:53:28+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-10-22T19:53:28+00:00 3fec0eaaf04adf5e23b2704f5490d5943fb8b0b1 Pull clk updates from Stephen Boyd: "This contains no changes to the core framework. It is a collection of various clk driver updates. The biggest driver updates in terms of lines of code is the Allwinner driver, closely followed by the Qualcomm and Mediatek drivers. All of those hit high because we add so many lines of clk data. Coming in fourth place is i.MX which also adds a bunch of clk data. This accounts for the new driver additions this time around. Otherwise the patches are lots of little cleanups and fixes for various clk drivers that have baked in linux-next for a while. I suppose one highlight or theme is that more clk drivers are being updated to work as modules, which is interesting to see such critical SoC infrastructure work as a loadable module. New Drivers: - Support qcom SM8150/SM8250 video and display clks - Support Mediatek MT8167 clks - Add clock for CRC block found on vf610 SoCs - Add support for the Renesas R-Car V3U (R8A779A0) SoC - Add support for the VSP for Resizing clock on Renesas RZ/G1H - Support Allwinner A100 SoC clks Removed Drivers: - Remove i.MX21 clock driver, as i.MX21 platform support is being dropped Updates: - Change how qcom's display port clks work - Small non-critical fixes for TI clk driver - Remove various unused variables in clk drivers - Allow Rockchip clk driver to be a module - Remove most __clk_lookup() calls in Samsung drivers (yay!) - Support building i.MX ARMv8 platforms clock driver as module - Some kerneldoc fixes here and there - A couple of minor i.MX clk data corrections - Update audio clock inverter and fdiv2 flag on Amlogic g12 - Make amlogic clk drivers configurable in Kconfig - Fix Renesas VSP clock names to match corrected hardware documentation - Sigma-delta modulation on Allwinner R40 - Various fixes for at91 clk driver - Use semicolons instead of commas in some places - Mark some variables const so they can move to RO memory" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (102 commits) clk: imx8mq: Fix usdhc parents order clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on clk: Restrict CLK_HSDK to ARC_SOC_HSDK clk: at91: sam9x60: support only two programmable clocks clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL clk: ingenic: Use readl_poll_timeout instead of custom loop clk: ingenic: Use to_clk_info() macro for all clocks clk: bcm2835: add missing release if devm_clk_hw_register fails clk: at91: clk-sam9x60-pll: remove unused variable clk: at91: clk-main: update key before writing AT91_CKGR_MOR clk: at91: remove the checking of parent_name clk: clk-prima2: fix return value check in prima2_clk_init() clk: mmp2: Fix the display clock divider base clk: pxa: Constify static struct clk_ops clk: baikal-t1: Mark Ethernet PLL as critical clk: qoriq: modify MAX_PLL_DIV to 32 clk: axi-clkgen: Set power bits for fractional mode clk: axi-clkgen: Add support for fractional dividers ... 
Pull clk updates from Stephen Boyd:
 "This contains no changes to the core framework. It is a collection of
  various clk driver updates.

  The biggest driver updates in terms of lines of code is the Allwinner
  driver, closely followed by the Qualcomm and Mediatek drivers. All of
  those hit high because we add so many lines of clk data. Coming in
  fourth place is i.MX which also adds a bunch of clk data. This
  accounts for the new driver additions this time around.

  Otherwise the patches are lots of little cleanups and fixes for
  various clk drivers that have baked in linux-next for a while. I
  suppose one highlight or theme is that more clk drivers are being
  updated to work as modules, which is interesting to see such critical
  SoC infrastructure work as a loadable module.

  New Drivers:
   - Support qcom SM8150/SM8250 video and display clks
   - Support Mediatek MT8167 clks
   - Add clock for CRC block found on vf610 SoCs
   - Add support for the Renesas R-Car V3U (R8A779A0) SoC
   - Add support for the VSP for Resizing clock on Renesas RZ/G1H
   - Support Allwinner A100 SoC clks

  Removed Drivers:
   - Remove i.MX21 clock driver, as i.MX21 platform support is being
     dropped

  Updates:
   - Change how qcom's display port clks work
   - Small non-critical fixes for TI clk driver
   - Remove various unused variables in clk drivers
   - Allow Rockchip clk driver to be a module
   - Remove most __clk_lookup() calls in Samsung drivers (yay!)
   - Support building i.MX ARMv8 platforms clock driver as module
   - Some kerneldoc fixes here and there
   - A couple of minor i.MX clk data corrections
   - Update audio clock inverter and fdiv2 flag on Amlogic g12
   - Make amlogic clk drivers configurable in Kconfig
   - Fix Renesas VSP clock names to match corrected hardware
     documentation
   - Sigma-delta modulation on Allwinner R40
   - Various fixes for at91 clk driver
   - Use semicolons instead of commas in some places
   - Mark some variables const so they can move to RO memory"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (102 commits)
  clk: imx8mq: Fix usdhc parents order
  clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on
  clk: Restrict CLK_HSDK to ARC_SOC_HSDK
  clk: at91: sam9x60: support only two programmable clocks
  clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
  clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
  clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
  clk: ingenic: Use readl_poll_timeout instead of custom loop
  clk: ingenic: Use to_clk_info() macro for all clocks
  clk: bcm2835: add missing release if devm_clk_hw_register fails
  clk: at91: clk-sam9x60-pll: remove unused variable
  clk: at91: clk-main: update key before writing AT91_CKGR_MOR
  clk: at91: remove the checking of parent_name
  clk: clk-prima2: fix return value check in prima2_clk_init()
  clk: mmp2: Fix the display clock divider base
  clk: pxa: Constify static struct clk_ops
  clk: baikal-t1: Mark Ethernet PLL as critical
  clk: qoriq: modify MAX_PLL_DIV to 32
  clk: axi-clkgen: Set power bits for fractional mode
  clk: axi-clkgen: Add support for fractional dividers
  ...
Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next 2020-10-20T18:47:07+00:00 Stephen Boyd sboyd@kernel.org 2020-10-20T18:47:07+00:00 5f56888fad46812bab9ecb455d92da675ef4fbd0 - Support qcom SM8150/SM8250 video and display clks - Change how qcom's display port clks work * clk-ingenic: clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL clk: ingenic: Use readl_poll_timeout instead of custom loop clk: ingenic: Use to_clk_info() macro for all clocks * clk-at91: clk: at91: sam9x60: support only two programmable clocks clk: at91: clk-sam9x60-pll: remove unused variable clk: at91: clk-main: update key before writing AT91_CKGR_MOR clk: at91: remove the checking of parent_name * clk-kconfig: clk: Restrict CLK_HSDK to ARC_SOC_HSDK * clk-imx: clk: imx8mq: Fix usdhc parents order clk: imx: imx21: Remove clock driver clk: imx: gate2: Fix a few typos clk: imx: Fix and update kerneldoc clk: imx: fix i.MX7D peripheral clk mux flags clk: imx: fix composite peripheral flags clk: imx: Correct the memrepair clock on imx8mp clk: imx: Correct the root clk of media ldb on imx8mp clk: imx: vf610: Add CRC clock clk: imx: Explicitly include bits.h clk: imx8qxp: Support building i.MX8QXP clock driver as module clk: imx8m: Support module build clk: imx: Add clock configuration for ARMv7 platforms clk: imx: Support building i.MX common clock driver as module clk: composite: Export clk_hw_register_composite() clk: imx6sl: Use BIT(x) to avoid shifting signed 32-bit value by 31 bits * clk-qcom: clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on clk: qcom: Add display clock controller driver for SM8150 and SM8250 dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings clk: qcom: add video clock controller driver for SM8250 clk: qcom: add video clock controller driver for SM8150 dt-bindings: clock: add SM8250 QCOM video clock bindings dt-bindings: clock: add SM8150 QCOM video clock bindings dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs clk/qcom: fix spelling typo clk: qcom: gcc-sdm660: Fix wrong parent_map clk: qcom: dispcc: Update DP clk ops for phy design clk: qcom: gcc-msm8939: remove defined but not used variables clk: qcom: ipq8074: make pcie0_rchng_clk_src static * clk-prima2: clk: clk-prima2: fix return value check in prima2_clk_init() * clk-bcm: clk: bcm2835: add missing release if devm_clk_hw_register fails clk: bcm: rpi: Add register to control pixel bvb clk 
 - Support qcom SM8150/SM8250 video and display clks
 - Change how qcom's display port clks work

* clk-ingenic:
  clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
  clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
  clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
  clk: ingenic: Use readl_poll_timeout instead of custom loop
  clk: ingenic: Use to_clk_info() macro for all clocks

* clk-at91:
  clk: at91: sam9x60: support only two programmable clocks
  clk: at91: clk-sam9x60-pll: remove unused variable
  clk: at91: clk-main: update key before writing AT91_CKGR_MOR
  clk: at91: remove the checking of parent_name

* clk-kconfig:
  clk: Restrict CLK_HSDK to ARC_SOC_HSDK

* clk-imx:
  clk: imx8mq: Fix usdhc parents order
  clk: imx: imx21: Remove clock driver
  clk: imx: gate2: Fix a few typos
  clk: imx: Fix and update kerneldoc
  clk: imx: fix i.MX7D peripheral clk mux flags
  clk: imx: fix composite peripheral flags
  clk: imx: Correct the memrepair clock on imx8mp
  clk: imx: Correct the root clk of media ldb on imx8mp
  clk: imx: vf610: Add CRC clock
  clk: imx: Explicitly include bits.h
  clk: imx8qxp: Support building i.MX8QXP clock driver as module
  clk: imx8m: Support module build
  clk: imx: Add clock configuration for ARMv7 platforms
  clk: imx: Support building i.MX common clock driver as module
  clk: composite: Export clk_hw_register_composite()
  clk: imx6sl: Use BIT(x) to avoid shifting signed 32-bit value by 31 bits

* clk-qcom:
  clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on
  clk: qcom: Add display clock controller driver for SM8150 and SM8250
  dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings
  clk: qcom: add video clock controller driver for SM8250
  clk: qcom: add video clock controller driver for SM8150
  dt-bindings: clock: add SM8250 QCOM video clock bindings
  dt-bindings: clock: add SM8150 QCOM video clock bindings
  dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc
  clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs
  clk/qcom: fix spelling typo
  clk: qcom: gcc-sdm660: Fix wrong parent_map
  clk: qcom: dispcc: Update DP clk ops for phy design
  clk: qcom: gcc-msm8939: remove defined but not used variables
  clk: qcom: ipq8074: make pcie0_rchng_clk_src static

* clk-prima2:
  clk: clk-prima2: fix return value check in prima2_clk_init()

* clk-bcm:
  clk: bcm2835: add missing release if devm_clk_hw_register fails
  clk: bcm: rpi: Add register to control pixel bvb clk
Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner', 'clk-samsung', 'clk-doc' and 'clk-unused' into clk-next 2020-10-20T18:46:34+00:00 Stephen Boyd sboyd@kernel.org 2020-10-20T18:46:34+00:00 9d3261628aa6338fe153d4d5d1e65f5caed87f01 - Remove various unused variables in clk drivers * clk-renesas: clk: renesas: rcar-gen3: Update description for RZ/G2 clk: renesas: cpg-mssr: Add support for R-Car V3U clk: renesas: cpg-mssr: Add register pointers into struct cpg_mssr_priv clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag dt-bindings: clock: renesas,cpg-mssr: Document r8a779a0 dt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions dt-bindings: power: Add r8a779a0 SYSC power domain definitions clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) clk: renesas: r8a7742: Add clk entry for VSPR * clk-amlogic: clk: meson: make shipped controller configurable clk: meson: g12a: mark fclk_div2 as critical clk: meson: axg-audio: fix g12a tdmout sclk inverter clk: meson: axg-audio: separate axg and g12a regmap tables clk: meson: add sclk-ws driver * clk-allwinner: clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for audio PLL clk: sunxi-ng: add support for the Allwinner A100 CCU dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and R-CCU * clk-samsung: clk: s2mps11: initialize driver via module_platform_driver clk: samsung: Use cached clk_hws instead of __clk_lookup() calls clk: samsung: exynos5420/5250: Add IDs to the CPU parent clk definitions clk: samsung: Add clk ID definitions for the CPU parent clocks clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocks clk: samsung: exynos5420: Add definition of clock ID for mout_sw_aclk_g3d clk: samsung: Keep top BPLL mux on Exynos542x enabled * clk-doc: clk: davinci: add missing kerneldoc clk: fixed: add missing kerneldoc * clk-unused: clk: socfpga: agilex: Remove unused variable 'cntr_mux' clk: si5341: drop unused 'err' variable clk: mmp: pxa1928: drop unused 'clk' variable clk: at91: drop unused at91sam9g45_pcr_layout 
 - Remove various unused variables in clk drivers

* clk-renesas:
  clk: renesas: rcar-gen3: Update description for RZ/G2
  clk: renesas: cpg-mssr: Add support for R-Car V3U
  clk: renesas: cpg-mssr: Add register pointers into struct cpg_mssr_priv
  clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag
  dt-bindings: clock: renesas,cpg-mssr: Document r8a779a0
  dt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779a0 SYSC power domain definitions
  clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
  clk: renesas: r8a7742: Add clk entry for VSPR

* clk-amlogic:
  clk: meson: make shipped controller configurable
  clk: meson: g12a: mark fclk_div2 as critical
  clk: meson: axg-audio: fix g12a tdmout sclk inverter
  clk: meson: axg-audio: separate axg and g12a regmap tables
  clk: meson: add sclk-ws driver

* clk-allwinner:
  clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for audio PLL
  clk: sunxi-ng: add support for the Allwinner A100 CCU
  dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and R-CCU

* clk-samsung:
  clk: s2mps11: initialize driver via module_platform_driver
  clk: samsung: Use cached clk_hws instead of __clk_lookup() calls
  clk: samsung: exynos5420/5250: Add IDs to the CPU parent clk definitions
  clk: samsung: Add clk ID definitions for the CPU parent clocks
  clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocks
  clk: samsung: exynos5420: Add definition of clock ID for mout_sw_aclk_g3d
  clk: samsung: Keep top BPLL mux on Exynos542x enabled

* clk-doc:
  clk: davinci: add missing kerneldoc
  clk: fixed: add missing kerneldoc

* clk-unused:
  clk: socfpga: agilex: Remove unused variable 'cntr_mux'
  clk: si5341: drop unused 'err' variable
  clk: mmp: pxa1928: drop unused 'clk' variable
  clk: at91: drop unused at91sam9g45_pcr_layout
Merge tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 2020-10-14T22:31:58+00:00 Linus Torvalds torvalds@linux-foundation.org 2020-10-14T22:31:58+00:00 f888bdf9823c85fe945c4eb3ba353f749dec3856 Pull devicetree updates from Rob Herring: - Update dtc to upstream version v1.6.0-31-gcbca977ea121 - dtx_diff help text reformatting - Speed-up validation time for binding and dtb checks using json for intermediate files - Add support for running yamllint on DT schema files - Remove old booting-without-of.rst - Extend the example schema to address common issues - Cleanup handling of additionalProperties/unevaluatedProperties - Ensure all DSI controller schemas reference dsi-controller.yaml - Vendor prefixes for Zealz, Wandbord/Technexion, Embest RIoT, Rex, DFI, and Cisco Meraki - Convert at25, SPMI bus, TI hwlock, HiSilicon Hi3660 USB3 PHY, Arm SP805 watchdog, Arm SP804, and Samsung 11-pin USB connector to DT schema - Convert HiSilicon SoC and syscon bindings to DT schema - Convert SiFive Risc-V L2 cache, PLIC, PRCI, and PWM to DT schema - Convert i.MX bindings for w1, crypto, rng, SIM, PM, DDR, SATA, vf610 GPIO, and UART to DT schema - Add i.MX 8M compatible strings - Add LM81 and DS1780 as trivial devices - Various missing properties added to fix dtb validation warnings * tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (111 commits) dt-bindings: misc: explicitly add #address-cells for slave mode spi: dt-bindings: spi-controller: explicitly require #address-cells=<0> for slave mode dt: Remove booting-without-of.rst dt-bindings: update usb-c-connector example dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml dt-bindings: pwm: imx: document i.MX compatibles scripts/dtc: Update to upstream version v1.6.0-31-gcbca977ea121 dt-bindings: Add running yamllint to dt_binding_check dt-bindings: powerpc: Add a schema for the 'sleep' property dt-bindings: pinctrl: sirf: Fix typo abitrary dt-bindings: pinctrl: qcom: Fix typo abitrary dt-bindings: Explicitly allow additional properties in common schemas dt-bindings: Use 'additionalProperties' instead of 'unevaluatedProperties' dt-bindings: Add missing 'unevaluatedProperties' Docs: Fixing spelling errors in Documentation/devicetree/bindings/ dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema dt-bindings: riscv: convert plic bindings to json-schema dt-bindings: fu540: prci: convert PRCI bindings to json-schema ... 
Pull devicetree updates from Rob Herring:

 - Update dtc to upstream version v1.6.0-31-gcbca977ea121

 - dtx_diff help text reformatting

 - Speed-up validation time for binding and dtb checks using json for
   intermediate files

 - Add support for running yamllint on DT schema files

 - Remove old booting-without-of.rst

 - Extend the example schema to address common issues

 - Cleanup handling of additionalProperties/unevaluatedProperties

 - Ensure all DSI controller schemas reference dsi-controller.yaml

 - Vendor prefixes for Zealz, Wandbord/Technexion, Embest RIoT, Rex,
   DFI, and Cisco Meraki

 - Convert at25, SPMI bus, TI hwlock, HiSilicon Hi3660 USB3 PHY, Arm
   SP805 watchdog, Arm SP804, and Samsung 11-pin USB connector to DT
   schema

 - Convert HiSilicon SoC and syscon bindings to DT schema

 - Convert SiFive Risc-V L2 cache, PLIC, PRCI, and PWM to DT schema

 - Convert i.MX bindings for w1, crypto, rng, SIM, PM, DDR, SATA, vf610
   GPIO, and UART to DT schema

 - Add i.MX 8M compatible strings

 - Add LM81 and DS1780 as trivial devices

 - Various missing properties added to fix dtb validation warnings

* tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (111 commits)
  dt-bindings: misc: explicitly add #address-cells for slave mode
  spi: dt-bindings: spi-controller: explicitly require #address-cells=<0> for slave mode
  dt: Remove booting-without-of.rst
  dt-bindings: update usb-c-connector example
  dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml
  dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml
  dt-bindings: pwm: imx: document i.MX compatibles
  scripts/dtc: Update to upstream version v1.6.0-31-gcbca977ea121
  dt-bindings: Add running yamllint to dt_binding_check
  dt-bindings: powerpc: Add a schema for the 'sleep' property
  dt-bindings: pinctrl: sirf: Fix typo abitrary
  dt-bindings: pinctrl: qcom: Fix typo abitrary
  dt-bindings: Explicitly allow additional properties in common schemas
  dt-bindings: Use 'additionalProperties' instead of 'unevaluatedProperties'
  dt-bindings: Add missing 'unevaluatedProperties'
  Docs: Fixing spelling errors in Documentation/devicetree/bindings/
  dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema
  dt-bindings: riscv: convert pwm bindings to json-schema
  dt-bindings: riscv: convert plic bindings to json-schema
  dt-bindings: fu540: prci: convert PRCI bindings to json-schema
  ...
dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings 2020-10-14T01:18:06+00:00 Jonathan Marek jonathan@marek.ca 2020-09-27T19:06:50+00:00 d05a58047c75126a74dc32f3f94cbcd9a6fbad0e Add device tree bindings for display clock controller for Qualcomm Technology Inc's SM8150 and SM8250 SoCs. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250) Link: https://lore.kernel.org/r/20200927190653.13876-2-jonathan@marek.ca Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM8150 and SM8250 SoCs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250)
Link: https://lore.kernel.org/r/20200927190653.13876-2-jonathan@marek.ca
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
dt-bindings: clock: add SM8250 QCOM video clock bindings 2020-10-14T01:05:04+00:00 Jonathan Marek jonathan@marek.ca 2020-09-23T16:06:29+00:00 dafb992a95e1c19ba62596b111d88f56f20ef887 Add device tree bindings for video clock controller for SM8250 SoCs. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200923160635.28370-4-jonathan@marek.ca Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
Add device tree bindings for video clock controller for SM8250 SoCs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-4-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
dt-bindings: clock: add SM8150 QCOM video clock bindings 2020-10-14T01:05:03+00:00 Jonathan Marek jonathan@marek.ca 2020-09-23T16:06:28+00:00 df3f61d2cdc9eac4c9c8316ca2d1a2efea39c8a0 Add device tree bindings for video clock controller for SM8150 SoCs. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200923160635.28370-3-jonathan@marek.ca Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
Add device tree bindings for video clock controller for SM8150 SoCs.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-3-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc 2020-10-14T01:05:03+00:00 Jonathan Marek jonathan@marek.ca 2020-09-23T16:06:27+00:00 70d795d2d836e686e2fd4ed1d0abd8fb6ed3ae2a These two bindings are almost identical, so combine them into one. This will make it easier to add the sm8150 and sm8250 videocc bindings. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200923160635.28370-2-jonathan@marek.ca Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
These two bindings are almost identical, so combine them into one. This
will make it easier to add the sm8150 and sm8250 videocc bindings.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-2-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>