<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/Documentation/devicetree/bindings/clock, branch v4.6</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>dt-bindings: clock: qca,ath79-pll: fix copy-paste typos</title>
<updated>2016-04-03T10:32:09+00:00</updated>
<author>
<name>Antony Pavlov</name>
<email>antonynpavlov@gmail.com</email>
</author>
<published>2016-03-17T03:34:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2b885ea66f4cb15cc3812dc90ddfb3b6b0567561'/>
<id>2b885ea66f4cb15cc3812dc90ddfb3b6b0567561</id>
<content type='text'>
Signed-off-by: Antony Pavlov &lt;antonynpavlov@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Alban Bedel &lt;albeu@free.fr&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12869/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Antony Pavlov &lt;antonynpavlov@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Alban Bedel &lt;albeu@free.fr&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12869/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>doc: dt: add documentation for lpc1850-creg-clk driver</title>
<updated>2016-03-04T20:53:20+00:00</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2016-03-03T21:47:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=782fa5201a660874951a515190530c1b200ca904'/>
<id>782fa5201a660874951a515190530c1b200ca904</id>
<content type='text'>
Add DT binding documentation for lpc1850-creg-clk driver.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add DT binding documentation for lpc1850-creg-clk driver.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'sunxi-clocks-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next</title>
<updated>2016-03-02T22:31:42+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-03-02T22:31:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=06a9852747b72c8b3fb35a60cc0498784135b5d8'/>
<id>06a9852747b72c8b3fb35a60cc0498784135b5d8</id>
<content type='text'>
Pull Allwinner clk updates from Maxime Ripard:

Allwinner clocks additions for 4.6

A bunch of things, mostly:
  - Finally switched everything over to OF_CLK_DECLARE, which should remove
    orphans clocks entirely
  - Reworked the clk-factors to be able to add new parameters
  - Improved the error reporting
  - A bunch of new clocks for new SoCs.

* tag 'sunxi-clocks-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
  clk: sunxi: Add apb0 gates for H3
  clk: sunxi: Improve divs_clk error handling and reporting
  clk: sunxi: improve divider_clk error handling and reporting
  clk: sunxi: improve mux_clk error handling and reporting
  clk: sunxi: Fix sun8i-a23-apb0-clk divider flags
  clk: sunxi: Remove clk_register_clkdev calls
  clk: sunxi: Remove old probe and protection code
  clk: sunxi: convert current clocks registration to CLK_OF_DECLARE
  clk: sunxi: Make clocks setup functions take const pointer
  clk: sunxi: Make clocks setup functions return their clock
  clk: sunxi: improve error reporting for the mux clock
  clk: sunxi: don't mark sun6i_ar100_data __initconst
  clk: sunxi: add bus gates for A83T
  clk: sunxi: Add apb0 gates for A83T
  clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk
  clk: sunxi: rewrite sun6i-ar100 using factors clk
  clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc
  clk: sunxi: factors: Drop round_rate from clk ops
  clk: sunxi: factors: Support custom formulas
  clk: sunxi: factors: Consolidate get_factors parameters into a struct
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull Allwinner clk updates from Maxime Ripard:

Allwinner clocks additions for 4.6

A bunch of things, mostly:
  - Finally switched everything over to OF_CLK_DECLARE, which should remove
    orphans clocks entirely
  - Reworked the clk-factors to be able to add new parameters
  - Improved the error reporting
  - A bunch of new clocks for new SoCs.

* tag 'sunxi-clocks-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
  clk: sunxi: Add apb0 gates for H3
  clk: sunxi: Improve divs_clk error handling and reporting
  clk: sunxi: improve divider_clk error handling and reporting
  clk: sunxi: improve mux_clk error handling and reporting
  clk: sunxi: Fix sun8i-a23-apb0-clk divider flags
  clk: sunxi: Remove clk_register_clkdev calls
  clk: sunxi: Remove old probe and protection code
  clk: sunxi: convert current clocks registration to CLK_OF_DECLARE
  clk: sunxi: Make clocks setup functions take const pointer
  clk: sunxi: Make clocks setup functions return their clock
  clk: sunxi: improve error reporting for the mux clock
  clk: sunxi: don't mark sun6i_ar100_data __initconst
  clk: sunxi: add bus gates for A83T
  clk: sunxi: Add apb0 gates for A83T
  clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk
  clk: sunxi: rewrite sun6i-ar100 using factors clk
  clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc
  clk: sunxi: factors: Drop round_rate from clk ops
  clk: sunxi: factors: Support custom formulas
  clk: sunxi: factors: Consolidate get_factors parameters into a struct
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-ti' into clk-next</title>
<updated>2016-03-02T00:23:40+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-03-02T00:23:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3b0f4ae3e9f101ecfd918efd2a82fca0ae0b6c95'/>
<id>3b0f4ae3e9f101ecfd918efd2a82fca0ae0b6c95</id>
<content type='text'>
Conflicts:
	drivers/clk/Kconfig
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Conflicts:
	drivers/clk/Kconfig
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: ti: Add support for dm814x ADPLL</title>
<updated>2016-03-02T00:21:25+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2016-02-26T17:35:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=21330497f303c55fd6a34d511a98eb0a31aa1bd7'/>
<id>21330497f303c55fd6a34d511a98eb0a31aa1bd7</id>
<content type='text'>
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.

Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall" that has already been merged.

Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.

Cc: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Acked-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.

Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall" that has already been merged.

Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.

Cc: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Acked-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-ipq4019' into clk-next</title>
<updated>2016-02-25T22:32:27+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-02-25T22:32:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0af1a24f5b322fe29edf45e1146c06729c465429'/>
<id>0af1a24f5b322fe29edf45e1146c06729c465429</id>
<content type='text'>
* clk-ipq4019:
  clk: qcom: Add IPQ4019 Global Clock Controller support
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* clk-ipq4019:
  clk: qcom: Add IPQ4019 Global Clock Controller support
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: qcom: Add IPQ4019 Global Clock Controller support</title>
<updated>2016-02-25T22:32:12+00:00</updated>
<author>
<name>Varadarajan Narayanan</name>
<email>varada@codeaurora.org</email>
</author>
<published>2015-11-19T23:19:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6971e863990b2514ae76a7bb245b1c33959c129a'/>
<id>6971e863990b2514ae76a7bb245b1c33959c129a</id>
<content type='text'>
This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.

Signed-off-by: Pradeep Banavathi &lt;pradeepb@codeaurora.org&gt;
Signed-off-by: Senthilkumar N L &lt;snlakshm@codeaurora.org&gt;
Signed-off-by: Varadarajan Narayanan &lt;varada@codeaurora.org&gt;
Signed-off-by: Matthew McClintock &lt;mmcclint@codeaurora.org&gt;
Acked-by: Andy Gross &lt;andy.gross@linaro.org&gt;
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.

Signed-off-by: Pradeep Banavathi &lt;pradeepb@codeaurora.org&gt;
Signed-off-by: Senthilkumar N L &lt;snlakshm@codeaurora.org&gt;
Signed-off-by: Varadarajan Narayanan &lt;varada@codeaurora.org&gt;
Signed-off-by: Matthew McClintock &lt;mmcclint@codeaurora.org&gt;
Acked-by: Andy Gross &lt;andy.gross@linaro.org&gt;
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sunxi: Add apb0 gates for H3</title>
<updated>2016-02-25T19:30:32+00:00</updated>
<author>
<name>Krzysztof Adamski</name>
<email>k@japko.eu</email>
</author>
<published>2016-02-22T13:03:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6e17b4181603d183d20c73f4535529ddf2a2a020'/>
<id>6e17b4181603d183d20c73f4535529ddf2a2a020</id>
<content type='text'>
This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).

Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.

Signed-off-by: Krzysztof Adamski &lt;k@japko.eu&gt;
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
         the commit log a bit]
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).

Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.

Signed-off-by: Krzysztof Adamski &lt;k@japko.eu&gt;
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
         the commit log a bit]
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'clk-shmobile-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next</title>
<updated>2016-02-19T20:46:09+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-02-19T17:46:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e1f520dc70a23e7fca742eb722cffaca906f83a1'/>
<id>e1f520dc70a23e7fca742eb722cffaca906f83a1</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: shmobile: cpg-mssr: Update serial port clock in example</title>
<updated>2016-02-16T07:53:13+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-10-20T08:21:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ca00c382bf1b40a73c27aeb2bb271376cc9c8812'/>
<id>ca00c382bf1b40a73c27aeb2bb271376cc9c8812</id>
<content type='text'>
Cfr. commit a9ec81f4ed5c05db ("serial: sh-sci: Drop the interface
clock").

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cfr. commit a9ec81f4ed5c05db ("serial: sh-sci: Drop the interface
clock").

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
