linux.git/Documentation/devicetree/bindings/arc, branch v4.8 Linux kernel source tree Documentation: Add EZchip vendor to binding list 2016-05-09T04:02:31+00:00 Noam Camus noamc@ezchip.com 2015-04-29T12:07:43+00:00 37f0e658eeeac720f3d558cf5aaf9edf0705ff23 Add EZchip to vendor prefixes list. EZchip introduce the NPS platform for the ARC architecture. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> 
Add EZchip to vendor prefixes list.
EZchip introduce the NPS platform for the ARC architecture.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Documentation: dt: arc: fix spelling mistakes 2016-04-25T08:51:09+00:00 Eric Engestrom eric@engestrom.ch 2016-04-25T00:24:04+00:00 da67e68c0e4601e87612918496fd8c7d72795e50 Signed-off-by: Eric Engestrom <eric@engestrom.ch> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
dt-bindings: consolidate interrupt controller bindings 2015-10-22T14:21:25+00:00 Rob Herring robh@kernel.org 2015-10-02T03:24:09+00:00 eb3fcf007fffe5830d815e713591f3e858f2a365 Move various interrupt controller bindings into the interrupt-controller/ directory. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-mediatek@lists.infradead.org 
Move various interrupt controller bindings into the
interrupt-controller/ directory.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: linux-mediatek@lists.infradead.org
ARCv2: perf: Finally introduce HS perf unit 2015-08-27T09:29:07+00:00 Vineet Gupta vgupta@synopsys.com 2014-11-18T12:06:11+00:00 9b28829d6da391f67a76dbba07a167e2b554bd10 With all features in place, the ARC HS pct block can now be effectively allowed to be probed/used Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
With all features in place, the ARC HS pct block can now be effectively
allowed to be probed/used

Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores 2015-06-25T00:30:20+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-09T09:03:40+00:00 5fa2daaa8d8223d06fcdba171a7a668dc8e8b179 Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distribution 2015-06-22T08:36:57+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-09T08:33:10+00:00 eaf0ecc33f82b9c46528d1646575dd8caf586a3d Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARCv2: [intc] HS38 core interrupt controller 2015-06-22T08:36:55+00:00 Vineet Gupta vgupta@synopsys.com 2015-03-06T08:38:20+00:00 820970a5aa3c98be26e1df64da4b93294d20d4e7 Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: [axs101] support early 8250 uart 2015-06-19T12:39:30+00:00 Vineet Gupta vgupta@synopsys.com 2015-02-02T13:53:21+00:00 8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC "BASE_BAUD" is calculated dynamically in runtime, basically it is an alias to arc_early_base_baud(), which in turn just does "arc_base_baud/16". 8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in "arc_base_baud" with this change. Additional compatibility string "snps,arc-sdp" is introduced as well because there're different flavours of AXS boards but they all share the same motherboard and so it's possible to re-use the same code for motherbord even if CPU daughterboard changes. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC
"BASE_BAUD" is calculated dynamically in runtime, basically it is an
alias to arc_early_base_baud(), which in turn just does
"arc_base_baud/16".

8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in
"arc_base_baud" with this change.

Additional compatibility string "snps,arc-sdp" is introduced as well
because there're different flavours of AXS boards but they all share the
same motherboard and so it's possible to re-use the same code for
motherbord even if CPU daughterboard changes.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: [axs101] Add support for AXS101 SDP (software development platform) 2015-06-19T12:39:30+00:00 Alexey Brodkin abrodkin@synopsys.com 2014-01-27T13:51:34+00:00 556cc1c5f528dcc87733920de17d61b6ebe8999d The AXS10x platforms consist of a mainboard with peripherals, on which several daughter cards can be placed. The daughter cards typically contain a CPU and memory. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
The AXS10x platforms consist of a mainboard with peripherals,
on which several daughter cards can be placed. The daughter cards
typically contain a CPU and memory.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
ARC: perf: Rename DT binding to not confuse with power mgmt 2015-04-20T12:57:36+00:00 Vineet Gupta vgupta@synopsys.com 2015-04-15T11:05:38+00:00 30fdd373f24cc50e250c71a6e2df89505e267804 Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>