linux.git/Documentation/arch/arm64, branch master Linux kernel source tree Merge tag 'pci-v7.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci 2026-08-23T19:44:10+00:00 Linus Torvalds torvalds@linux-foundation.org 2026-08-23T19:44:10+00:00 570f7e331f5febb30f1384817463c7e42b65ca7d Pull PCI updates from Bjorn Helgaas: "Resource management: - Add hotplug reservation only once (not at each level of the hierarchy) so bridge windows don't grow more than necessary (Ilpo Järvinen) Driver binding: - Rework device matching so device ID lifetime only needs to cover the probe path since dynamic IDs can be removed at any time (Gary Guo) Error handling: - Update mappings of AER errors to agent & layer and log them for each individual error when multiple errors detected (Lukas Wunner) - Log Error Source only once, not twice in separate messages (Lukas Wunner) - Emit TLP Log only for unmasked errors (Lukas Wunner) - Support Advisory Non-Fatal Errors (Lukas Wunner) - Allow DPC on all Downstream Ports, not just Root Ports, when OS controls AER (Darshit Shah) ASPM: - Program the same ASPM Control values for every function of multi-function devices, as recommended by the PCIe spec (Krishna Chaitanya Chundru) - Avoid L0s for Realtek RTS525A, where it causes an AER interrupt storm (Max Lee) - Avoid ASPM L0s, L1, and L1 PM Substates based on 'aspm-no-l0s', 'aspm-no-l1' [1], and 'aspm-no-l1ss' DT properties (Krishna Chaitanya Chundru) Power management: - Allow D3 for native hotplug-capable Root Ports on non-x86 platforms (we avoid D3 for these ports on x86 because some old platforms didn't validate it) (Manivannan Sadhasivam) - Allow portdrv to claim Ports even if they don't support services (AER, PME, DPC, hotplug, etc) so it can do power management (Brian Norris) Power control: - Add support for PCIe WAKE# interrupt when described via DT (Krishna Chaitanya Chundru) - For the TC9563 PCIe switch: - Take a reference on the I2C adapter to avoid uninterruptible hang when unloading an I2C module while in-use (Johan Hovold) - Update DT binding and driver to restrict Tx Amplitude, DFE and N_FTS to USP, DSP1 and DSP2 (Manivannan Sadhasivam) - Power off only external-facing ports (DSP1, DSP2), leaving USP and DSP3 (aka VDSP) powered up (Manivannan Sadhasivam) - Move integrated MAC Endpoint out of the list of internal ports and configure it separately (Manivannan Sadhasivam) Virtualization: - Add ACS quirk for Pericom PI7C9X2G608 switches (Tim Harvey) - Fix a long-standing bug in the Intel PCH Root Port MPC ACS quirk that didn't update the intended INTEL_MPC_REG_IRBNCE bit because it used a 16-bit config write when a 32-bit write was intended (Mohamad Raizudeen) Procfs: - Avoid spurious runtime PM wakeup on config space accesses that are outside config space and fail before reaching PCI (Krzysztof Wilczyński) - Warn on user-space writes to kernel-exclusive config space regions, as we already do for sysfs (Krzysztof Wilczyński) - Check credentials of opener, not reader, for config space reads, as we already do for sysfs (Krzysztof Wilczyński) Sysfs: - In pci_write_legacy_io(), avoid out-of-bounds reads from the user buffer and fix incorrect ioport write data (1-byte writes on little-endian powerpc, 2- and 4-byte writes on big-endian powerpc) (Krzysztof Wilczyński) - In pci_read_legacy_io(), fix incorrect ioport read data for 2- and 4-byte reads on big-endian powerpc (Krzysztof Wilczyński) - Fix I/O port accessor argument order in Alpha pci_legacy_write() (Krzysztof Wilczyński) - Avoid spurious runtime PM wakeup on config space accesses that are outside config space and fail before reaching PCI (Krzysztof Wilczyński) - Return -EINVAL, not -ENODEV, for mmap of I/O BAR that fails because the arch doesn't support it, as we do for procfs (Krzysztof Wilczyński) - Check for LOCKDOWN_PCI_ACCESS for legacy_io and legacy_mem, as we do for other config space accessors (Krzysztof Wilczyński) Peer-to-peer DMA: - Add Nvidia Vera Rubin to list of platforms that support P2PDMA (Leon Romanovsky) Endpoint framework: - Check doorbell SUCCESS bit in pci_endpoint_test to avoid treating some failures as successes (Niklas Cassel) - Fail doorbell test when the trigger IRQ is missed (Niklas Cassel) New native PCIe controller drivers: - Add DT binding and driver for NVIDIA Tegra264 (Thierry Reding) Native PCIe controllers: - Use common wait time definitions for PCIe link monitoring instead of defining driver-private duplicates (Thierry Reding) Generic host bridge driver: - Fix NULL pointer dereference that caused enumeration failures on 32-bit CAM systems (Steffen Persvold) Amlogic Meson PCIe controller driver: - Correct the PERST# GPIO state so it remains asserted until power and REFCLK become stable to fix enumeration failure (Ronald Claveau) ASPEED PCIe controller driver: - Switch to irq_domain_create_linear() so we can obsolete irq_domain_add_linear() (Jiri Slaby) Cadence PCIe controller driver: - Add MODULE_DEVICE_TABLE to generate module aliases for OF-based module autoloading (Pengpeng Hou) - Add debugfs 'ltssm_status' file for LGA- and HPA-based Cadence controllers (Hans Zhang) - Support up to x4 (not x2) lanes for J200 (Takuma Fujiwara) - Fix host/endpoint dependencies for cadence-plat driver to fix link error when cadence-plat is built-in but the host or endpoint driver is modular (Aksh Garg) Freescale i.MX6 PCIe controller driver: - Add imx6 intr/aer/pme interrupt lines for i.MX95 (Richard Zhu) - Remove PERST# checking from pci_host_common_parse_port() so callers can decide whether to fall back to legacy DT binding with PERST# in the host bridge (Sherry Sun) - Fix build issues when PCI_PWRCTRL_GENERIC or PCI_HOST_COMMON is a module (Arnd Bergmann) - Create pwrctrl devices only once by doing it from imx_pcie_probe() instead of imx_pcie_host_init(), which is used during both probe and resume (Sherry Sun) - Use 'dw_pcie_rp->skip_pwrctrl_off' to avoid powering off devices during suspend to preserve wakeup capability (Sherry Sun) - Add runtime PM support for i.MX95 to allow dynamic power management when the link is idle (Richard Zhu) Intel VMD host bridge driver: - Support device ID 0x28C1 and assume that BIOS has already enumerated the hierarchy below VMD and stored bus range info for OS to use (Nirmal Patel) - Add support for VMCONFIG BUS_RESTRICT_CFG=3, which makes it possible to enumerate downstream devices on Intel Arrow Lake-HX systems and probably others (Ali Alaei) - Pay attention to _OSC negotiation for VMD hierarchy only when running on bare metal, not when running in a VM (Nirmal Patel) - Add Nova Lake (NVL) and Dunlow (DNL) Device IDs (Szymon Durawa) MediaTek PCIe controller driver: - Add support for PCIe controller in EcoNet EN7528 and EN751221 SoCs (Caleb James DeLisle) MediaTek PCIe Gen3 controller driver: - Add mediatek-gen3 'memory-region' for restricted DMA buffer (Chen-Yu Tsai) NVIDIA Tegra264 PCIe controller driver: - Distinguish Tegra264 C0 PCIe controller for internal GPU from C1-C5 controllers so the unit address matches the first 'reg' entry (Thierry Reding) - Add Tegra264 Root Port stanzas to prepare for generic WAKE# handling (Thierry Reding) Qualcomm PCIe controller driver: - Add IPQ9650 compatible with global interrupt (Kathiravan Thirumoorthy) - Add IPQ5210 compatible with IPQ9574 fallback (Varadarajan Narayanan) - Add DT binding and driver support for Hawi SoC (Matthew Leung) - Skip PERST# GPIOs provided by downstream PCIe devices, which should be handled by drivers of those devices (Manivannan Sadhasivam) - Stop advertising Attention Button Present (no Qcom SoCs support Attention Buttons) so pciehp can use Presence Detect Changed events (Qiang Yu) Renesas R-Car PCIe controller driver: - Add rcar-gen4-pci-host optional 'msi-parent' for GIT ITS (Marek Vasut) - When MSI is enabled but iMSI-RX is not used, configure AXIINTC to allow GIT ITS to handle MSI (Marek Vasut) - Refactor GIC600 implementation to make it easier to add platforms that only support 32-bit addressing (Marek Vasut) - Add Renesas R-Car Gen4 S4/V4H/V4M to the list of GIC600 integrations that only support 32-bit addressing (Marek Vasut) Renesas RZ/G3S PCIe controller driver: - Add DT binding and driver support for RZ/V2H(P) SoC, which contains two PCIe controllers, configured either as a single x4 link or two independent x2 link controllers (Lad Prabhakar) SpacemiT K1 PCIe controller driver: - Add missing MODULE_DEVICE_TABLE() to generate module alias info for OF-based module autoloading (Pengpeng Hou) StarFive PCIe controller driver: - Fix resource leaks on error paths in host_init() (Ali Tariq) - Fix runtime PM handling and teardown ordering to avoid register access while power or clocks are disabled (Ali Tariq) - Check for runtime PM resume failure to avoid register access while power or clocks are disabled (Ali Tariq) Synopsys DesignWare PCIe controller driver: - Add LECARC PMU IDs to the DWC RAS/DES VSEC list so it can take advantage of the existing debugfs support for silicon debug, error injection, and event counters (Brett Zhou) - Factor pcie_valid_speed() and pci_bus_speed2lnkctl2() out of bwctrl so they can be shared by the DWC core (Hans Zhang) - Flush MSI writes from endpoint before unmapping the iATU, as we already do for MSI-X writes (Niklas Cassel) - Unmap MSI iATU window before mapping MSI-X window, to avoid a subsequent MSI write using a disabled aperture and losing the interrupt (Niklas Cassel) - Change endpoint .pre_init() and .init() callbacks to return errors and handle them (Marek Vasut) UltraRISC PCIe controller driver: - Add 'core', 'dbi', and 'aux' clocks to DT binding and manage them in the driver (Jia Wang) - Use module_platform_driver() since this may be built as a module, though not removable because IRQs can't be safely disposed (Jia Wang) MicroSemi Switchtec management driver: - Add Microchip PCI1008 device ID and include it in NTB DMA alias quirk (Logan Gunthorpe) Miscellaneous: - Document how to write PCI Host Controller drivers (Manivannan Sadhasivam) - Fix typos in documentation (D'Orus Tsitera) - Use %pe format specifier to print error pointers so we get symbolic errname when available (Krzysztof Wilczyński)" * tag 'pci-v7.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (124 commits) PCI: vmd: Add Nova Lake (NVL) and Dunlow (DNL) Device IDs PCI: tegra264: Add Tegra264 support dt-bindings: PCI: tegra264: Switch to PCIe Root Port bindings dt-bindings: PCI: tegra264: Strictly distinguish C0 from C1-C5 PCI/AER: Support Advisory Non-Fatal Errors PCI: Fix 32-bit config write in Intel PCH Root Port MPC ACS quirk PCI: dwc: Handle return value from endpoint .pre_init callback PCI: dwc: Handle return value from endpoint .init callback PCI: dwc: Add PCI ID for LECARC PCIe PMU PCI/ASPM: Mask ASPM states based on Devicetree properties PCI/ASPM: Disable/restore ASPM on every function for multi-function devices Documentation: PCI: Document how to write PCI Host Controller drivers PCI/ASPM: Use pcie_capability_clear_and_set_word() for ASPM disable/restore PCI: Add support for PCIe WAKE# interrupt PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms dt-bindings: PCI: Correct white-space style PCI/ASPM: Avoid L0s for Realtek RTS525A PCI: ultrarisc: Use module_platform_driver() PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks ... 
Pull PCI updates from Bjorn Helgaas:
 "Resource management:

   - Add hotplug reservation only once (not at each level of the
     hierarchy) so bridge windows don't grow more than necessary (Ilpo
     Järvinen)

  Driver binding:

   - Rework device matching so device ID lifetime only needs to cover
     the probe path since dynamic IDs can be removed at any time (Gary
     Guo)

  Error handling:

   - Update mappings of AER errors to agent & layer and log them for
     each individual error when multiple errors detected (Lukas Wunner)

   - Log Error Source only once, not twice in separate messages (Lukas
     Wunner)

   - Emit TLP Log only for unmasked errors (Lukas Wunner)

   - Support Advisory Non-Fatal Errors (Lukas Wunner)

   - Allow DPC on all Downstream Ports, not just Root Ports, when OS
     controls AER (Darshit Shah)

  ASPM:

   - Program the same ASPM Control values for every function of
     multi-function devices, as recommended by the PCIe spec (Krishna
     Chaitanya Chundru)

   - Avoid L0s for Realtek RTS525A, where it causes an AER interrupt
     storm (Max Lee)

   - Avoid ASPM L0s, L1, and L1 PM Substates based on 'aspm-no-l0s',
     'aspm-no-l1' [1], and 'aspm-no-l1ss' DT properties (Krishna
     Chaitanya Chundru)

  Power management:

   - Allow D3 for native hotplug-capable Root Ports on non-x86 platforms
     (we avoid D3 for these ports on x86 because some old platforms
     didn't validate it) (Manivannan Sadhasivam)

   - Allow portdrv to claim Ports even if they don't support services
     (AER, PME, DPC, hotplug, etc) so it can do power management (Brian
     Norris)

  Power control:

   - Add support for PCIe WAKE# interrupt when described via DT (Krishna
     Chaitanya Chundru)

   - For the TC9563 PCIe switch:

       - Take a reference on the I2C adapter to avoid uninterruptible
         hang when unloading an I2C module while in-use (Johan Hovold)

       - Update DT binding and driver to restrict Tx Amplitude, DFE and
         N_FTS to USP, DSP1 and DSP2 (Manivannan Sadhasivam)

       - Power off only external-facing ports (DSP1, DSP2), leaving USP
         and DSP3 (aka VDSP) powered up (Manivannan Sadhasivam)

       - Move integrated MAC Endpoint out of the list of internal ports
         and configure it separately (Manivannan Sadhasivam)

  Virtualization:

   - Add ACS quirk for Pericom PI7C9X2G608 switches (Tim Harvey)

   - Fix a long-standing bug in the Intel PCH Root Port MPC ACS quirk
     that didn't update the intended INTEL_MPC_REG_IRBNCE bit because it
     used a 16-bit config write when a 32-bit write was intended
     (Mohamad Raizudeen)

  Procfs:

   - Avoid spurious runtime PM wakeup on config space accesses that are
     outside config space and fail before reaching PCI (Krzysztof
     Wilczyński)

   - Warn on user-space writes to kernel-exclusive config space regions,
     as we already do for sysfs (Krzysztof Wilczyński)

   - Check credentials of opener, not reader, for config space reads, as
     we already do for sysfs (Krzysztof Wilczyński)

  Sysfs:

   - In pci_write_legacy_io(), avoid out-of-bounds reads from the user
     buffer and fix incorrect ioport write data (1-byte writes on
     little-endian powerpc, 2- and 4-byte writes on big-endian powerpc)
     (Krzysztof Wilczyński)

   - In pci_read_legacy_io(), fix incorrect ioport read data for 2- and
     4-byte reads on big-endian powerpc (Krzysztof Wilczyński)

   - Fix I/O port accessor argument order in Alpha pci_legacy_write()
     (Krzysztof Wilczyński)

   - Avoid spurious runtime PM wakeup on config space accesses that are
     outside config space and fail before reaching PCI (Krzysztof
     Wilczyński)

   - Return -EINVAL, not -ENODEV, for mmap of I/O BAR that fails because
     the arch doesn't support it, as we do for procfs (Krzysztof
     Wilczyński)

   - Check for LOCKDOWN_PCI_ACCESS for legacy_io and legacy_mem, as we
     do for other config space accessors (Krzysztof Wilczyński)

  Peer-to-peer DMA:

   - Add Nvidia Vera Rubin to list of platforms that support P2PDMA
     (Leon Romanovsky)

  Endpoint framework:

   - Check doorbell SUCCESS bit in pci_endpoint_test to avoid treating
     some failures as successes (Niklas Cassel)

   - Fail doorbell test when the trigger IRQ is missed (Niklas Cassel)

  New native PCIe controller drivers:

   - Add DT binding and driver for NVIDIA Tegra264 (Thierry Reding)

  Native PCIe controllers:

   - Use common wait time definitions for PCIe link monitoring instead
     of defining driver-private duplicates (Thierry Reding)

  Generic host bridge driver:

   - Fix NULL pointer dereference that caused enumeration failures on
     32-bit CAM systems (Steffen Persvold)

  Amlogic Meson PCIe controller driver:

   - Correct the PERST# GPIO state so it remains asserted until power
     and REFCLK become stable to fix enumeration failure (Ronald
     Claveau)

  ASPEED PCIe controller driver:

   - Switch to irq_domain_create_linear() so we can obsolete
     irq_domain_add_linear() (Jiri Slaby)

  Cadence PCIe controller driver:

   - Add MODULE_DEVICE_TABLE to generate module aliases for OF-based
     module autoloading (Pengpeng Hou)

   - Add debugfs 'ltssm_status' file for LGA- and HPA-based Cadence
     controllers (Hans Zhang)

   - Support up to x4 (not x2) lanes for J200 (Takuma Fujiwara)

   - Fix host/endpoint dependencies for cadence-plat driver to fix link
     error when cadence-plat is built-in but the host or endpoint driver
     is modular (Aksh Garg)

  Freescale i.MX6 PCIe controller driver:

   - Add imx6 intr/aer/pme interrupt lines for i.MX95 (Richard Zhu)

   - Remove PERST# checking from pci_host_common_parse_port() so callers
     can decide whether to fall back to legacy DT binding with PERST# in
     the host bridge (Sherry Sun)

   - Fix build issues when PCI_PWRCTRL_GENERIC or PCI_HOST_COMMON is a
     module (Arnd Bergmann)

   - Create pwrctrl devices only once by doing it from imx_pcie_probe()
     instead of imx_pcie_host_init(), which is used during both probe
     and resume (Sherry Sun)

   - Use 'dw_pcie_rp->skip_pwrctrl_off' to avoid powering off devices
     during suspend to preserve wakeup capability (Sherry Sun)

   - Add runtime PM support for i.MX95 to allow dynamic power management
     when the link is idle (Richard Zhu)

  Intel VMD host bridge driver:

   - Support device ID 0x28C1 and assume that BIOS has already
     enumerated the hierarchy below VMD and stored bus range info for OS
     to use (Nirmal Patel)

   - Add support for VMCONFIG BUS_RESTRICT_CFG=3, which makes it
     possible to enumerate downstream devices on Intel Arrow Lake-HX
     systems and probably others (Ali Alaei)

   - Pay attention to _OSC negotiation for VMD hierarchy only when
     running on bare metal, not when running in a VM (Nirmal Patel)

   - Add Nova Lake (NVL) and Dunlow (DNL) Device IDs (Szymon Durawa)

  MediaTek PCIe controller driver:

   - Add support for PCIe controller in EcoNet EN7528 and EN751221 SoCs
     (Caleb James DeLisle)

  MediaTek PCIe Gen3 controller driver:

   - Add mediatek-gen3 'memory-region' for restricted DMA buffer
     (Chen-Yu Tsai)

  NVIDIA Tegra264 PCIe controller driver:

   - Distinguish Tegra264 C0 PCIe controller for internal GPU from C1-C5
     controllers so the unit address matches the first 'reg' entry
     (Thierry Reding)

   - Add Tegra264 Root Port stanzas to prepare for generic WAKE#
     handling (Thierry Reding)

  Qualcomm PCIe controller driver:

   - Add IPQ9650 compatible with global interrupt (Kathiravan
     Thirumoorthy)

   - Add IPQ5210 compatible with IPQ9574 fallback (Varadarajan
     Narayanan)

   - Add DT binding and driver support for Hawi SoC (Matthew Leung)

   - Skip PERST# GPIOs provided by downstream PCIe devices, which should
     be handled by drivers of those devices (Manivannan Sadhasivam)

   - Stop advertising Attention Button Present (no Qcom SoCs support
     Attention Buttons) so pciehp can use Presence Detect Changed events
     (Qiang Yu)

  Renesas R-Car PCIe controller driver:

   - Add rcar-gen4-pci-host optional 'msi-parent' for GIT ITS (Marek
     Vasut)

   - When MSI is enabled but iMSI-RX is not used, configure AXIINTC to
     allow GIT ITS to handle MSI (Marek Vasut)

   - Refactor GIC600 implementation to make it easier to add platforms
     that only support 32-bit addressing (Marek Vasut)

   - Add Renesas R-Car Gen4 S4/V4H/V4M to the list of GIC600
     integrations that only support 32-bit addressing (Marek Vasut)

  Renesas RZ/G3S PCIe controller driver:

   - Add DT binding and driver support for RZ/V2H(P) SoC, which contains
     two PCIe controllers, configured either as a single x4 link or two
     independent x2 link controllers (Lad Prabhakar)

  SpacemiT K1 PCIe controller driver:

   - Add missing MODULE_DEVICE_TABLE() to generate module alias info for
     OF-based module autoloading (Pengpeng Hou)

  StarFive PCIe controller driver:

   - Fix resource leaks on error paths in host_init() (Ali Tariq)

   - Fix runtime PM handling and teardown ordering to avoid register
     access while power or clocks are disabled (Ali Tariq)

   - Check for runtime PM resume failure to avoid register access while
     power or clocks are disabled (Ali Tariq)

  Synopsys DesignWare PCIe controller driver:

   - Add LECARC PMU IDs to the DWC RAS/DES VSEC list so it can take
     advantage of the existing debugfs support for silicon debug, error
     injection, and event counters (Brett Zhou)

   - Factor pcie_valid_speed() and pci_bus_speed2lnkctl2() out of bwctrl
     so they can be shared by the DWC core (Hans Zhang)

   - Flush MSI writes from endpoint before unmapping the iATU, as we
     already do for MSI-X writes (Niklas Cassel)

   - Unmap MSI iATU window before mapping MSI-X window, to avoid a
     subsequent MSI write using a disabled aperture and losing the
     interrupt (Niklas Cassel)

   - Change endpoint .pre_init() and .init() callbacks to return errors
     and handle them (Marek Vasut)

  UltraRISC PCIe controller driver:

   - Add 'core', 'dbi', and 'aux' clocks to DT binding and manage them
     in the driver (Jia Wang)

   - Use module_platform_driver() since this may be built as a module,
     though not removable because IRQs can't be safely disposed (Jia
     Wang)

  MicroSemi Switchtec management driver:

   - Add Microchip PCI1008 device ID and include it in NTB DMA alias
     quirk (Logan Gunthorpe)

  Miscellaneous:

   - Document how to write PCI Host Controller drivers (Manivannan
     Sadhasivam)

   - Fix typos in documentation (D'Orus Tsitera)

   - Use %pe format specifier to print error pointers so we get symbolic
     errname when available (Krzysztof Wilczyński)"

* tag 'pci-v7.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (124 commits)
  PCI: vmd: Add Nova Lake (NVL) and Dunlow (DNL) Device IDs
  PCI: tegra264: Add Tegra264 support
  dt-bindings: PCI: tegra264: Switch to PCIe Root Port bindings
  dt-bindings: PCI: tegra264: Strictly distinguish C0 from C1-C5
  PCI/AER: Support Advisory Non-Fatal Errors
  PCI: Fix 32-bit config write in Intel PCH Root Port MPC ACS quirk
  PCI: dwc: Handle return value from endpoint .pre_init callback
  PCI: dwc: Handle return value from endpoint .init callback
  PCI: dwc: Add PCI ID for LECARC PCIe PMU
  PCI/ASPM: Mask ASPM states based on Devicetree properties
  PCI/ASPM: Disable/restore ASPM on every function for multi-function devices
  Documentation: PCI: Document how to write PCI Host Controller drivers
  PCI/ASPM: Use pcie_capability_clear_and_set_word() for ASPM disable/restore
  PCI: Add support for PCIe WAKE# interrupt
  PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms
  dt-bindings: PCI: Correct white-space style
  PCI/ASPM: Avoid L0s for Realtek RTS525A
  PCI: ultrarisc: Use module_platform_driver()
  PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks
  dt-bindings: PCI: ultrarisc: Add required DP1000 PCIe clocks
  ...
Merge tag 'iommu-updates-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux 2026-08-19T19:38:26+00:00 Linus Torvalds torvalds@linux-foundation.org 2026-08-19T19:38:26+00:00 4994ef0fe01e0c58a9af187f98a030c35dfb1a93 Pull iommu updates from Joerg Roedel: "ARM SMMUv2: - Device-tree binding updates for Qualcomm Eliza, Maili, Shikra and IPQ9650 SoCs - Add support for Qualcomm SM8450 - Numerous fixes for lifetime and ordering issues found by Sashiko in the Qualcomm driver ARM SMMUv3: - Fix interrupt type in device-tree binding example for NVIDIA CMDQV - Numerous fixes for issues identified by Sashiko in the NVIDIA CMDQV driver - Work around TLB erratum T264-SMMU-3 on Tegra264 by repeating the invalidation sequence - Add support for HAFT (hardware access flag in table entries) when using SVA - Probe for 52-bit addressing with a page size smaller than 64k ('DS') but don't do anything with it for now - Minor driver improvements (remove sort_nonatomic(), use readl_relaxed_poll_timeout_atomic(), fix IOPF teardown ordering) Intel VT-d: - Consolidation of complex enablement logic into a clean, priority-based state machine - Support for the DMA_REMAP_OPT_OUT flag from the VT-d v5.2 specification - An update to cache_tag_flush_devtlb_psi() to use full-range constants instead of modifying shared variables for CACHE_TAG_NESTING_DEVTLB - A fix for the UCTP context-table slot when copying root entries - Fixes for several pre-existing issues reported by Sashiko - General code cleanup and refinement AMD IOMMU: - Add SNP page-mode-0 support, enabling passthrough, v2 DMA page tables and host SVA on supporting systems - Fix invalid PPR handling, COMPLETE_PPR responses and guest-mode reporting - Improve Southbridge IOAPIC validation and remove the dependency on hard-coded device IDs - Fix PCI-device lifetime, debugfs and diagnostic issues IOMMU core and IOMMUFD: - Restore serialization of the shared MSI-page list - Fix SVA-handle publication and several IOMMUFD reference and error path leaks - Return the expected zero result for invalid generic page-table translations - Allocate per-CPU IOVA magazines lazily to reduce memory use on large systems PCI ATS: - Make VF support checks account for the associated PF and validate that VF and PF Smallest Translation Unit settings agree Platform drivers: - Fix Qualcomm runtime-PM, probe unwind, fault reporting and page table initialization races - Rework Rockchip state handling and fix clock, probe and stale-fault handling - Fix smaller issues in the MSM and MediaTek drivers Device-tree bindings: - Add new Qualcomm SMMU compatibles, convert the OMAP IOMMU binding to YAML, and fix the Tegra264 CMDQV interrupt example Various smaller cleanups, documentation fixes and a Rust IOMMU safety/readability improvement" * tag 'iommu-updates-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (93 commits) iommu/amd: Add SNP page mode 0 support iommu/amd: Fix GN bit setting in COMPLETE_PPR_REQUEST command iommu/amd: Rate limit INVALID_PPR_REQUEST error logging iommu/amd: Fix missing CMD_COMPLETE_PPR response for invalid PPR requests iommu/amd: Introduce PPR_TAG_LAST_PAGE() macro iommu/amd: Fix incorrect device ID in invalid PASID error message iommu/vt-d: Flush context cache with correct SID when tearing down aliases iommu/vt-d: Tear down scalable-mode context on probe failure iommu/vt-d: Fix iopf_refcount leak on RID domain replacement iommu/vt-d: Clear Present bit before tearing down copied context entry iommu/vt-d: Fix copied_tables bitmap leak on error in copy_translation_tables iommu/vt-d: Cache max domain ID to avoid redundant calculation iommu/vt-d: Support the new DMA_REMAP_OPT_OUT flag bit iommu/vt-d: Remove dmar_disabled iommu/vt-d: Remove the 'force_on' variable iommu/vt-d: Call dmar_can_force_on() for tboot opt-in iommu/vt-d: Use dmar_can_force_on() for platform opt-in iommu/vt-d: Consolidate dmar policy management and force_on logic iommu/vt-d: Remove dead code when CONFIG_INTEL_IOMMU is not set iommu/vt-d: Force requesting ACS when tboot is enabled ... 
Pull iommu updates from Joerg Roedel:
 "ARM SMMUv2:
   - Device-tree binding updates for Qualcomm Eliza, Maili, Shikra and
     IPQ9650 SoCs
   - Add support for Qualcomm SM8450
   - Numerous fixes for lifetime and ordering issues found by Sashiko in
     the Qualcomm driver

  ARM SMMUv3:
   - Fix interrupt type in device-tree binding example for NVIDIA CMDQV
   - Numerous fixes for issues identified by Sashiko in the NVIDIA CMDQV
     driver
   - Work around TLB erratum T264-SMMU-3 on Tegra264 by repeating the
     invalidation sequence
   - Add support for HAFT (hardware access flag in table entries) when
     using SVA
   - Probe for 52-bit addressing with a page size smaller than 64k
     ('DS') but don't do anything with it for now
   - Minor driver improvements (remove sort_nonatomic(), use
     readl_relaxed_poll_timeout_atomic(), fix IOPF teardown ordering)

  Intel VT-d:
   - Consolidation of complex enablement logic into a clean,
     priority-based state machine
   - Support for the DMA_REMAP_OPT_OUT flag from the VT-d v5.2
     specification
   - An update to cache_tag_flush_devtlb_psi() to use full-range
     constants instead of modifying shared variables for
     CACHE_TAG_NESTING_DEVTLB
   - A fix for the UCTP context-table slot when copying root entries
   - Fixes for several pre-existing issues reported by Sashiko
   - General code cleanup and refinement

  AMD IOMMU:
   - Add SNP page-mode-0 support, enabling passthrough, v2 DMA page
     tables and host SVA on supporting systems
   - Fix invalid PPR handling, COMPLETE_PPR responses and guest-mode
     reporting
   - Improve Southbridge IOAPIC validation and remove the dependency on
     hard-coded device IDs
   - Fix PCI-device lifetime, debugfs and diagnostic issues

  IOMMU core and IOMMUFD:
   - Restore serialization of the shared MSI-page list
   - Fix SVA-handle publication and several IOMMUFD reference and error
     path leaks
   - Return the expected zero result for invalid generic page-table
     translations
   - Allocate per-CPU IOVA magazines lazily to reduce memory use on
     large systems

  PCI ATS:
   - Make VF support checks account for the associated PF and validate
     that VF and PF Smallest Translation Unit settings agree

  Platform drivers:
   - Fix Qualcomm runtime-PM, probe unwind, fault reporting and page
     table initialization races
   - Rework Rockchip state handling and fix clock, probe and stale-fault
     handling
   - Fix smaller issues in the MSM and MediaTek drivers

  Device-tree bindings:
   - Add new Qualcomm SMMU compatibles, convert the OMAP IOMMU binding
     to YAML, and fix the Tegra264 CMDQV interrupt example

  Various smaller cleanups, documentation fixes and a Rust IOMMU
  safety/readability improvement"

* tag 'iommu-updates-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (93 commits)
  iommu/amd: Add SNP page mode 0 support
  iommu/amd: Fix GN bit setting in COMPLETE_PPR_REQUEST command
  iommu/amd: Rate limit INVALID_PPR_REQUEST error logging
  iommu/amd: Fix missing CMD_COMPLETE_PPR response for invalid PPR requests
  iommu/amd: Introduce PPR_TAG_LAST_PAGE() macro
  iommu/amd: Fix incorrect device ID in invalid PASID error message
  iommu/vt-d: Flush context cache with correct SID when tearing down aliases
  iommu/vt-d: Tear down scalable-mode context on probe failure
  iommu/vt-d: Fix iopf_refcount leak on RID domain replacement
  iommu/vt-d: Clear Present bit before tearing down copied context entry
  iommu/vt-d: Fix copied_tables bitmap leak on error in copy_translation_tables
  iommu/vt-d: Cache max domain ID to avoid redundant calculation
  iommu/vt-d: Support the new DMA_REMAP_OPT_OUT flag bit
  iommu/vt-d: Remove dmar_disabled
  iommu/vt-d: Remove the 'force_on' variable
  iommu/vt-d: Call dmar_can_force_on() for tboot opt-in
  iommu/vt-d: Use dmar_can_force_on() for platform opt-in
  iommu/vt-d: Consolidate dmar policy management and force_on logic
  iommu/vt-d: Remove dead code when CONFIG_INTEL_IOMMU is not set
  iommu/vt-d: Force requesting ACS when tboot is enabled
  ...
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 2026-08-18T18:57:17+00:00 Linus Torvalds torvalds@linux-foundation.org 2026-08-18T18:57:17+00:00 85cdaca6970028bf6f544c355c90035586836ddf Pull arm64 updates from Will Deacon: "There's a reasonable amount of stuff here, including a bunch of updates to the perf PMU drivers and some MPAM updates to expose the memory bandwidth counters via resctrl. On the architecture side, some highlights include support for BBML3 and steps towards support for an architectural NMI solution, all wrapped up in a web of fixes for latent issues identified by Sashiko. ACPI: - Combine reads of AMU counters into a single FFH feedback counter op Confidential computing: - Fix smp_processor_id() in preemptible context when retrieving an attestation token inside a realm - Convert pKVM over to a "CC platform" - Clean-up our SWIOTLB configuration in preparation for reworking the handling of encrypted/decryped DMA buffers in the dma-mapping tree CPU errata handling: - Work around broken device memory ordering on NVIDIA Olympus cores - Fix broken 'nospectre_bhb' command-line option - Select the idle loop backend instruction on the command-line CPU features: - Replace our BBML2-noabort feature with the new architectural BBML3 feature - Disable in-kernel BTI for recent versions of Clang due to issues with livepatch that are still being investigated - Clean-up documentation describing which ID register fields are exposed to userspace Interrupts: - Preliminary work towards supporting FEAT_NMI, which cleans up our IRQ entry code and fixes some latent issues with pseudo-NMI - Support for an SDEI backend to trigger an NMI backtrace Memory management: - Treat all devices as coherent when CLIDR_EL1.LoC == 0 - Fix no-map handling of sub-page-sized regions - Second attempt at unmapping the linear aliases of the kernel data and bss sections - Fix EFI runtime calls when software-PAN is enabled Miscellaneous: - Add Mark Rutland as a reviewer! - Tidy-up our futex cmpxchg logic when using the new LSUI instructions - Drop the requirement on DYNAMIC_FTRACE_WITH_CALL_OPS when selecting HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS - Fix a false-positive KCSCAN splat in the delay loop - Use a portable typedef for 128-bit scalar types in our UAPI headers - Non-critical fixes for Sashiko reports all over MPAM: - Hook MPAM memory bandwidth counters into resctrl's counter assignment interface - Fix a quirk in the MPAM bandwidth counting on Nvidia T241 so that it also applies to 63 bit counters Perf: - Workarounds for hardware issues in the CMN-S3 PMU (Graviton 5) and CPU PMU (NVIDIA Olympus again!) - Add support for the DDR PMU on Marvell CN20K SoCs - Add support for Picoheart implementations of the DCW PCIe PMU - Add support for Channel/Rank/Bank filtering in the CXL PMU driver - Add support for 64-bit counters in the CSPMU device - Add support for revision 2 of the CMN S3 PMU Ptrace: - Fix a decade-old bug in our handling of seccomp and tracing on syscall entry - Fix regset handling for inactive SVE and SSVE registers Selftests - Add some tests for the decade-old bug that we just tried to fix in our syscall entry path - Fix SVE test crash on SME-only CPUs" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (95 commits) arm64/efi: Avoid voluntary preemption with efi_mm installed arm64: bti: Disable in-kernel BTI with recent versions of Clang arm64: entry: Avoid unnecessary local_irq_disable() on kernel exit irqchip/gic-v3: make the unmasking of pseudo-NMIs explicit when handling IRQs arm64: Disable KCSAN instrumentation in delay.o arm_mpam: Disable driver unbind to avoid UAF arm_mpam: Fix a NULL pointer dereference on unbinding after an error interrupt perf: arm_pmuv3: Zero initialize hw_id branch stack field arm64: mm: Unmap kernel data/bss entirely from the linear map iommu/arm-smmu-v3-sva: Use system_supports_bbml3() to detect CPU feature perf/arm-cmn: Support CMN S3 r2 perf/arm-cmn: Plumb in new filter types perf/arm-cmn: Refactor event filter data perf/arm-cmn: Refactor event filter programming perf/arm-cmn: Rename filter variables for clarity arm64: mm: fix accidental linear mapping of no-map reserved memory tools: Ensure tools copy of linux/filter.h exports the UAPI kselftest/arm64: Fix abi test compilation errors arch: arm64: add early_param idle=<wfi|yield|nop> arm64: entry: mask DAIF before returning from C EL1 handlers ... 
Pull arm64 updates from Will Deacon:
 "There's a reasonable amount of stuff here, including a bunch of
  updates to the perf PMU drivers and some MPAM updates to expose the
  memory bandwidth counters via resctrl.

  On the architecture side, some highlights include support for BBML3
  and steps towards support for an architectural NMI solution, all
  wrapped up in a web of fixes for latent issues identified by Sashiko.

  ACPI:

   - Combine reads of AMU counters into a single FFH feedback counter op

  Confidential computing:

   - Fix smp_processor_id() in preemptible context when retrieving an
     attestation token inside a realm

   - Convert pKVM over to a "CC platform"

   - Clean-up our SWIOTLB configuration in preparation for reworking the
     handling of encrypted/decryped DMA buffers in the dma-mapping tree

  CPU errata handling:

   - Work around broken device memory ordering on NVIDIA Olympus cores

   - Fix broken 'nospectre_bhb' command-line option

   - Select the idle loop backend instruction on the command-line

  CPU features:

   - Replace our BBML2-noabort feature with the new architectural BBML3
     feature

   - Disable in-kernel BTI for recent versions of Clang due to issues
     with livepatch that are still being investigated

   - Clean-up documentation describing which ID register fields are
     exposed to userspace

  Interrupts:

   - Preliminary work towards supporting FEAT_NMI, which cleans up our
     IRQ entry code and fixes some latent issues with pseudo-NMI

   - Support for an SDEI backend to trigger an NMI backtrace

  Memory management:

   - Treat all devices as coherent when CLIDR_EL1.LoC == 0

   - Fix no-map handling of sub-page-sized regions

   - Second attempt at unmapping the linear aliases of the kernel data
     and bss sections

   - Fix EFI runtime calls when software-PAN is enabled

  Miscellaneous:

   - Add Mark Rutland as a reviewer!

   - Tidy-up our futex cmpxchg logic when using the new LSUI
     instructions

   - Drop the requirement on DYNAMIC_FTRACE_WITH_CALL_OPS when
     selecting HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS

   - Fix a false-positive KCSCAN splat in the delay loop

   - Use a portable typedef for 128-bit scalar types in our UAPI headers

   - Non-critical fixes for Sashiko reports all over

  MPAM:

   - Hook MPAM memory bandwidth counters into resctrl's counter
     assignment interface

   - Fix a quirk in the MPAM bandwidth counting on Nvidia T241 so that
     it also applies to 63 bit counters

  Perf:

   - Workarounds for hardware issues in the CMN-S3 PMU (Graviton 5) and
     CPU PMU (NVIDIA Olympus again!)

   - Add support for the DDR PMU on Marvell CN20K SoCs

   - Add support for Picoheart implementations of the DCW PCIe PMU

   - Add support for Channel/Rank/Bank filtering in the CXL PMU driver

   - Add support for 64-bit counters in the CSPMU device

   - Add support for revision 2 of the CMN S3 PMU

  Ptrace:

   - Fix a decade-old bug in our handling of seccomp and tracing on
     syscall entry

   - Fix regset handling for inactive SVE and SSVE registers

  Selftests

   - Add some tests for the decade-old bug that we just tried to fix in
     our syscall entry path

   - Fix SVE test crash on SME-only CPUs"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (95 commits)
  arm64/efi: Avoid voluntary preemption with efi_mm installed
  arm64: bti: Disable in-kernel BTI with recent versions of Clang
  arm64: entry: Avoid unnecessary local_irq_disable() on kernel exit
  irqchip/gic-v3: make the unmasking of pseudo-NMIs explicit when handling IRQs
  arm64: Disable KCSAN instrumentation in delay.o
  arm_mpam: Disable driver unbind to avoid UAF
  arm_mpam: Fix a NULL pointer dereference on unbinding after an error interrupt
  perf: arm_pmuv3: Zero initialize hw_id branch stack field
  arm64: mm: Unmap kernel data/bss entirely from the linear map
  iommu/arm-smmu-v3-sva: Use system_supports_bbml3() to detect CPU feature
  perf/arm-cmn: Support CMN S3 r2
  perf/arm-cmn: Plumb in new filter types
  perf/arm-cmn: Refactor event filter data
  perf/arm-cmn: Refactor event filter programming
  perf/arm-cmn: Rename filter variables for clarity
  arm64: mm: fix accidental linear mapping of no-map reserved memory
  tools: Ensure tools copy of linux/filter.h exports the UAPI
  kselftest/arm64: Fix abi test compilation errors
  arch: arm64: add early_param idle=<wfi|yield|nop>
  arm64: entry: mask DAIF before returning from C EL1 handlers
  ...
Merge branch 'for-next/mpam' into for-next/core 2026-08-14T10:16:09+00:00 Will Deacon will@kernel.org 2026-08-14T10:16:09+00:00 fd2facb9749bf4736bdd47f4b3445b64eb425120 * for-next/mpam: arm_mpam: Disable driver unbind to avoid UAF arm_mpam: Fix a NULL pointer dereference on unbinding after an error interrupt arm_mpam: Apply T241-MPAM-6 to 63-bit counters arm64: mpam: Add memory bandwidth usage (MBWU) documentation arm_mpam: resctrl: Add resctrl_arch_cntr_read() & resctrl_arch_reset_cntr() arm_mpam: resctrl: Add resctrl_arch_config_cntr() for ABMC use arm_mpam: resctrl: Pre-allocate assignable monitors arm_mpam: resctrl: Pick classes for use as MBM counters 
* for-next/mpam:
  arm_mpam: Disable driver unbind to avoid UAF
  arm_mpam: Fix a NULL pointer dereference on unbinding after an error interrupt
  arm_mpam: Apply T241-MPAM-6 to 63-bit counters
  arm64: mpam: Add memory bandwidth usage (MBWU) documentation
  arm_mpam: resctrl: Add resctrl_arch_cntr_read() & resctrl_arch_reset_cntr()
  arm_mpam: resctrl: Add resctrl_arch_config_cntr() for ABMC use
  arm_mpam: resctrl: Pre-allocate assignable monitors
  arm_mpam: resctrl: Pick classes for use as MBM counters
Merge branch 'for-next/errata' into for-next/core 2026-08-14T10:16:08+00:00 Will Deacon will@kernel.org 2026-08-14T10:16:08+00:00 ba3349fc55d2f5de1751a03bd8ccff21b58e8953 * for-next/errata: arch: arm64: add early_param idle=<wfi|yield|nop> arm64: proton-pack: Restore the nospectre_bhb command-line option arm64: errata: work around NVIDIA Olympus device store/load ordering arm64: Clarify ARM64_WORKAROUND_REPEAT_TLBI semantics 
* for-next/errata:
  arch: arm64: add early_param idle=<wfi|yield|nop>
  arm64: proton-pack: Restore the nospectre_bhb command-line option
  arm64: errata: work around NVIDIA Olympus device store/load ordering
  arm64: Clarify ARM64_WORKAROUND_REPEAT_TLBI semantics
Merge branches 'arm/smmu/updates', 'arm/smmu/bindings', 'mediatek', 'qualcomm/msm', 'rockchip', 'ti/omap', 'riscv', 'intel/vt-d', 'amd/amd-vi', 'core' and 'typos' into next 2026-08-11T07:12:19+00:00 Joerg Roedel joerg.roedel@amd.com 2026-08-11T07:12:19+00:00 3c6a2bac15247bc4f28125247ff89165324612fe 






arm64: cpufeature: Extend bbml2_noabort support list
2026-08-06T12:15:30+00:00

Linu Cherian
linu.cherian@arm.com

2026-07-23T04:40:30+00:00

a7ac60414475fdd811575e45ffc45e1f59e404b3

Add below cpus to the midr list, which supports
BBML2_NOABORT.

Cortex A520(AE)
Cortex A715
Cortex A720(AE)
Cortex A725
Neoverse N3
C1-Nano
C1-Pro
C1-Ultra
C1-Premium

C1-Ultra and C1-Premium both suffer from erratum 3683289,
where Break-Before-Make must be followed to avoid a livelock.
For both CPUs, the erratum is fixed from r1p1.
Hence we do not enable BBML2_NOABORT for CPU revisions <= r1p0.

The relevant SDENs are:
* C1-Ultra: https://developer.arm.com/documentation/111077/9-00/
* C1-Premium: https://developer.arm.com/documentation/111078/9-00/

Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Linu Cherian <linu.cherian@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>





Add below cpus to the midr list, which supports
BBML2_NOABORT.

Cortex A520(AE)
Cortex A715
Cortex A720(AE)
Cortex A725
Neoverse N3
C1-Nano
C1-Pro
C1-Ultra
C1-Premium

C1-Ultra and C1-Premium both suffer from erratum 3683289,
where Break-Before-Make must be followed to avoid a livelock.
For both CPUs, the erratum is fixed from r1p1.
Hence we do not enable BBML2_NOABORT for CPU revisions <= r1p0.

The relevant SDENs are:
* C1-Ultra: https://developer.arm.com/documentation/111077/9-00/
* C1-Premium: https://developer.arm.com/documentation/111078/9-00/

Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Linu Cherian <linu.cherian@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>







arm64: mpam: Add memory bandwidth usage (MBWU) documentation
2026-08-02T09:33:43+00:00

Ben Horgan
ben.horgan@arm.com

2026-07-31T17:52:42+00:00

6b4ee75215c9dbcf6a0fd8cf7af2449906e2932c

Memory bandwidth monitoring make uses of MBWU monitors and is now exposed
to the user via resctrl. Add some documentation so the user knows what to
expect.

Co-developed-by: James Morse <james.morse@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Will Deacon <will@kernel.org>





Memory bandwidth monitoring make uses of MBWU monitors and is now exposed
to the user via resctrl. Add some documentation so the user knows what to
expect.

Co-developed-by: James Morse <james.morse@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Will Deacon <will@kernel.org>







arm64: fix cpu-feature-registers Malformed table
2026-07-28T10:28:33+00:00

Randy Dunlap
rdunlap@infradead.org

2026-07-27T00:10:02+00:00

d50a908ffde534596107072c4897cf17c5ccd9e5

The "visible" column was dropped so that last line's extra pieces
should also be dropped to prevent a docs build error:

Documentation/arch/arm64/cpu-feature-registers.rst:170: ERROR: Malformed table.
Right border not aligned or missing.

+------------------------------+---------+
| Name                         |  bits   |
+------------------------------+---------+
| RNDR                         | [63-60] |
+------------------------------+---------+
| TS                           | [55-52] |
+------------------------------+---------+
...
+------------------------------+---------+
| AES                          | [7-4]   |
+------------------------------+---------+---------+ [docutils]

Fixes: bc7f7ddc64df ("arm64: Remove hidden bitfields from cpu-feature-registers.rst")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Will Deacon <will@kernel.org>





The "visible" column was dropped so that last line's extra pieces
should also be dropped to prevent a docs build error:

Documentation/arch/arm64/cpu-feature-registers.rst:170: ERROR: Malformed table.
Right border not aligned or missing.

+------------------------------+---------+
| Name                         |  bits   |
+------------------------------+---------+
| RNDR                         | [63-60] |
+------------------------------+---------+
| TS                           | [55-52] |
+------------------------------+---------+
...
+------------------------------+---------+
| AES                          | [7-4]   |
+------------------------------+---------+---------+ [docutils]

Fixes: bc7f7ddc64df ("arm64: Remove hidden bitfields from cpu-feature-registers.rst")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Will Deacon <will@kernel.org>







iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264
2026-07-28T09:49:47+00:00

Ashish Mhetre
amhetre@nvidia.com

2026-07-26T08:19:04+00:00

06b15ddcfbc04ddd1cf6b339cf80779a68cf9efe

Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
survive an invalidation that races with concurrent traffic targeting
the same entry. The hardware-recommended software workaround is to
issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
that infrastructure is already in place behind
arm_smmu_erratum_repeat_tlbi_cfgi_key.

Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
so DT-probe is the only viable detection path.

Enable the workaround on instances matching the existing
"nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
Documentation/arch/arm64/silicon-errata.rst.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Will Deacon <will@kernel.org>





Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can
survive an invalidation that races with concurrent traffic targeting
the same entry. The hardware-recommended software workaround is to
issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and
that infrastructure is already in place behind
arm_smmu_erratum_repeat_tlbi_cfgi_key.

Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware
detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT
support) and already has a dedicated "nvidia,tegra264-smmu" compatible,
so DT-probe is the only viable detection path.

Enable the workaround on instances matching the existing
"nvidia,tegra264-smmu" compatible by calling static_branch_enable() on
arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in
Documentation/arch/arm64/silicon-errata.rst.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Will Deacon <will@kernel.org>