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path: root/drivers/gpu/drm/amd
AgeCommit message (Expand)Author
26 hoursdrm/amd/display: Read EDID from VBIOS embedded panel infoTimur Kristóf
26 hoursdrm/amd/display: Allow constructing DCE8 link encoder without DDCTimur Kristóf
26 hoursdrm/amd/display: Allow constructing DCE6 link encoder without DDCTimur Kristóf
26 hoursdrm/amd/display: Allow DCE link encoder without AUX registersTimur Kristóf
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v5.0.1 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v5.0.0 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0.5 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0.3 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v3.0 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v2.5 ringYinjie Yao
26 hoursdrm/amdgpu/jpeg: set no_user_fence for JPEG v2.0 ringYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v5.0.1 enc ringYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v5.0.0 enc ringYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v4.0.5 enc ringYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v4.0.3 enc ringYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v4.0 enc ringYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v3.0 enc/dec ringsYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v2.5 enc/dec ringsYinjie Yao
26 hoursdrm/amdgpu/vcn: set no_user_fence for VCN v2.0 enc/dec ringsYinjie Yao
26 hoursdrm/amdgpu/gfx6: Support harvested SI chips with disabled TCCs (v2)Timur Kristóf
26 hoursdrm/amdgpu/uvd3.1: Don't validate the firmware when already validatedTimur Kristóf
26 hoursdrm/amdgpu: fix AMDGPU_INFO_READ_MMR_REGChristian König
26 hoursdrm/amdgpu/gmc: Fix AMDGPU_GART_PLACEMENT_LOW to not overlap with VRAMTimur Kristóf
26 hoursdrm/amdgpu/uvd4.2: Don't initialize UVD 4.2 when DPM is disabledTimur Kristóf
26 hoursdrm/amd/pm/smu7: Add SCLK cap for quirky Hawaii boardTimur Kristóf
26 hoursdrm/amd/pm/ci: Fill DW8 fields from SMCTimur Kristóf
26 hoursdrm/amd/pm/ci: Clear EnabledForActivity field for memory levelsTimur Kristóf
26 hoursdrm/amd/pm/ci: Fix powertune defaults for Hawaii 0x67B0Timur Kristóf
26 hoursdrm/amd/pm/smu7: Fix SMU7 voltage dependency on display clockTimur Kristóf
26 hoursdrm/amd/pm/ci: Disable MCLK DPM on problematic CI ASICsTimur Kristóf
26 hoursdrm/amd/pm/ci: Use highest MCLK on CI when MCLK DPM is disabledTimur Kristóf
26 hoursdrm/amdgpu/gfx11: look at the right prop for gfx queue priorityAlex Deucher
26 hoursdrm/amdgpu/gfx10: look at the right prop for gfx queue priorityAlex Deucher
26 hoursdrm/amdgpu: Add default case in DVI mode validationSrinivasan Shanmugam
26 hoursdrm/amd/pm: Fix xgmi max speed reportingLijo Lazar
7 daysdrm/amdgpu/vcn4: Avoid overflow on msg bound checkBenjamin Cheng
7 daysdrm/amdgpu/vcn3: Avoid overflow on msg bound checkBenjamin Cheng
7 daysdrm/amdgpu: rework how we handle TLB fencesAlex Deucher
7 daysRevert "drm/amdgpu: don't attach the tlb fence for SI"Prike Liang
7 daysdrm/amdgpu: Fix validating flush_gpu_tlb_pasid()Timur Kristóf
7 daysdrm/amdgpu: validate the flush_gpu_tlb_pasid()Prike Liang
7 daysdrm/amdgpu/pm: align Hawaii mclk workaround with radeonAlex Deucher
7 daysdrm/amdgpu/pm: add missing revision check for CIAlex Deucher
7 daysdrm/amdgpu/sdma4: replace BUG_ON with WARN_ON in fence emissionJohn B. Moore
7 daysdrm/amdkfd: Make all TLB-flushes heavy-weightFelix Kuehling
7 daysdrm/amdgpu/gfx9: drop unnecessary 64-bit fence flag check in KIQJohn B. Moore
7 daysdrm/amdgpu: zero-initialize GART table on allocationPhilip Yang
7 daysdrm/amdkfd: validate SVM ioctl nattr against buffer sizeAlysa Liu
7 daysdrm/amd/display: Change dither policy for 10 bpc output back to ditheringMario Kleiner
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