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2026-02-23arm64: defconfig: Enable configs for Qualcomm Glymur SoCPankaj Patil
Enable pinctrl, clocks and interconnect drivers as built-in in order for serial console to be available before kernel reaches "init" on Qualcomm Glymur CRD. Additionally, booting rootfs from NVMe requires TCSRCC to be enabled as module Enable dispcc as module which is a dependency for display enablement Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260219-upstream_v3_glymur_introduction-v8-2-8ce4e489ebb6@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-02-23arm64: dts: qcom: glymur: Enable Glymur CRD board supportPankaj Patil
Add initial device tree support for the Glymur Compute Reference Device(CRD) board, with this board dts glymur crd can boot to shell with rootfs on nvme and uart21 as serial console Features enabled are: - Board and sleep clocks - Volume up/down keys - Regulators 0 - 4 - Power supplies and sideband signals (PERST, WAKE, CLKREQ) for PCIe3b/4/5/6 controllers and PHYs Co-developed-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> Co-developed-by: Qiang Yu <qiang.yu@oss.qualcomm.com> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> Co-developed-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Co-developed-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com> Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260219-upstream_v3_glymur_introduction-v8-4-8ce4e489ebb6@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-02-23arm64: dts: qcom: Introduce Glymur base dtsiPankaj Patil
Introduce the base device tree support for Glymur – Qualcomm's next-generation compute SoC. The new glymur.dtsi describes the core SoC components, including: - CPUs and CPU topology - Interrupt controller and TLMM - GCC,DISPCC and RPMHCC clock controllers - Reserved memory and interconnects - APPS and PCIe SMMU and firmware SCM - Watchdog, RPMHPD, APPS RSC and SRAM - PSCI and PMU nodes - QUPv3 serial engines - CPU power domains and idle states, plus SCMI/ SRAM pieces for CPU DVFS - PDP0 mailbox, IPCC and AOSS - Display clock controller - SPMI PMIC arbiter with SPMI0/1/2 buses - SMP2P nodes - TSENS and thermal zones (8 instances, 92 sensors) Add dtsi files for PMH0101, PMK8850, PMCX0102, SMB2370, PMH0104, PMH0110, PMIC's along with temp-alarm and GPIO nodes needed on Glymur Enabled PCIe controllers and associated PHY to support boot to shell with nvme storage, List of PCIe instances enabled: - PCIe3b - PCIe4 - PCIe5 - PCIe6 Co-developed-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Co-developed-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com> Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com> Co-developed-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Co-developed-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Co-developed-by: Taniya Das <taniya.das@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Co-developed-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> Co-developed-by: Qiang Yu <qiang.yu@oss.qualcomm.com> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Co-developed-by: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com> Signed-off-by: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com> Co-developed-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260219-upstream_v3_glymur_introduction-v8-3-8ce4e489ebb6@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-02-23arm64: dts: qcom: qcm6490-idp: Fix WCD9370 reset GPIO polarityRavi Hothi
The WCD9370 audio codec reset line on QCM6490 IDP should be active-low, but the device tree described it as active-high. As a result, the codec is kept in reset and fails to reset the SoundWire, leading to timeouts and ASoC card probe failure (-ETIMEDOUT). Fix the reset GPIO polarity to GPIO_ACTIVE_LOW so the codec can properly initialize. Fixes: aa04c298619f ("arm64: dts: qcom: qcm6490-idp: Add WSA8830 speakers and WCD9370 headset codec") Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260220090220.2992193-1-ravi.hothi@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-02-23arm64: dts: qcom: hamoa/x1: fix idle exit latencyDaniel J Blueman
Designs based on the Qualcomm X1 Hamoa reference platform report: driver: Idle state 1 target residency too low This is because the declared X1 idle entry plus exit latency of 680us exceeds the declared minimum 600us residency time: entry-latency-us = <180>; exit-latency-us = <500>; min-residency-us = <600>; Fix this to be 320us so the sum of the entry and exit latencies matches the downstream 500us exit latency, as directed by Maulik. Tested on a Lenovo Yoga Slim 7x with Qualcomm X1E-80-100. Fixes: 2e65616ef07f ("arm64: dts: qcom: x1e80100: Update C4/C5 residency/exit numbers") Signed-off-by: Daniel J Blueman <daniel@quora.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260220124626.8611-1-daniel@quora.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-02-23arm64: defconfig: Enable SM8750 clock controllersTaniya Das
Enable the SM8750 video, camera and gpu clock controller for their respective functionalities on the Qualcomm SM8750 MTP boards. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260220-sm8750_defconfig_cc-v1-1-666aa922b392@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-02-23arm64: dts: hisilicon: hikey960/970: Convert to use standard mmc aliasShawn Lin
Convert the long-deprecated mshc alias to standard mmc alias. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23perf/x86/intel/uncore: Add per-scheduler IMC CAS count eventsZide Chen
IMC on SPR and EMR does not support sub-channels. In contrast, CPUs that use gnr_uncores[] (e.g. Granite Rapids and Sierra Forest) implement two command schedulers (SCH0/SCH1) per memory channel, providing logically independent command and data paths. Do not reuse the spr_uncore_imc[] configuration for these CPUs. Instead, introduce a dedicated gnr_uncore_imc[] with per-scheduler events, so userspace can monitor SCH0 and SCH1 independently. On these CPUs, replace cas_count_{read,write} with cas_count_{read,write}_sch{0,1}. This may break existing userspace that relies on cas_count_{read,write}, prompting it to switch to the per-scheduler events, as the legacy event reports only partial traffic (SCH0). Fixes: 632c4bf6d007 ("perf/x86/intel/uncore: Support Granite Rapids") Fixes: cb4a6ccf3583 ("perf/x86/intel/uncore: Support Sierra Forest and Grand Ridge") Reported-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: Zide Chen <zide.chen@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260210005225.20311-1-zide.chen@intel.com
2026-02-23x86/headers: Replace __ASSEMBLY__ stragglers with __ASSEMBLER__Thomas Huth
After converting the __ASSEMBLY__ statements to __ASSEMBLER__ in commit 24a295e4ef1ca ("x86/headers: Replace __ASSEMBLY__ with __ASSEMBLER__ in non-UAPI headers"), some new code has been added that uses __ASSEMBLY__ again. Convert these stragglers, too. This is a mechanical patch, done with a simple "sed -i" command. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251218182029.166993-1-thuth@redhat.com
2026-02-23x86/cfi: Fix CFI rewrite for odd alignmentsPeter Zijlstra
Rustam reported his clang builds did not boot properly; turns out his .config has: CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B=y set. Fix up the FineIBT code to deal with this unusual alignment. Fixes: 931ab63664f0 ("x86/ibt: Implement FineIBT") Reported-by: Rustam Kovhaev <rkovhaev@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Rustam Kovhaev <rkovhaev@gmail.com>
2026-02-23x86/bug: Handle __WARN_printf() trap in early_fixup_exception()Hou Wenlong
The commit 5b472b6e5bd9 ("x86_64/bug: Implement __WARN_printf()") implemented __WARN_printf(), which changed the mechanism to use UD1 instead of UD2. However, it only handles the trap in the runtime IDT handler, while the early booting IDT handler lacks this handling. As a result, the usage of WARN() before the runtime IDT setup can lead to kernel crashes. Since KMSAN is enabled after the runtime IDT setup, it is safe to use handle_bug() directly in early_fixup_exception() to address this issue. Fixes: 5b472b6e5bd9 ("x86_64/bug: Implement __WARN_printf()") Signed-off-by: Hou Wenlong <houwenlong.hwl@antgroup.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/c4fb3645f60d3a78629d9870e8fcc8535281c24f.1768016713.git.houwenlong.hwl@antgroup.com
2026-02-23x86/fred: Correct speculative safety in fred_extint()Andrew Cooper
array_index_nospec() is no use if the result gets spilled to the stack, as it makes the believed safe-under-speculation value subject to memory predictions. For all practical purposes, this means array_index_nospec() must be used in the expression that accesses the array. As the code currently stands, it's the wrong side of irqentry_enter(), and 'index' is put into %ebp across the function call. Remove the index variable and reposition array_index_nospec(), so it's calculated immediately before the array access. Fixes: 14619d912b65 ("x86/fred: FRED entry/exit and dispatch code") Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260106131504.679932-1-andrew.cooper3@citrix.com
2026-02-23sparc: Fix page alignment in dma mappingStian Halseth
'phys' may include an offset within the page, while previously used 'base_paddr' was already page-aligned. This caused incorrect DMA mapping in dma_4u_map_phys and dma_4v_map_phys. Fix both functions by masking 'phys' with IO_PAGE_MASK, covering both generic SPARC code and sun4v. Fixes: 38c0d0ebf520 ("sparc: Use physical address DMA mapping") Reported-by: Stian Halseth <stian@itx.no> Closes: https://github.com/sparclinux/issues/issues/75 Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Stian Halseth <stian@itx.no> Tested-by: Nathaniel Roach <nroach44@nroach44.id.au> Tested-by: Han Gao <gaohan@iscas.ac.cn> # on SPARC Enterprise T5220 [mszyprow: adjusted commit description a bit] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20260218120056.3366-2-stian@itx.no
2026-02-23ARM: dts: aspeed: anacapa: Add retimer EEPROMsDirk Chen
The Anacapa board features Atmel 24C2048 EEPROMs on i2c0 and i2c1, which are used to store retimer configurations. Add the corresponding device tree nodes to support these components. Signed-off-by: Dirk Chen <dirkchen@amd.com> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-02-23arm64: dts: nuvoton: drop unused syscon property from watchdog nodeTomer Maimon
The NPCM8XX DTSI currently includes a 'syscon' phandle in the watchdog node, but this property is not used by any upstream driver and is not documented in the NPCM watchdog binding. Since it was never reviewed and does not form part of the DT ABI, remove it. [arj: Drop 'safely' language in line with Krzysztof's commentary] Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260218184800.2261674-1-tmaimon77@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-02-23ARM: dts: aspeed: anacapa: add NFC deviceCarl Lee
add NFC NXP NCI device support to NFC tag reading Signed-off-by: Carl Lee <carl.lee@amd.com> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-02-23ARM: dts: aspeed: Add Asrock Paul IPMI cardAnirudh Srinivasan
Add device tree for Asrock Paul IPMI card, an AST2500 based PCIe BMC card. Signed-off-by: Anirudh Srinivasan <anirudhsriniv@gmail.com> Link: https://patch.msgid.link/20260125-asrock-paul-v1-2-956085a4bd06@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-02-23ARM: dts: aspeed: Add 128M alt flash layout to NVIDIA MSX4Marc Olberding
Add a 128M layout for the BMC flash chip we didn't boot from. Including this allows the user to write to each partition on the alternate spi chip. This dtsi follows the existing standard of using the same layout as non alt version and prepending `alt` to each partition's name. [arj: Update subject, elide test demonstration] Signed-off-by: Marc Olberding <molberding@nvidia.com> Link: https://patch.msgid.link/20260120-alt-128-v4-1-0e5c491a532c@nvidia.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-02-23ARM: dts: aspeed: Add Asus Kommando IPMI cardAnirudh Srinivasan
Add device tree for Asus Kommando IPMI Expansion card, an AST2600 based PCIe BMC card. Signed-off-by: Anirudh Srinivasan <anirudhsriniv@gmail.com> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2026-02-22arm64: dts: rockchip: Describe HDMI supplies for nanopi4 boardsRobin Murphy
We already describe the 0v9 and 1v8 rails used for analog supplies on the nanopi4 boards, so hook them up to make the HDMI driver happy too. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://patch.msgid.link/8c1837976937a0ef03811109ca12f353c4d5e67d.1767111968.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Clean up NanoPi-R2S Plus gmac2ioRobin Murphy
Apparently something went wonky in the refactoring, and NanoPi R2S Plus has ended up "overriding" the GMAC properties from the base R2S include with all identical values. Clean up the redundancy. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://patch.msgid.link/94f66f34d6023887111884093f31a8980e993ef9.1767111968.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: add pwm-fan for NanoPC-T6Hugh Cole-Baker
FriendlyELEC offers an optional heatsink and fan addon [1] for the NanoPC-T6 and T6 LTS, which plugs in to the fan connector on the board driven by pwm1. Add the fan as an active cooling device for the SoC package. The PWM duty cycle values are taken from the vendor's source [2]. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> [1]: https://www.friendlyelec.com/index.php?route=product/product&product_id=305 [2]: https://github.com/friendlyarm/kernel-rockchip/blob/4944602540b62f5aad139fe602a76cf7c3176128/arch/arm64/boot/dts/rockchip/rk3588-nanopi6-rev01.dts#L75-L90 Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://patch.msgid.link/20260125181228.25145-1-sigmaris@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Add rk3576 evb2 boardChaoyi Chen
General features for rk3576 evb2 board: - Rockchip RK3576 - LPDDR4/4X - eMMC5.1 - RK806-2x2pcs + DiscretePower - 1x HDMI2.1 TX / HDMI2.0 RX - 1x full size DP1.4 TX (Only 2 Lanes) - 2x 10/100/1000M Ethernet - 5x SATA3.0 7Pin Slot - 2x USB3.2 Gen1 Host - 3x USB2.0 Host - WIFI/BT - ... Tested with eMMC/SDMMC/HDMI/USB/Ethernet/WIFI/BT module. Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com> Reviewed-by: Alexey Charkov <alchark@gmail.com> Link: https://patch.msgid.link/20260131081438.100-3-kernel@airkyi.com [added "s" to usb-hub preferred reset-gpio(s) - caused dtbs check errors] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Add overlay for FriendlyElec HD702ERobin Murphy
Add an overlay to support FriendlyElec's HD702E 7" eDP LCD touchscreen module for the NanoPC-T4 board: https://www.friendlyelec.com/index.php?route=product/product&path=81&product_id=230 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://patch.msgid.link/2bbc2e62ae9b54ac7594355001ce2b15885d3493.1769191673.git.robin.murphy@arm.com [changed edp-panel auxbus node to panel to conform to the binding] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Move RK3399 eDP pinctrl to boardsRobin Murphy
The EDP_HOTPLUG pin is optional, and muxed with other functions (notably HDMI CEC), so move its selection from the SoC DTSI to the boards which apparently want it, namely those which enable eDP without "force-hpd". By the same token we drop it from Pinebook Pro, which already uses "force-hpd", and according to the schematics does not have the pin wired at all. Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://patch.msgid.link/c7d972d07875241805db8659305b26bd694867d4.1769191673.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: add overlay for qnap-ts133 device revisionHeiko Stuebner
TS433 devices received a board revision adding gpios for per hard-disk presence-detection and power-control. These boards have a PCB-id of at least 13 which can be read from an EEPROM. The presence detection is not really necessary and there are also no existing bindings for doing something with it. So add them as gpio hog to at least document them and allow its state to be read from debugfs. The power-control is modelled as regulator, with connected to the RK3568's SATA controller as target-supply. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260201191804.41421-5-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: add overlay for qnap-ts233 device revisionHeiko Stuebner
TS233 devices received a board revision adding gpios for per hard-disk presence-detection and power-control. These boards have a PCB-id of at least 12 (mainboard) and 11 (backplane), which can be read from an EEPROM. The presence detection is not really necessary and there are also no existing bindings for doing something with it. So add them as gpio hogs to at least document them and allow their state to be read from debugfs. The power-control is modelled as regulators, with the hdd1+hdd2 variants connected to the RK3568's SATA controllers as target-supplies. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260201191804.41421-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: add overlay for qnap-ts433 device revisionHeiko Stuebner
TS433 devices received a board revision adding gpios for per hard-disk presence-detection and power-control. These board have a PCB-id of at least 12 (mainboard) and 10 (backplane), which can be read from an EEPROM. The presence detection is not really necessary and there are also no existing bindings for doing something with it. So add them as gpio hogs to at least document them and allow their state to be read from debugfs. The power-control is modelled as regulators, with the hdd1+hdd2 variants connected to the RK3568's SATA controllers as target-supplies. The JMicron AHCI controller on PCIe didn't have bindings for that, I could find, so they get an always-on state for now. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260201191804.41421-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Add port subnodes to RK356x SATA controllersHeiko Stuebner
The SATA controllers on RK356x are identical to the ones found on RK3588, but don't yet provide a port sub-node. Per the datasheet the RK356x also supports the fbscp capability and has the same queue maximums. So add port sub-nodes to both sata controllers on RK356x, and move the phy properties to it. Also add phandles to the ports, so that boards can add their target-supply when available. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260201191804.41421-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: add Awinic aw87391 amplifiers for Anbernic RG-DSChris Morgan
Add support for the two Awinic aw87391 audio amplifiers used in the Anbernic RG-DS. These amplifiers require a specific init sequence to start which is usually provided by a firmware file, but in our case the manufacturer only provided the sequence. As a result, we hard-code a device specific compatible. Additionally, add support for the VDD regulator used to power both amplifiers. Note that the amps can accept and respond to i2c commands even without regulator power (perhaps due to a secondary power source) but cannot play audio. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://patch.msgid.link/20260128174608.1498-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Add supply for pd_rkvdec and pd_venc on rk3388-evbsShawn Lin
The power domains pd_rkvdec0/1 and pd_venc0/1 depend on two voltage supplies, vdd_vdenc_s0 and vdd_vdenc_mem_s0. These supplies might be missing or cause probe deferral. Since the Rockchip power domain management code currently supports managing only one power supply, and both supplies belong to the same PMIC (making it highly unlikely for one to be available while the other is not), a practical solution is implemented. Both supplies are configured with the boot-on and always-on properties. Only one of them is assigned as the domain-supply for pd_rkvdec0/1 and pd_venc0/1. This allows the power domain code to perform a nominal enable operation on this single supply, thereby successfully acquiring a reference to both supplies (as they are from the same PMIC). The system then relies on their boot-on and always-on flags to maintain the correct state. Crucially, this approach handles cases like probe deferral correctly: if the PMIC is not yet ready, enabling the power domain will be deferred until the necessary supplies become available. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/1770950113-19802-2-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: add node name for RK3588_PD_RKVDEC0/1 and ↵Shawn Lin
RK3588_PD_VENC0/1 Thus the board dts files could add property for these nodes. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/1770950113-19802-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Add OneThing Edge Cube seriesJun Yan
The OneThing Edge Cube (OEC) series features the RK3566 SoC, 8GB eMMC storage, and supports one SATA interface, one Gigabit Ethernet port, and one USB 3.0 port. Other than the difference in RAM capacity, the OEC and OEC-turbo are identical in all other specifications. Specification: - Rockchip RK3566 - LPDDR4X 2GB (OEC) / 4GB (OEC-turbo) - eMMC 8GB - Gigabit Ethernet port x 1 - USB 3.0 port x 1 - USB-C 2.0 port x 1 - 12V DC Power supply - SATA 3.0 connector x 1 These devices do not have a PMIC, and their hardware circuit design is highly similar to that of the rk3566-box-demo[1]. Hardware schematics are not available at this time, with the vendor firmware dts available for reference[2]. Ethernet, USB 3.0 and SATA 3.0 ports tested, all working well. [1] https://elixir.bootlin.com/linux/v6.18.6/source/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts [2] https://archive.org/download/wxy-oec-RK3566-4G-dump/wxy-oec-RK3566-4G-dump.dts Signed-off-by: Jun Yan <jerrysteve1101@gmail.com> Link: https://patch.msgid.link/20260214021719.620752-4-jerrysteve1101@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22arm64: dts: rockchip: Add DisplayPort dt node for rk3576Andy Yan
The DisplayPort on rk3576 is compliant with DisplayPort Specification Version 1.4 with MST support, and share the USBDP combo PHY with USB 3.1 OTG0 controller. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://patch.msgid.link/20260206010421.443605-6-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22Revert "arm64: dts: rockchip: Further describe the WiFi for the Pinebook Pro"Heiko Stuebner
This reverts commit 6d54d935062e2d4a7d3f779ceb9eeff108d0535d. It seems there are different variants of the Wifi chipset in use on the Pinebook Pro. And according to the reported regression - see Closes below, the reverted change causes issues with one Wifi chipset. The original commit message indicates a "further description" only and does not indicate this would fix an actual problem, so a revert should not cause further problems. Fixes: 6d54d935062e ("arm64: dts: rockchip: Further describe the WiFi for the Pinebook Pro") Cc: Jan Palus <jpalus@fastmail.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Thorsten Leemhuis <regressions@leemhuis.info> Cc: stable@vger.kernel.org Closes: https://lore.kernel.org/r/aUKOlj-RvTYlrpiS@rock.grzadka/ Tested-by: Jan Palus <jpalus@fastmail.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260210120142.698512-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-02-22KVM: arm64: Fix protected mode handling of pages larger than 4kBMarc Zyngier
Since 3669ddd8fa8b5 ("KVM: arm64: Add a range to pkvm_mappings"), pKVM tracks the memory that has been mapped into a guest in a side data structure. Crucially, it uses it to find out whether a page has already been mapped, and therefore refuses to map it twice. So far, so good. However, this very patch completely breaks non-4kB page support, with guests being unable to boot. The most obvious symptom is that we take the same fault repeatedly, and not making forward progress. A quick investigation shows that this is because of the above rejection code. As it turns out, there are multiple issues at play: - while the HPFAR_EL2 register gives you the faulting IPA minus the bottom 12 bits, it will still give you the extra bits that are part of the page offset for anything larger than 4kB, even for a level-3 mapping - pkvm_pgtable_stage2_map() assumes that the address passed as a parameter is aligned to the size of the intended mapping - the faulting address is only aligned for a non-page mapping When the planets are suitably aligned (pun intended), the guest faults on a page by accessing it past the bottom 4kB, and extra bits get set in the HPFAR_EL2 register. If this results in a page mapping (which is likely with large granule sizes), nothing aligns it further down, and pkvm_mapping_iter_first() finds an intersection that doesn't really exist. We assume this is a spurious fault and return -EAGAIN. And again... This doesn't hit outside of the protected code, as the page table code always aligns the IPA down to a page boundary, hiding the issue for everyone else. Fix it by always forcing the alignment on vma_pagesize, irrespective of the value of vma_pagesize. Fixes: 3669ddd8fa8b5 ("KVM: arm64: Add a range to pkvm_mappings") Reviewed-by: Fuad Tabba <tabba@google.com> Tested-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://https://patch.msgid.link/20260222141000.3084258-1-maz@kernel.org Cc: stable@vger.kernel.org
2026-02-22Convert remaining multi-line kmalloc_obj/flex GFP_KERNEL usesKees Cook
Conversion performed via this Coccinelle script: // SPDX-License-Identifier: GPL-2.0-only // Options: --include-headers-for-types --all-includes --include-headers --keep-comments virtual patch @gfp depends on patch && !(file in "tools") && !(file in "samples")@ identifier ALLOC = {kmalloc_obj,kmalloc_objs,kmalloc_flex, kzalloc_obj,kzalloc_objs,kzalloc_flex, kvmalloc_obj,kvmalloc_objs,kvmalloc_flex, kvzalloc_obj,kvzalloc_objs,kvzalloc_flex}; @@ ALLOC(... - , GFP_KERNEL ) $ make coccicheck MODE=patch COCCI=gfp.cocci Build and boot tested x86_64 with Fedora 42's GCC and Clang: Linux version 6.19.0+ (user@host) (gcc (GCC) 15.2.1 20260123 (Red Hat 15.2.1-7), GNU ld version 2.44-12.fc42) #1 SMP PREEMPT_DYNAMIC 1970-01-01 Linux version 6.19.0+ (user@host) (clang version 20.1.8 (Fedora 20.1.8-4.fc42), LLD 20.1.8) #1 SMP PREEMPT_DYNAMIC 1970-01-01 Signed-off-by: Kees Cook <kees@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21Convert more 'alloc_obj' cases to default GFP_KERNEL argumentsLinus Torvalds
This converts some of the visually simpler cases that have been split over multiple lines. I only did the ones that are easy to verify the resulting diff by having just that final GFP_KERNEL argument on the next line. Somebody should probably do a proper coccinelle script for this, but for me the trivial script actually resulted in an assertion failure in the middle of the script. I probably had made it a bit _too_ trivial. So after fighting that far a while I decided to just do some of the syntactically simpler cases with variations of the previous 'sed' scripts. The more syntactically complex multi-line cases would mostly really want whitespace cleanup anyway. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21Convert 'alloc_flex' family to use the new default GFP_KERNEL argumentLinus Torvalds
This is the exact same thing as the 'alloc_obj()' version, only much smaller because there are a lot fewer users of the *alloc_flex() interface. As with alloc_obj() version, this was done entirely with mindless brute force, using the same script, except using 'flex' in the pattern rather than 'objs*'. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21Convert 'alloc_obj' family to use the new default GFP_KERNEL argumentLinus Torvalds
This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook
This is the result of running the Coccinelle script from scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to avoid scalar types (which need careful case-by-case checking), and instead replace kmalloc-family calls that allocate struct or union object instances: Single allocations: kmalloc(sizeof(TYPE), ...) are replaced with: kmalloc_obj(TYPE, ...) Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...) are replaced with: kmalloc_objs(TYPE, COUNT, ...) Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...) are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...) (where TYPE may also be *VAR) The resulting allocations no longer return "void *", instead returning "TYPE *". Signed-off-by: Kees Cook <kees@kernel.org>
2026-02-20Merge tag 'kmalloc_obj-prep-v7.0-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux Pull kmalloc_obj prep from Kees Cook: "Fixes for return types to prepare for the kmalloc_obj treewide conversion, that haven't yet appeared during the merge window: dm-crypt, dm-zoned, drm/msm, and arm64 kvm" * tag 'kmalloc_obj-prep-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: KVM: arm64: vgic: Handle const qualifier from gic_kvm_info allocation type drm/msm: Adjust msm_iommu_pagetable_prealloc_allocate() allocation type dm: dm-zoned: Adjust dmz_load_mapping() allocation type dm-crypt: Adjust crypt_alloc_tfms_aead() allocation type
2026-02-20Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linuxLinus Torvalds
Pull ARM updates from Russell King: - avoid %pK for ARM MM prints - implement ARCH_HAS_CC_CAN_LINK to ensure runnable user progs - handle BE8 and BE32 for user progs * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux: ARM: 9470/1: Handle BE8 vs BE32 in ARCH_CC_CAN_LINK ARM: 9469/1: Implement ARCH_HAS_CC_CAN_LINK ARM: 9467/1: mm: Don't use %pK through printk
2026-02-20Merge tag 'efi-fixes-for-v7.0-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi Pull EFI fixes from Ard Biesheuvel: "Mixed bag of EFI tweaks and bug fixes: - Add a missing symbol export spotted by Arnd's randconfig testing - Fix kexec from a kernel booted with 'noefi' - Fix memblock handling of the unaccepted memory table - Constify an occurrence of struct efivar_operations - Add Ilias as EFI reviewer" * tag 'efi-fixes-for-v7.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi: efi: Align unaccepted memory range to page boundary efi: Fix reservation of unaccepted memory table MAINTAINERS: Add a reviewer entry for EFI efi: stmm: Constify struct efivar_operations x86/kexec: Copy ACPI root pointer address from config table efi: export sysfb_primary_display for EDID
2026-02-20Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "Two arm64 fixes: one fixes a warning that started showing up with gcc 16 and the other fixes a lockup in udelay() when running on a vCPU loaded on a CPU with the new-fangled WFIT instruction: - Fix compiler warning from huge_pte_clear() with GCC 16 - Fix hang in udelay() on systems with WFIT by consistently using the virtual counter to calculate the delta" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: hugetlbpage: avoid unused-but-set-parameter warning (gcc-16) arm64: Force the use of CNTVCT_EL0 in __delay()
2026-02-20Merge tag 's390-7.0-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Heiko Carstens: - Make KEXEC_SIG available again for CONFIG_MODULES=n - The s390 topology code used to call rebuild_sched_domains() before common code scheduling domains were setup. This was silently ignored by common code, but now results in a warning. Address by avoiding the early call - Convert debug area lock from spinlock to raw spinlock to address lockdep warnings - The recent 3490 tape device driver rework resulted in a different device driver name, which is visible via sysfs for user space. This breaks at least one user space application. Change the device driver name back to its old name to fix this * tag 's390-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/tape: Fix device driver name s390/debug: Convert debug area lock from a spinlock to a raw spinlock s390/smp: Avoid calling rebuild_sched_domains() early s390/kexec: Make KEXEC_SIG available when CONFIG_MODULES=n
2026-02-20Merge tag 'xtensa-20260219' of https://github.com/jcmvbkbc/linux-xtensaLinus Torvalds
Pull Xtensa update from Max Filippov: - fix unhandled case in the load/store fault handler in configurations with MMU * tag 'xtensa-20260219' of https://github.com/jcmvbkbc/linux-xtensa: xtensa: align: validate access in fast_load_store
2026-02-20Merge tag 'for-linus-7.0-rc1a-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fix from Juergen Gross: "A single patch fixing a boot regression when running as a Xen PV guest. This issue was introduced in this merge window" * tag 'for-linus-7.0-rc1a-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: x86/xen: Fix Xen PV guest boot
2026-02-20Merge tag 'hyperv-next-signed-20260218' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull Hyper-V updates from Wei Liu: - Debugfs support for MSHV statistics (Nuno Das Neves) - Support for the integrated scheduler (Stanislav Kinsburskii) - Various fixes for MSHV memory management and hypervisor status handling (Stanislav Kinsburskii) - Expose more capabilities and flags for MSHV partition management (Anatol Belski, Muminul Islam, Magnus Kulke) - Miscellaneous fixes to improve code quality and stability (Carlos López, Ethan Nelson-Moore, Li RongQing, Michael Kelley, Mukesh Rathor, Purna Pavan Chandra Aekkaladevi, Stanislav Kinsburskii, Uros Bizjak) - PREEMPT_RT fixes for vmbus interrupts (Jan Kiszka) * tag 'hyperv-next-signed-20260218' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: (34 commits) mshv: Handle insufficient root memory hypervisor statuses mshv: Handle insufficient contiguous memory hypervisor status mshv: Introduce hv_deposit_memory helper functions mshv: Introduce hv_result_needs_memory() helper function mshv: Add SMT_ENABLED_GUEST partition creation flag mshv: Add nested virtualization creation flag Drivers: hv: vmbus: Simplify allocation of vmbus_evt mshv: expose the scrub partition hypercall mshv: Add support for integrated scheduler mshv: Use try_cmpxchg() instead of cmpxchg() x86/hyperv: Fix error pointer dereference x86/hyperv: Reserve 3 interrupt vectors used exclusively by MSHV Drivers: hv: vmbus: Use kthread for vmbus interrupts on PREEMPT_RT x86/hyperv: Remove ASM_CALL_CONSTRAINT with VMMCALL insn x86/hyperv: Use savesegment() instead of inline asm() to save segment registers mshv: fix SRCU protection in irqfd resampler ack handler mshv: make field names descriptive in a header struct x86/hyperv: Update comment in hyperv_cleanup() mshv: clear eventfd counter on irqfd shutdown x86/hyperv: Use memremap()/memunmap() instead of ioremap_cache()/iounmap() ...
2026-02-19Merge tag 'bpf-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpfLinus Torvalds
Pull bpf fixes from Alexei Starovoitov: - Fix invalid write loop logic in libbpf's bpf_linker__add_buf() (Amery Hung) - Fix a potential use-after-free of BTF object (Anton Protopopov) - Add feature detection to libbpf and avoid moving arena global variables on older kernels (Emil Tsalapatis) - Remove extern declaration of bpf_stream_vprintk() from libbpf headers (Ihor Solodrai) - Fix truncated netlink dumps in bpftool (Jakub Kicinski) - Fix map_kptr grace period wait in bpf selftests (Kumar Kartikeya Dwivedi) - Remove hexdump dependency while building bpf selftests (Matthieu Baerts) - Complete fsession support in BPF trampolines on riscv (Menglong Dong) * tag 'bpf-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf: selftests/bpf: Remove hexdump dependency libbpf: Remove extern declaration of bpf_stream_vprintk() selftests/bpf: Use vmlinux.h in test_xdp_meta bpftool: Fix truncated netlink dumps libbpf: Delay feature gate check until object prepare time libbpf: Do not use PROG_TYPE_TRACEPOINT program for feature gating bpf: Add a map/btf from a fd array more consistently selftests/bpf: Fix map_kptr grace period wait selftests/bpf: enable fsession_test on riscv64 selftests/bpf: Adjust selftest due to function rename bpf, riscv: add fsession support for trampolines bpf: Fix a potential use-after-free of BTF object bpf, riscv: introduce emit_store_stack_imm64() for trampoline libbpf: Fix invalid write loop logic in bpf_linker__add_buf() libbpf: Add gating for arena globals relocation feature
generated by cgit v1.2.3 (git 2.25.1) at 2026-07-15 23:09:22 +0000