linux-stable.git/tools/testing/selftests/kvm/include, branch linux-6.16.y Linux kernel stable tree Merge tag 'kvm-x86-selftests-6.16' of https://github.com/kvm-x86/linux into HEAD 2025-05-27T16:15:26+00:00 Paolo Bonzini pbonzini@redhat.com 2025-05-27T16:15:26+00:00 3e0797f6dd78178758ea33c3e82fc079079cf772 KVM selftests changes for 6.16: - Add support for SNP to the various SEV selftests. - Add a selftest to verify fastops instructions via forced emulation. - Add MGLRU support to the access tracking perf test. 
KVM selftests changes for 6.16:

 - Add support for SNP to the various SEV selftests.

 - Add a selftest to verify fastops instructions via forced emulation.

 - Add MGLRU support to the access tracking perf test.
Merge tag 'kvm-riscv-6.16-1' of https://github.com/kvm-riscv/linux into HEAD 2025-05-26T20:27:00+00:00 Paolo Bonzini pbonzini@redhat.com 2025-05-26T20:27:00+00:00 1f7c9d52b12ded6c99b5623d1e81bba7bb76c2f4 KVM/riscv changes for 6.16 - Add vector registers to get-reg-list selftest - VCPU reset related improvements - Remove scounteren initialization from VCPU reset - Support VCPU reset from userspace using set_mpstate() ioctl 
KVM/riscv changes for 6.16

- Add vector registers to get-reg-list selftest
- VCPU reset related improvements
- Remove scounteren initialization from VCPU reset
- Support VCPU reset from userspace using set_mpstate() ioctl
KVM: riscv: selftests: Decode stval to identify exact exception type 2025-05-21T04:04:37+00:00 Atish Patra atishp@rivosinc.com 2025-04-30T08:16:29+00:00 3608b174ece5633dbd1f9afe37a48a2a9a0f0499 Currently, the sbi_pmu_test continues if the exception type is illegal instruction because access to hpmcounter will generate that. However illegal instruction exception may occur due to the other reasons which should result in test assertion. Use the stval to decode the exact type of instructions and which csrs are being accessed if it is csr access instructions. Assert in all cases except if it is a csr access instructions that access valid PMU related registers. Take this opportunity to remove the CSR_CYCLEH reference as the test is compiled for RV64 only. Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-2-eea270ff080b@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org> 
Currently, the sbi_pmu_test continues if the exception type is illegal
instruction because access to hpmcounter will generate that. However
illegal instruction exception may occur due to the other reasons
which should result in test assertion.

Use the stval to decode the exact type of instructions and which csrs are
being accessed if it is csr access instructions. Assert in all cases
except if it is a csr access instructions that access valid PMU related
registers.

Take this opportunity to remove the CSR_CYCLEH reference as the test is
compiled for RV64 only.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-2-eea270ff080b@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
KVM: riscv: selftests: Align the trap information wiht pt_regs 2025-05-21T04:04:35+00:00 Atish Patra atishp@rivosinc.com 2025-04-30T08:16:28+00:00 e23bb06b17f81982450beb880b9c5a7fb4251164 The current exeception register structure in selftests are missing few registers (e.g stval). Instead of adding it manually, change the ex_regs to align with pt_regs to make it future proof. Suggested-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-1-eea270ff080b@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org> 
The current exeception register structure in selftests are missing
few registers (e.g stval). Instead of adding it manually, change
the ex_regs to align with pt_regs to make it future proof.

Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250430-kvm_selftest_improve-v3-1-eea270ff080b@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
KVM: selftests: Add ucall test support for LoongArch 2025-05-20T12:20:26+00:00 Bibo Mao maobibo@loongson.cn 2025-05-20T12:20:26+00:00 304b93b1a044de4050651e6bcb931581f9e0386f Add ucall test support for LoongArch, ucall method on LoongArch uses undefined mmio area. It will cause vCPU exiting to hypervisor so that hypervisor can communicate with vCPU. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 
Add ucall test support for LoongArch, ucall method on LoongArch uses
undefined mmio area. It will cause vCPU exiting to hypervisor so that
hypervisor can communicate with vCPU.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
KVM: selftests: Add KVM selftests header files for LoongArch 2025-05-20T12:20:23+00:00 Bibo Mao maobibo@loongson.cn 2025-05-20T12:20:23+00:00 21872c74b07b5f2e29f7bf7a8981e1e84c3ed5f7 Add KVM selftests header files for LoongArch, including processor.h and kvm_util_arch.h. It mainly contains LoongArch CSR register and page table entry definition. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 
Add KVM selftests header files for LoongArch, including processor.h
and kvm_util_arch.h. It mainly contains LoongArch CSR register and page
table entry definition.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
KVM: selftests: Add VM_MODE_P47V47_16K VM mode 2025-05-20T12:20:23+00:00 Bibo Mao maobibo@loongson.cn 2025-05-20T12:20:23+00:00 a5460d191915e420c1c2bd52c6963d416eb9172a On LoongArch system, 16K page is used in general and GVA width is 47 bit while GPA width is 47 bit also, here add new VM mode VM_MODE_P47V47_16K. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 
On LoongArch system, 16K page is used in general and GVA width is 47 bit
while GPA width is 47 bit also, here add new VM mode VM_MODE_P47V47_16K.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
KVM: selftests: access_tracking_perf_test: Use MGLRU for access tracking 2025-05-16T19:58:21+00:00 James Houghton jthoughton@google.com 2025-05-08T18:46:48+00:00 d166453ebd2925edde24872d9b8ac60065eb0618 Use MGLRU's debugfs interface to do access tracking instead of page_idle. The logic to use the page_idle bitmap is left in, as it is useful for kernels that do not have MGLRU built in. When MGLRU is enabled, page_idle will report pages as still idle even after being accessed, as MGLRU doesn't necessarily clear the Idle folio flag when accessing an idle page, so the test will not attempt to use page_idle if MGLRU is enabled but otherwise not usable. Aging pages with MGLRU is much faster than marking pages as idle with page_idle. Co-developed-by: Axel Rasmussen <axelrasmussen@google.com> Signed-off-by: Axel Rasmussen <axelrasmussen@google.com> Signed-off-by: James Houghton <jthoughton@google.com> Link: https://lore.kernel.org/r/20250508184649.2576210-8-jthoughton@google.com [sean: print parsed features, not raw string] Signed-off-by: Sean Christopherson <seanjc@google.com> 
Use MGLRU's debugfs interface to do access tracking instead of
page_idle. The logic to use the page_idle bitmap is left in, as it is
useful for kernels that do not have MGLRU built in.

When MGLRU is enabled, page_idle will report pages as still idle even
after being accessed, as MGLRU doesn't necessarily clear the Idle folio
flag when accessing an idle page, so the test will not attempt to use
page_idle if MGLRU is enabled but otherwise not usable.

Aging pages with MGLRU is much faster than marking pages as idle with
page_idle.

Co-developed-by: Axel Rasmussen <axelrasmussen@google.com>
Signed-off-by: Axel Rasmussen <axelrasmussen@google.com>
Signed-off-by: James Houghton <jthoughton@google.com>
Link: https://lore.kernel.org/r/20250508184649.2576210-8-jthoughton@google.com
[sean: print parsed features, not raw string]
Signed-off-by: Sean Christopherson <seanjc@google.com>
KVM: selftests: access_tracking_perf_test: Add option to skip the sanity check 2025-05-16T18:45:12+00:00 Maxim Levitsky mlevitsk@redhat.com 2025-05-08T18:46:43+00:00 26dcdfa01c33b4b52fd8bd3798dc221a9de7529c Add an option to skip sanity check of number of still idle pages, and set it by default to skip, in case hypervisor or NUMA balancing is detected. Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Co-developed-by: James Houghton <jthoughton@google.com> Signed-off-by: James Houghton <jthoughton@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20250508184649.2576210-3-jthoughton@google.com Signed-off-by: Sean Christopherson <seanjc@google.com> 
Add an option to skip sanity check of number of still idle pages,
and set it by default to skip, in case hypervisor or NUMA balancing
is detected.

Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Co-developed-by: James Houghton <jthoughton@google.com>
Signed-off-by: James Houghton <jthoughton@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Link: https://lore.kernel.org/r/20250508184649.2576210-3-jthoughton@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
KVM: selftests: Add library support for interacting with SNP 2025-05-02T19:32:33+00:00 Pratik R. Sampat prsampat@amd.com 2025-03-05T22:59:57+00:00 3bf3e0a521237681d5353cca741474aa8c4e16de Extend the SEV library to include support for SNP ioctl() wrappers, which aid in launching and interacting with a SEV-SNP guest. Signed-off-by: Pratik R. Sampat <prsampat@amd.com> Link: https://lore.kernel.org/r/20250305230000.231025-8-prsampat@amd.com [sean: use BIT()] Signed-off-by: Sean Christopherson <seanjc@google.com> 
Extend the SEV library to include support for SNP ioctl() wrappers,
which aid in launching and interacting with a SEV-SNP guest.

Signed-off-by: Pratik R. Sampat <prsampat@amd.com>
Link: https://lore.kernel.org/r/20250305230000.231025-8-prsampat@amd.com
[sean: use BIT()]
Signed-off-by: Sean Christopherson <seanjc@google.com>