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<title>linux-stable.git/tools/power, branch v5.13.2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>tools/power/x86/intel-speed-select: Fix uncore memory frequency display</title>
<updated>2021-07-14T15:06:35+00:00</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2021-05-12T10:17:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8104b56965e17bf9c8800274a0fcc9353f877ba5'/>
<id>8104b56965e17bf9c8800274a0fcc9353f877ba5</id>
<content type='text'>
[ Upstream commit 159f130f60f402273b235801d1fde3fc115c6795 ]

The uncore memory frequency value from the mailbox command
CONFIG_TDP_GET_MEM_FREQ needs to be scaled based on the platform for
display. There is no single constant multiplier.

This change introduces CPU model specific memory frequency multiplier.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 159f130f60f402273b235801d1fde3fc115c6795 ]

The uncore memory frequency value from the mailbox command
CONFIG_TDP_GET_MEM_FREQ needs to be scaled based on the platform for
display. There is no single constant multiplier.

This change introduces CPU model specific memory frequency multiplier.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux</title>
<updated>2021-05-05T19:24:29+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-05-05T19:24:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d8cb379cda885ac172454d7e680da65ebd6676b1'/>
<id>d8cb379cda885ac172454d7e680da65ebd6676b1</id>
<content type='text'>
Pull turbostat updates from Len Brown:
 "Bug fixes and a smattering of features"

* 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: (21 commits)
  tools/power turbostat: version 2021.05.04
  tools/power turbostat: Support "turbostat --hide idle"
  tools/power turbostat: elevate priority of interval mode
  tools/power turbostat: formatting
  tools/power turbostat: rename tcc variables
  tools/power turbostat: add TCC Offset support
  tools/power turbostat: save original CPU model
  tools/power turbostat: Fix Core C6 residency on Atom CPUs
  tools/power turbostat: Print the C-state Pre-wake settings
  tools/power turbostat: Enable tsc_tweak for Elkhart Lake and Jasper Lake
  tools/power turbostat: unmark non-kernel-doc comment
  tools/power/turbostat: Remove Package C6 Retention on Ice Lake Server
  tools/power turbostat: Fix offset overflow issue in index converting
  tools/power/turbostat: Fix turbostat for AMD Zen CPUs
  tools/power turbostat: update version number
  tools/power turbostat: Fix DRAM Energy Unit on SKX
  Revert "tools/power turbostat: adjust for temperature offset"
  tools/power turbostat: Support Ice Lake D
  tools/power turbostat: Support Alder Lake Mobile
  tools/power turbostat: print microcode patch level
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull turbostat updates from Len Brown:
 "Bug fixes and a smattering of features"

* 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: (21 commits)
  tools/power turbostat: version 2021.05.04
  tools/power turbostat: Support "turbostat --hide idle"
  tools/power turbostat: elevate priority of interval mode
  tools/power turbostat: formatting
  tools/power turbostat: rename tcc variables
  tools/power turbostat: add TCC Offset support
  tools/power turbostat: save original CPU model
  tools/power turbostat: Fix Core C6 residency on Atom CPUs
  tools/power turbostat: Print the C-state Pre-wake settings
  tools/power turbostat: Enable tsc_tweak for Elkhart Lake and Jasper Lake
  tools/power turbostat: unmark non-kernel-doc comment
  tools/power/turbostat: Remove Package C6 Retention on Ice Lake Server
  tools/power turbostat: Fix offset overflow issue in index converting
  tools/power/turbostat: Fix turbostat for AMD Zen CPUs
  tools/power turbostat: update version number
  tools/power turbostat: Fix DRAM Energy Unit on SKX
  Revert "tools/power turbostat: adjust for temperature offset"
  tools/power turbostat: Support Ice Lake D
  tools/power turbostat: Support Alder Lake Mobile
  tools/power turbostat: print microcode patch level
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: version 2021.05.04</title>
<updated>2021-05-05T00:01:09+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2021-05-04T23:58:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3c070b2abf85b92455c2721d0a9edc68893ab6c1'/>
<id>3c070b2abf85b92455c2721d0a9edc68893ab6c1</id>
<content type='text'>
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: Support "turbostat --hide idle"</title>
<updated>2021-05-05T00:01:09+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2021-05-04T23:56:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b60c573dc241ab3a8719e990d86a0011b79eebcb'/>
<id>b60c573dc241ab3a8719e990d86a0011b79eebcb</id>
<content type='text'>
As idle, in particular, can have many columns on some machines...
Make it easy to ignore them all at once.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As idle, in particular, can have many columns on some machines...
Make it easy to ignore them all at once.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: elevate priority of interval mode</title>
<updated>2021-05-05T00:01:09+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2021-05-04T23:27:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=38c6663a68903cf1187003129cd1873551979865'/>
<id>38c6663a68903cf1187003129cd1873551979865</id>
<content type='text'>
This makes interval mode less likely to see delayed
results on a heavily loaded system.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This makes interval mode less likely to see delayed
results on a heavily loaded system.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: formatting</title>
<updated>2021-05-05T00:01:09+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2021-05-04T23:21:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1b439f01b67c77a374adbbd97ad0c745b7abb09b'/>
<id>1b439f01b67c77a374adbbd97ad0c745b7abb09b</id>
<content type='text'>
Spring is here...
run a long overdue Lendent on turbostat.c

no functional change

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Spring is here...
run a long overdue Lendent on turbostat.c

no functional change

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: rename tcc variables</title>
<updated>2021-05-05T00:01:09+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2021-04-26T10:49:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=55279aef754c5eab170077ae4ba4ebd304dea64f'/>
<id>55279aef754c5eab170077ae4ba4ebd304dea64f</id>
<content type='text'>
There are two TCC activation temeprature.
One is the default TCC activation temperature, also known as TJ_MAX.
Another one is the effective TCC activation temperature, which is the
subtraction of default TCC activation temperature and TCC offset.

The name of variable tcc_activation_temp might be misleading here.
Thus rename tcc_activation_temp to tj_max, and use tcc_default and
tcc_offset to calculate the effective TCC activation temperature.

No functional change in this patch.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are two TCC activation temeprature.
One is the default TCC activation temperature, also known as TJ_MAX.
Another one is the effective TCC activation temperature, which is the
subtraction of default TCC activation temperature and TCC offset.

The name of variable tcc_activation_temp might be misleading here.
Thus rename tcc_activation_temp to tj_max, and use tcc_default and
tcc_offset to calculate the effective TCC activation temperature.

No functional change in this patch.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: add TCC Offset support</title>
<updated>2021-05-05T00:01:08+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2021-04-21T15:22:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0b9a0b9be991656f125b58a240065cdf72077244'/>
<id>0b9a0b9be991656f125b58a240065cdf72077244</id>
<content type='text'>
The length of TCC Offset bits varies on different platforms.
Decode TCC Offset bits only for the platforms that we have verified.
For the others, only show default TCC activation temperature.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The length of TCC Offset bits varies on different platforms.
Decode TCC Offset bits only for the platforms that we have verified.
For the others, only show default TCC activation temperature.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: save original CPU model</title>
<updated>2021-05-05T00:01:08+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2021-04-26T02:05:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e9d3092f6d7c21031c8ac10ba2016ae0482a39fe'/>
<id>e9d3092f6d7c21031c8ac10ba2016ae0482a39fe</id>
<content type='text'>
CPU model may get changed in intel_model_duplicates() for code reuse.
But there are still some cases we need the original CPU model to handle
minor differences between generations.

Thus save the original CPU model.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CPU model may get changed in intel_model_duplicates() for code reuse.
But there are still some cases we need the original CPU model to handle
minor differences between generations.

Thus save the original CPU model.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools/power turbostat: Fix Core C6 residency on Atom CPUs</title>
<updated>2021-05-05T00:01:00+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2021-04-21T14:22:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7ab5ff4937a338783d147ec2d8c8714f48a5de79'/>
<id>7ab5ff4937a338783d147ec2d8c8714f48a5de79</id>
<content type='text'>
For Atom CPUs that have core cstate deeper than C6,
MSR_CORE_C6_RESIDENCY actually returns the residency for both CC6 and
deeper Core cstates.
Thus, the real Core C6 residency should be the subtraction of
MSR_CORE_C6_RESIDENCY return value and MSR_CORE_C6_RESIDENCY return value.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For Atom CPUs that have core cstate deeper than C6,
MSR_CORE_C6_RESIDENCY actually returns the residency for both CC6 and
deeper Core cstates.
Thus, the real Core C6 residency should be the subtraction of
MSR_CORE_C6_RESIDENCY return value and MSR_CORE_C6_RESIDENCY return value.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
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