<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/kernel/irq/ipi.c, branch v4.6.3</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>genirq: Dont allow affinity mask to be updated on IPIs</title>
<updated>2016-04-21T10:05:15+00:00</updated>
<author>
<name>Matt Redfearn</name>
<email>matt.redfearn@imgtec.com</email>
</author>
<published>2016-04-21T09:08:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4589f450fb285ab85f7513b6649e51ec2a820653'/>
<id>4589f450fb285ab85f7513b6649e51ec2a820653</id>
<content type='text'>
The IPI domain re-purposes the IRQ affinity to signify the mask of CPUs
that this IPI will deliver to. This must not be modified before the IPI
is destroyed again, so set the IRQ_NO_BALANCING flag to prevent the
affinity being overwritten by setup_affinity().

Without this, if an IPI is reserved for a single target CPU, then
allocated using __setup_irq(), the affinity is overwritten with
cpu_online_mask. When ipi_destroy() is subsequently called on a
multi-cpu system, it will attempt to free cpumask_weight() IRQs
that were never allocated, and crash.

Fixes: d17bf24e6952 ("genirq: Add a new generic IPI reservation code to irq core")
Signed-off-by: Matt Redfearn &lt;matt.redfearn@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: ralf@linux-mips.org
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Cc: lisa.parratt@imgtec.com
Link: http://lkml.kernel.org/r/1461229712-13057-1-git-send-email-matt.redfearn@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The IPI domain re-purposes the IRQ affinity to signify the mask of CPUs
that this IPI will deliver to. This must not be modified before the IPI
is destroyed again, so set the IRQ_NO_BALANCING flag to prevent the
affinity being overwritten by setup_affinity().

Without this, if an IPI is reserved for a single target CPU, then
allocated using __setup_irq(), the affinity is overwritten with
cpu_online_mask. When ipi_destroy() is subsequently called on a
multi-cpu system, it will attempt to free cpumask_weight() IRQs
that were never allocated, and crash.

Fixes: d17bf24e6952 ("genirq: Add a new generic IPI reservation code to irq core")
Signed-off-by: Matt Redfearn &lt;matt.redfearn@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: ralf@linux-mips.org
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Cc: lisa.parratt@imgtec.com
Link: http://lkml.kernel.org/r/1461229712-13057-1-git-send-email-matt.redfearn@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Implement ipi_send_mask/single()</title>
<updated>2016-02-25T09:56:57+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3b8e29a82dd16c1f2061e0b955a71cd36eeb061b'/>
<id>3b8e29a82dd16c1f2061e0b955a71cd36eeb061b</id>
<content type='text'>
Add APIs to send IPIs from driver and arch code.

We have different functions because we allow architecture code to cache the
irq descriptor to avoid lookups. Driver code has to use the irq number and is
subject to more restrictive checks.

[ tglx: Polish the implementation ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-12-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add APIs to send IPIs from driver and arch code.

We have different functions because we allow architecture code to cache the
irq descriptor to avoid lookups. Driver code has to use the irq number and is
subject to more restrictive checks.

[ tglx: Polish the implementation ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-12-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Add a new function to get IPI reverse mapping</title>
<updated>2016-02-25T09:56:56+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f9bce791ae2a1a10a965b30427f5507c1a77669f'/>
<id>f9bce791ae2a1a10a965b30427f5507c1a77669f</id>
<content type='text'>
When dealing with coprocessors we need to find out the actual hwirqs values to
pass on to the firmware so that it knows what it needs to use to receive IPIs
from and send IPIs to Linux cpus.

[ tglx: Fixed the single hwirq IPI case. The hardware irq number does not
  	change due to the cpu number ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-10-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When dealing with coprocessors we need to find out the actual hwirqs values to
pass on to the firmware so that it knows what it needs to use to receive IPIs
from and send IPIs to Linux cpus.

[ tglx: Fixed the single hwirq IPI case. The hardware irq number does not
  	change due to the cpu number ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-10-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Add a new generic IPI reservation code to irq core</title>
<updated>2016-02-25T09:56:56+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d17bf24e695290d3fe7943aca52ab48098a10653'/>
<id>d17bf24e695290d3fe7943aca52ab48098a10653</id>
<content type='text'>
Add a generic mechanism to dynamically allocate an IPI. Depending on the
underlying implementation this creates either a single Linux irq or a
consective range of Linux irqs. The Linux irq is used later to send IPIs to
other CPUs.

[ tglx: Massaged the code and removed the 'consecutive mask' restriction for
  	the single IRQ case ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-9-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a generic mechanism to dynamically allocate an IPI. Depending on the
underlying implementation this creates either a single Linux irq or a
consective range of Linux irqs. The Linux irq is used later to send IPIs to
other CPUs.

[ tglx: Massaged the code and removed the 'consecutive mask' restriction for
  	the single IRQ case ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-9-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
