linux-stable.git/kernel/irq/chip.c, branch v4.2.1

genirq: Introduce irq_chip_set_type_parent() helper

2015-08-19T22:25:25+00:00

This helper is required for irq chips which do not implement a
irq_set_type callback and need to call down the irq domain hierarchy
for the actual trigger type change.

This helper is required to fix further wreckage caused by the
conversion of TI OMAP to hierarchical irq domains and therefor tagged
for stable.

[ tglx: Massaged changelog ]

Signed-off-by: Grygorii Strashko 
Cc: Sudeep Holla 
Cc: 
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Cc: 
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1439554830-19502-3-git-send-email-grygorii.strashko@ti.com
Signed-off-by: Thomas Gleixner

genirq: Don't return ENOSYS in irq_chip_retrigger_hierarchy

2015-08-19T22:25:25+00:00

irq_chip_retrigger_hierarchy() returns -ENOSYS if it was not able to
find at least one .irq_retrigger() callback implemented in the IRQ
domain hierarchy.

That's wrong, because check_irq_resend() expects a 0 return value from
the callback in case that the hardware assisted resend was not
possible. If the return value is non zero the core code assumes
hardware resend success and the software resend is not invoked.

This results in lost interrupts on platforms where none of the parent
irq chips in the hierarchy implements the retrigger callback.

This is observable on TI OMAP, where the hierarchy is:

 ARM GIC <- OMAP wakeupgen <- TI Crossbar

Return 0 instead so the software resend mechanism gets invoked.

[ tglx: Massaged changelog ]

Fixes: 85f08c17de26 ('genirq: Introduce helper functions...')
Signed-off-by: Grygorii Strashko 
Reviewed-by: Marc Zyngier 
Reviewed-by: Jiang Liu 
Cc: Sudeep Holla 
Cc: 
Cc: 
Cc: 
Cc: 
Cc: 
Cc: 
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1439554830-19502-2-git-send-email-grygorii.strashko@ti.com
Signed-off-by: Thomas Gleixner

irq: Add irq_set_chained_handler_and_data()

2015-06-18T12:03:08+00:00

Driver authors seem to get the ordering of irq_set_chained_handler()
and irq_set_handler_data() wrong - ordering the former before the
latter.  This opens a race window where, if there is an interrupt
pending, the handler will be called between these two calls,
potentially resulting in an oops.

Provide a single interface to set both of these together, especially
as that's commonly what is required.

Signed-off-by: Russell King 
Cc: Alexandre Courbot 
Cc: Hans Ulli Kroll 
Cc: Jason Cooper 
Cc: Lee Jones 
Cc: Linus Walleij 
Cc: Thierry Reding 
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/E1Z4yzs-0002Rw-4B@rmk-PC.arm.linux.org.uk
Signed-off-by: Thomas Gleixner

Merge branch 'irq/for-x86' into irq/core

2015-05-19T13:41:30+00:00

Pull in the branch which can be consumed by x86 to build their changes
on top.

genirq: Introduce irq_set_vcpu_affinity() to target an interrupt to a VCPU

2015-05-19T13:41:19+00:00

With Posted-Interrupts support in Intel CPU and IOMMU, an external
interrupt from assigned-devices could be directly delivered to a
virtual CPU in a virtual machine. Instead of hacking KVM and Intel
IOMMU drivers, we propose a platform independent interface to target
an interrupt to a specific virtual CPU in a virtual machine, or set
virtual CPU affinity for an interrupt.

By adopting this new interface and the hierarchy irqdomain, we could
easily support posted-interrupts on Intel platforms, and also provide
flexible enough interfaces for other platforms to support similar
features.

Here is the usage scenario for this interface:
Guest update MSI/MSI-X interrupt configuration
        -->QEMU and KVM handle this
        -->KVM call this interface (passing posted interrupts descriptor
           and guest vector)
        -->irq core will transfer the control to IOMMU
        -->IOMMU will do the real work of updating IRTE (IRTE has new
           format for VT-d Posted-Interrupts)

Signed-off-by: Jiang Liu 
Signed-off-by: Feng Wu 
Link: http://lkml.kernel.org/r/1432026437-16560-2-git-send-email-feng.wu@intel.com
Signed-off-by: Thomas Gleixner

genirq: Add irq_chip_(enable/disable)_parent

2015-05-18T15:32:44+00:00

Add helper irq_chip_enable_parent and irq_chip_disable_parent. The
helper implement the default behavior in case irq_enable or irq_disable
is not implemented for the parent interrupt chip, which is calling the
irq_mask or irq_unmask respectively.

Signed-off-by: Stefan Agner 
Cc: marc.zyngier@arm.com
Cc: linux@arm.linux.org.uk
Cc: u.kleine-koenig@pengutronix.de
Cc: olof@lixom.net
Cc: arnd@arndb.de
Cc: daniel.lezcano@linaro.org
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: ijc+devicetree@hellion.org.uk
Cc: galak@codeaurora.org
Cc: mcoquelin.stm32@gmail.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: shawn.guo@linaro.org
Cc: kernel@pengutronix.de
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/1431769465-26867-3-git-send-email-stefan@agner.ch
Signed-off-by: Thomas Gleixner

genirq: Add irqchip_set_wake_parent

2015-03-15T00:55:01+00:00

This proves to be useful with stacked domains, when the current
domain doesn't implement wake-up, but expect the parent to do so.

Acked-by: Tony Lindgren 
Signed-off-by: Marc Zyngier 
Link: https://lkml.kernel.org/r/1426088629-15377-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper

genirq: Work around __irq_set_handler vs stacked domains ordering issues

2014-11-23T12:01:47+00:00

With the introduction of stacked domains, we have the issue that,
depending on where in the stack this is called, __irq_set_handler
will succeed or fail: If this is called from the inner irqchip,
__irq_set_handler() will fail, as it will look at the outer domain
as the (desc->irq_data.chip == &no_irq_chip) test fails (we haven't
set the top level yet).

This patch implements the following: "If there is at least one
valid irqchip in the domain, it will probably sort itself out".
This is clearly not ideal, but it is far less confusing then
crashing because the top-level domain is not up yet.

[ tglx: Added comment and a protection against chained interrupts in
  	that context ]

Signed-off-by: Marc Zyngier 
Cc: Yingjoe Chen 
Cc: Bjorn Helgaas 
Cc: linux-arm-kernel@lists.infradead.org
Cc: Jiang Liu 
Link: http://lkml.kernel.org/r/1416048553-29289-3-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner

genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip

2014-11-23T12:01:46+00:00

Add callback irq_compose_msi_msg to struct irq_chip, which will be used
to support stacked irqchip.

Signed-off-by: Jiang Liu 
Cc: Bjorn Helgaas 
Cc: Grant Likely 
Cc: Marc Zyngier 
Cc: Yingjoe Chen 
Cc: Yijing Wang 
Signed-off-by: Thomas Gleixner

genirq: Add more helper functions to support stacked irq_chip

2014-11-23T12:01:46+00:00

Add more helper function for stacked irq_chip to just call parent's
function.

Signed-off-by: Yingjoe Chen 
Cc: Rob Herring 
Cc: Pawel Moll 
Cc: Mark Rutland 
Cc: Matthias Brugger 
Cc: Russell King 
Cc: Jason Cooper 
Cc: Gran Likely 
Cc: Boris BREZILLON 
Cc: 
Cc: Bjorn Helgaas 
Cc: Yijing Wang 
Cc: 
Cc: 
Cc: 
Cc: 
Cc: 
Cc: 
Cc: Sascha Hauer 
Cc: Jiang Liu 
Cc: Marc Zyngier 
Link: http://lkml.kernel.org/r/1415893029-2971-3-git-send-email-yingjoe.chen@mediatek.com
Signed-off-by: Thomas Gleixner