linux-stable.git/include/soc/at91, branch v6.0

ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh

2022-08-31T07:28:18+00:00

On SAMA7G5, when resuming from backup and self-refresh, the bootloader
performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored
in RAM by Linux before going to backup and self-refresh). It has been
discovered that the current procedure doesn't work for all possible values
that might go to ZQ0SR0 due to hardware bug. The workaround to this is to
avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0
register and cache its value in RAM after processing it (using
modified_gray_code array). The bootloader will restore the processed value.

Fixes: d2d4716d8384 ("ARM: at91: pm: save ddr phy calibration data to securam")
Suggested-by: Frederic Schumacher 
Signed-off-by: Claudiu Beznea 
Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com

ARM: at91: pm: fix self-refresh for sama7g5

2022-08-31T07:27:57+00:00

It has been discovered that on some parts, from time to time, self-refresh
procedure doesn't work as expected. Debugging and investigating it proved
that disabling AC DLL introduce glitches in RAM controllers which
leads to unexpected behavior. This is confirmed as a hardware bug. DLL
bypass disables 3 DLLs: 2 DX DLLs and AC DLL. Thus, keep only DX DLLs
disabled. This introduce 6mA extra current consumption on VDDCORE when
switching to any ULP mode or standby mode but the self-refresh procedure
still works.

Fixes: f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5")
Suggested-by: Frederic Schumacher 
Signed-off-by: Claudiu Beznea 
Tested-by: Cristian Birsan 
Link: https://lore.kernel.org/r/20220826083927.3107272-3-claudiu.beznea@microchip.com

ARM: at91: PM: add cpu idle support for sama7g5

2022-02-25T11:36:25+00:00

Add CPU idle support for SAMA7G5. Support will make use of PMC_CPU_RATIO
register to divide the CPU clock by 16 before switching it to idle and
use automatic self-refresh option of DDR controller.

Signed-off-by: Claudiu Beznea 
Acked-by: Stephen Boyd 
Signed-off-by: Nicolas Ferre 
Link: https://lore.kernel.org/r/20220113144900.906370-5-claudiu.beznea@microchip.com

ARM: at91: ddr: fix typo to align with datasheet naming

2022-02-25T11:36:25+00:00

Fix typo on UDDRC_PWRCTL.SELFREF_SW bitmask to align with datasheet
naming.

Signed-off-by: Claudiu Beznea 
Signed-off-by: Nicolas Ferre 
Link: https://lore.kernel.org/r/20220113144900.906370-4-claudiu.beznea@microchip.com

ARM: at91: ddr: align macro definitions

2022-02-25T11:36:25+00:00

Align all macro definitions.

Signed-off-by: Claudiu Beznea 
Signed-off-by: Nicolas Ferre 
Link: https://lore.kernel.org/r/20220113144900.906370-3-claudiu.beznea@microchip.com

ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency

2022-02-25T11:36:25+00:00

Remove CONFIG_SOC_SAMA7 dependency to avoid having #ifdef preprocessor
directives in driver code (arch/arm/mach-at91/pm.c). This prepares the
code for next commits.

Signed-off-by: Claudiu Beznea 
Signed-off-by: Nicolas Ferre 
Link: https://lore.kernel.org/r/20220113144900.906370-2-claudiu.beznea@microchip.com

ARM: at91: ddr: add registers definitions for sama7g5's ddr

2021-07-19T12:32:12+00:00

Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.

Signed-off-by: Claudiu Beznea 
Signed-off-by: Nicolas Ferre 
Link: https://lore.kernel.org/r/20210415105010.569620-12-claudiu.beznea@microchip.com

ARM: at91: sfrbu: add sfrbu registers definitions for sama7g5

2021-07-19T12:32:12+00:00

Add SFRBU registers definitions for SAMA7G5.

Signed-off-by: Claudiu Beznea 
Signed-off-by: Nicolas Ferre 
Link: https://lore.kernel.org/r/20210415105010.569620-11-claudiu.beznea@microchip.com

ARM: at91: pm: Move prototypes to mutually included header

2021-03-26T17:20:49+00:00

Both the caller and the supplier's source file should have access to
the include file containing the prototypes.

Fixes the following W=1 kernel build warning(s):

 drivers/pinctrl/pinctrl-at91.c:1637:6: warning: no previous prototype for ‘at91_pinctrl_gpio_suspend’ [-Wmissing-prototypes]
 1637 | void at91_pinctrl_gpio_suspend(void)
 | ^~~~~~~~~~~~~~~~~~~~~~~~~
 drivers/pinctrl/pinctrl-at91.c:1661:6: warning: no previous prototype for ‘at91_pinctrl_gpio_resume’ [-Wmissing-prototypes]
 1661 | void at91_pinctrl_gpio_resume(void)
 | ^~~~~~~~~~~~~~~~~~~~~~~~

Cc: Russell King 
Cc: Nicolas Ferre 
Cc: Alexandre Belloni 
Cc: Ludovic Desroches 
Signed-off-by: Lee Jones 
Acked-by: Linus Walleij 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20210303124149.3149511-1-lee.jones@linaro.org

ARM: at91: add atmel tcb capabilities

2020-07-11T16:57:03+00:00

Some atmel socs have extra tcb capabilities that allow using a generic
clock source or enabling a quadrature decoder.

Signed-off-by: Kamel Bouhara 
Signed-off-by: Alexandre Belloni 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20200710230813.1005150-5-alexandre.belloni@bootlin.com