<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/include/linux/pci_ids.h, branch linux-2.6.24.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>ACPI: apply quirk_ich6_lpc_acpi to more ICH8 and ICH9</title>
<updated>2008-01-11T05:24:55+00:00</updated>
<author>
<name>Zhao Yakui</name>
<email>yakui.zhao@intel.com</email>
</author>
<published>2008-01-11T05:24:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d1ec7298fcefd7e4d1ca612da402ce9e5d5e2c13'/>
<id>d1ec7298fcefd7e4d1ca612da402ce9e5d5e2c13</id>
<content type='text'>
It is important that these resources be reserved
to avoid conflicts with well known ACPI registers.

Signed-off-by: Zhao Yakui &lt;yakui.zhao@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It is important that these resources be reserved
to avoid conflicts with well known ACPI registers.

Signed-off-by: Zhao Yakui &lt;yakui.zhao@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sdhci: support JMicron JMB38x chips</title>
<updated>2007-12-12T19:01:00+00:00</updated>
<author>
<name>Pierre Ossman</name>
<email>drzeus@drzeus.cx</email>
</author>
<published>2007-12-02T18:58:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=84c46a53fc4ea4ff36df783a20187b2f65dd21cc'/>
<id>84c46a53fc4ea4ff36df783a20187b2f65dd21cc</id>
<content type='text'>
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.

Signed-off-by: Pierre Ossman &lt;drzeus@drzeus.cx&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.

Signed-off-by: Pierre Ossman &lt;drzeus@drzeus.cx&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>forcedeth: new mcp79 pci ids</title>
<updated>2007-11-24T01:54:01+00:00</updated>
<author>
<name>Ayaz Abdulla</name>
<email>aabdulla@nvidia.com</email>
</author>
<published>2007-11-24T01:54:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=490dde8990c55662596a4be71b5070bd7d382d4a'/>
<id>490dde8990c55662596a4be71b5070bd7d382d4a</id>
<content type='text'>
This patch adds new device ids and features for mcp79 devices into the
forcedeth driver.

Signed-off-by: Ayaz Abdulla &lt;aabdulla@nvidia.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds new device ids and features for mcp79 devices into the
forcedeth driver.

Signed-off-by: Ayaz Abdulla &lt;aabdulla@nvidia.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>I/OAT: Add support for version 2 of ioatdma device</title>
<updated>2007-11-15T02:45:41+00:00</updated>
<author>
<name>Shannon Nelson</name>
<email>shannon.nelson@intel.com</email>
</author>
<published>2007-11-15T00:59:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7bb67c14fd3778504fb77da30ce11582336dfced'/>
<id>7bb67c14fd3778504fb77da30ce11582336dfced</id>
<content type='text'>
Add support for version 2 of the ioatdma device.  This device handles
the descriptor chain and DCA services slightly differently:
 - Instead of moving the dma descriptors between a busy and an idle chain,
   this new version uses a single circular chain so that we don't have
   rewrite the next_descriptor pointers as we add new requests, and the
   device doesn't need to re-read the last descriptor.
 - The new device has the DCA tags defined internally instead of needing
   them defined statically.

Signed-off-by: Shannon Nelson &lt;shannon.nelson@intel.com&gt;
Cc: "Williams, Dan J" &lt;dan.j.williams@intel.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for version 2 of the ioatdma device.  This device handles
the descriptor chain and DCA services slightly differently:
 - Instead of moving the dma descriptors between a busy and an idle chain,
   this new version uses a single circular chain so that we don't have
   rewrite the next_descriptor pointers as we add new requests, and the
   device doesn't need to re-read the last descriptor.
 - The new device has the DCA tags defined internally instead of needing
   them defined statically.

Signed-off-by: Shannon Nelson &lt;shannon.nelson@intel.com&gt;
Cc: "Williams, Dan J" &lt;dan.j.williams@intel.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>hwmon: (i5k_amb) New memory temperature sensor driver</title>
<updated>2007-11-08T13:42:46+00:00</updated>
<author>
<name>Darrick J. Wong</name>
<email>djwong@us.ibm.com</email>
</author>
<published>2007-10-18T20:22:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=298c752491f5bd8f6b04dd7fc40b53da4e86e093'/>
<id>298c752491f5bd8f6b04dd7fc40b53da4e86e093</id>
<content type='text'>
New driver to read FB-DIMM temperature sensors on systems with the
Intel 5000 series chipsets.

Signed-off-by: Darrick J. Wong &lt;djwong@us.ibm.com&gt;
Signed-off-by: Mark M. Hoffman &lt;mhoffman@lightlink.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
New driver to read FB-DIMM temperature sensors on systems with the
Intel 5000 series chipsets.

Signed-off-by: Darrick J. Wong &lt;djwong@us.ibm.com&gt;
Signed-off-by: Mark M. Hoffman &lt;mhoffman@lightlink.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Remove 3 incorrect MSI quirks.</title>
<updated>2007-11-05T21:35:17+00:00</updated>
<author>
<name>David Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2007-10-25T08:17:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5257dca0bdc36027a4bfc1002264bd465e86ab7a'/>
<id>5257dca0bdc36027a4bfc1002264bd465e86ab7a</id>
<content type='text'>
Now that we have dealt with the real issue, in that some ATI SATA and
USB controllers needed the INTX_DISABLE quirk, we can remove these AMD
chipset global MSI disabling quirks.

This reverts three changesets:

4be8f906435a6af241821ab5b94b2b12cb7d57d8 (PCI: disable MSI on RS690)
aea6a433f50cd89b9cbd10850fd0b32f961f9883 (PCI: disable MSI on RD580)
f122392f679ebed39db08074f935d770504623eb (PCI: disable MSI on RX790)

This is based upon testing and feedback from
Shane Huang &lt;Shane.Huang@amd.com&gt;.

Cc: Shane Huang &lt;Shane.Huang@amd.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Acked-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that we have dealt with the real issue, in that some ATI SATA and
USB controllers needed the INTX_DISABLE quirk, we can remove these AMD
chipset global MSI disabling quirks.

This reverts three changesets:

4be8f906435a6af241821ab5b94b2b12cb7d57d8 (PCI: disable MSI on RS690)
aea6a433f50cd89b9cbd10850fd0b32f961f9883 (PCI: disable MSI on RD580)
f122392f679ebed39db08074f935d770504623eb (PCI: disable MSI on RX790)

This is based upon testing and feedback from
Shane Huang &lt;Shane.Huang@amd.com&gt;.

Cc: Shane Huang &lt;Shane.Huang@amd.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Acked-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Add MSI quirk for ServerWorks HT1000 PCIX bridge.</title>
<updated>2007-11-05T21:35:16+00:00</updated>
<author>
<name>David Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2007-10-25T08:15:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1d84b5424efbcce69a1c955ba181147d23d43a14'/>
<id>1d84b5424efbcce69a1c955ba181147d23d43a14</id>
<content type='text'>
This is the fix for the following problem:

https://bugzilla.redhat.com/show_bug.cgi?id=227657

The bnx2 device 5706 complains about MSI not working behind a
ServerWorks HT1000 PCIX bridge. An earlier commit to fix the problem:

e3008dedff4bdc96a5f67224cd3d8d12237082a0:

"PCI: disable MSI by default on systems with Serverworks HT1000 chips"

was not entirely correct, and has been reverted.

MSI does not work on the PCIX bus because the BIOS did not set the
HT_MSI_FLAGS_ENABLE bit in the HyperTransport MSI capability on the
bridge.  We use the existing quirk_msi_ht_cap() to detect the problem
and disable MSI in all buses behind it.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Cc: Anantha Subramanyam &lt;ananth@broadcom.com&gt;
Cc: Naren Sankar &lt;nsankar@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Acked-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is the fix for the following problem:

https://bugzilla.redhat.com/show_bug.cgi?id=227657

The bnx2 device 5706 complains about MSI not working behind a
ServerWorks HT1000 PCIX bridge. An earlier commit to fix the problem:

e3008dedff4bdc96a5f67224cd3d8d12237082a0:

"PCI: disable MSI by default on systems with Serverworks HT1000 chips"

was not entirely correct, and has been reverted.

MSI does not work on the PCIX bus because the BIOS did not set the
HT_MSI_FLAGS_ENABLE bit in the HyperTransport MSI capability on the
bridge.  We use the existing quirk_msi_ht_cap() to detect the problem
and disable MSI in all buses behind it.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Cc: Anantha Subramanyam &lt;ananth@broadcom.com&gt;
Cc: Naren Sankar &lt;nsankar@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Acked-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Revert "PCI: disable MSI by default on systems with Serverworks HT1000 chips"</title>
<updated>2007-11-05T21:35:16+00:00</updated>
<author>
<name>David Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2007-10-25T08:15:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2cc31879f8cfa0efc74fe7e58ab4e01ef5908730'/>
<id>2cc31879f8cfa0efc74fe7e58ab4e01ef5908730</id>
<content type='text'>
This reverts commit e3008dedff4bdc96a5f67224cd3d8d12237082a0.

The real bug was an INTX issue in the tg3 ethernet chip, and
cured by commit c129d962a66c76964954a98b38586ada82cf9381

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Acked-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit e3008dedff4bdc96a5f67224cd3d8d12237082a0.

The real bug was an INTX issue in the tg3 ethernet chip, and
cured by commit c129d962a66c76964954a98b38586ada82cf9381

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Acked-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>[netdrvr] forcedeth: add MCP77 device IDs</title>
<updated>2007-10-25T07:36:42+00:00</updated>
<author>
<name>Ayaz Abdulla</name>
<email>aabdulla@nvidia.com</email>
</author>
<published>2007-10-25T07:36:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=96fd4cd3e40e240f0c385af87f58e74da8b7099a'/>
<id>96fd4cd3e40e240f0c385af87f58e74da8b7099a</id>
<content type='text'>
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[TG3]: Add 5723 support</title>
<updated>2007-10-22T09:59:49+00:00</updated>
<author>
<name>Matt Carlson</name>
<email>mcarlson@broadcom.com</email>
</author>
<published>2007-10-21T23:12:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6c7af27c8a2e8b85cb235a2409d3b2093b18f77d'/>
<id>6c7af27c8a2e8b85cb235a2409d3b2093b18f77d</id>
<content type='text'>
This patch adds support for upcoming 5723 devices.

Signed-off-by: Matt Carlson &lt;mcarlson@broadcom.com&gt;
Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for upcoming 5723 devices.

Signed-off-by: Matt Carlson &lt;mcarlson@broadcom.com&gt;
Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
