<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/include/linux/pci_ids.h, branch linux-2.6.19.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>pci_ids.h: Add NVIDIA PCI ID</title>
<updated>2006-11-02T23:55:48+00:00</updated>
<author>
<name>Peer Chen</name>
<email>pchen@nvidia.com</email>
</author>
<published>2006-11-02T23:55:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4fa2eeeac5e13a8579ee45bc172eed690d28fbb7'/>
<id>4fa2eeeac5e13a8579ee45bc172eed690d28fbb7</id>
<content type='text'>
Signed-off-by: Jeff Garzik &lt;jeff@garzik.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Jeff Garzik &lt;jeff@garzik.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[pci_ids] Add Quicknet XJ vendor/device ID's.</title>
<updated>2006-10-18T12:55:54+00:00</updated>
<author>
<name>Ben Collins</name>
<email>bcollins@ubuntu.com</email>
</author>
<published>2006-10-18T12:55:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=74d919465a93b6c2b928b29a8ed3e5e41adbfa93'/>
<id>74d919465a93b6c2b928b29a8ed3e5e41adbfa93</id>
<content type='text'>
Signed-off-by: Ben Collins &lt;bcollins@ubuntu.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ben Collins &lt;bcollins@ubuntu.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Remove IT8172-based platforms, ITE 8172G and Globespan IVR support.</title>
<updated>2006-10-03T16:59:17+00:00</updated>
<author>
<name>Yoichi Yuasa</name>
<email>yoichi_yuasa@tripeaks.co.jp</email>
</author>
<published>2006-10-02T14:19:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=af8b128719f5248e542036ea994610a29d0642a6'/>
<id>af8b128719f5248e542036ea994610a29d0642a6</id>
<content type='text'>
As per feature-removal-schedule.txt.

Signed-off-by: Yoichi Yuasa &lt;yoichi_yuasa@tripeaks.co.jp&gt;
Acked-by: Alan Cox &lt;alan@redhat.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As per feature-removal-schedule.txt.

Signed-off-by: Yoichi Yuasa &lt;yoichi_yuasa@tripeaks.co.jp&gt;
Acked-by: Alan Cox &lt;alan@redhat.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] BCM1250: TRDY timeout tweaks for Broadcom SiByte systems</title>
<updated>2006-10-03T16:59:17+00:00</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@linux-mips.org</email>
</author>
<published>2006-10-02T11:55:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9'/>
<id>15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9</id>
<content type='text'>
 It was obesrved that at least one older PCI card predating the
requirement for the TRDY signal to respond within 16 clock ticks actually
does not meet this rule nor even the power-on defaults of the PCI bridges
found in development systems built around the Broadcom SiByte SOCs.  Here
is a patch that bumps up the timeout to the highest finite value supported
by these chips, which is 255 clock ticks.  The bridges affected are the
SiByte SOC itself and the SP1011.
    
 This change does not effectively affect systems only having PCI option
cards installed that meet the TRDY requirement of the current PCI spec.
The rule was introduced with PCI 2.1, so any older card may make the
system affected.  If this is the case, performance of the system will
suffer in return for the card working at all.  If this is a concern, then
the solution is not to use such cards.
    
Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 It was obesrved that at least one older PCI card predating the
requirement for the TRDY signal to respond within 16 clock ticks actually
does not meet this rule nor even the power-on defaults of the PCI bridges
found in development systems built around the Broadcom SiByte SOCs.  Here
is a patch that bumps up the timeout to the highest finite value supported
by these chips, which is 255 clock ticks.  The bridges affected are the
SiByte SOC itself and the SP1011.
    
 This change does not effectively affect systems only having PCI option
cards installed that meet the TRDY requirement of the current PCI spec.
The rule was introduced with PCI 2.1, so any older card may make the
system affected.  If this is the case, performance of the system will
suffer in return for the card working at all.  If this is a concern, then
the solution is not to use such cards.
    
Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</pre>
</div>
</content>
</entry>
<entry>
<title>[BNX2]: Disable MSI on 5706 if AMD 8132 bridge is present.</title>
<updated>2006-09-30T00:06:23+00:00</updated>
<author>
<name>Michael Chan</name>
<email>mchan@broadcom.com</email>
</author>
<published>2006-09-30T00:06:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f9317a40c4e09e20ef01601fc9f5de9e6acb5b96'/>
<id>f9317a40c4e09e20ef01601fc9f5de9e6acb5b96</id>
<content type='text'>
MSI is defined to be 32-bit write.  The 5706 does 64-bit MSI writes
with byte enables disabled on the unused 32-bit word.  This is legal
but causes problems on the AMD 8132 which will eventually stop
responding after a while.

Without this patch, the MSI test done by the driver during open will
pass, but MSI will eventually stop working after a few MSIs are
written by the device.

AMD believes this incompatibility is unique to the 5706, and
prefers to locally disable MSI rather than globally disabling it
using pci_msi_quirk.

Update version to 1.4.45.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MSI is defined to be 32-bit write.  The 5706 does 64-bit MSI writes
with byte enables disabled on the unused 32-bit word.  This is legal
but causes problems on the AMD 8132 which will eventually stop
responding after a while.

Without this patch, the MSI test done by the driver during open will
pass, but MSI will eventually stop working after a few MSIs are
written by the device.

AMD believes this incompatibility is unique to the 5706, and
prefers to locally disable MSI rather than globally disabling it
using pci_msi_quirk.

Update version to 1.4.45.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[TG3]: Add basic 5906 support.</title>
<updated>2006-09-29T01:01:40+00:00</updated>
<author>
<name>Michael Chan</name>
<email>mchan@broadcom.com</email>
</author>
<published>2006-09-27T23:06:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b5d3772ccbe0bc5ac8ffbb5356b74ca698aee28c'/>
<id>b5d3772ccbe0bc5ac8ffbb5356b74ca698aee28c</id>
<content type='text'>
Add support for the new 5709 device.  This is a new 10/100 Mbps chip.
The mailbox access and firmware interface are quite different from
all other tg3 chips.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the new 5709 device.  This is a new 10/100 Mbps chip.
The mailbox access and firmware interface are quite different from
all other tg3 chips.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[TG3]: Add 5722 and 5756 support.</title>
<updated>2006-09-29T01:01:38+00:00</updated>
<author>
<name>Michael Chan</name>
<email>mchan@broadcom.com</email>
</author>
<published>2006-09-27T23:03:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=126a336822a6594662f5898f1ddf33e6d048fcc7'/>
<id>126a336822a6594662f5898f1ddf33e6d048fcc7</id>
<content type='text'>
Add IDs to support 5722 and 5756.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add IDs to support 5722 and 5756.

Signed-off-by: Michael Chan &lt;mchan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>hwmon: New driver k8temp</title>
<updated>2006-09-28T22:31:14+00:00</updated>
<author>
<name>Rudolf Marek</name>
<email>r.marek@sh.cvut.cz</email>
</author>
<published>2006-08-28T12:40:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=29fa06c1292f473ae51a84f55c8fe22179bc1080'/>
<id>29fa06c1292f473ae51a84f55c8fe22179bc1080</id>
<content type='text'>
Add support for the temperature sensor(s) found in AMD K8 CPUs.

Signed-off-by: Rudolf Marek &lt;r.marek@sh.cvut.cz&gt;
Signed-off-by: Jean Delvare &lt;khali@linux-fr.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the temperature sensor(s) found in AMD K8 CPUs.

Signed-off-by: Rudolf Marek &lt;r.marek@sh.cvut.cz&gt;
Signed-off-by: Jean Delvare &lt;khali@linux-fr.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6</title>
<updated>2006-09-27T15:09:15+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@g5.osdl.org</email>
</author>
<published>2006-09-27T15:09:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ff0972c26bbf209da6f6d244cce60e695df863f6'/>
<id>ff0972c26bbf209da6f6d244cce60e695df863f6</id>
<content type='text'>
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits)
  pciehp - fix wrong return value
  IA64: PCI: dont disable irq which is not enabled
  acpiphp: add support for ioapic hot-remove
  PCI: assign ioapic resource at hotplug
  acpiphp: disable bridges
  acpiphp: stop bus device before acpi_bus_trim
  PCI: add pci_stop_bus_device
  acpiphp: do not initialize existing ioapics
  acpiphp: initialize ioapics before starting devices
  acpiphp: set hpp values before starting devices
  PCI Hotplug: cleanup pcihp skeleton code.
  PCI: Restore PCI Express capability registers after PM event
  PCI: drivers/pci/hotplug/acpiphp_glue.c: make a function static
  PCI: Multiprobe sanitizer
  PCI: fix __must_check warnings
  PCI Hotplug: fix __must_check warnings
  SHPCHP: fix __must_check warnings
  PCI-Express AER implemetation: pcie_portdrv error handler
  PCI-Express AER implemetation: AER core and aerdriver
  PCI-Express AER implemetation: export pcie_port_bus_type
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits)
  pciehp - fix wrong return value
  IA64: PCI: dont disable irq which is not enabled
  acpiphp: add support for ioapic hot-remove
  PCI: assign ioapic resource at hotplug
  acpiphp: disable bridges
  acpiphp: stop bus device before acpi_bus_trim
  PCI: add pci_stop_bus_device
  acpiphp: do not initialize existing ioapics
  acpiphp: initialize ioapics before starting devices
  acpiphp: set hpp values before starting devices
  PCI Hotplug: cleanup pcihp skeleton code.
  PCI: Restore PCI Express capability registers after PM event
  PCI: drivers/pci/hotplug/acpiphp_glue.c: make a function static
  PCI: Multiprobe sanitizer
  PCI: fix __must_check warnings
  PCI Hotplug: fix __must_check warnings
  SHPCHP: fix __must_check warnings
  PCI-Express AER implemetation: pcie_portdrv error handler
  PCI-Express AER implemetation: AER core and aerdriver
  PCI-Express AER implemetation: export pcie_port_bus_type
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Remove EV96100 as previously announced.</title>
<updated>2006-09-27T12:37:55+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-09-20T19:56:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d48f1de2d8170814fb64effa320848410c466f95'/>
<id>d48f1de2d8170814fb64effa320848410c466f95</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
