<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/include/linux/pci.h, branch linux-2.6.14.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Remove "must_check" attributes in PCI-land</title>
<updated>2005-09-09T22:43:46+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@g5.osdl.org</email>
</author>
<published>2005-09-09T22:43:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9c8550ee25e26d14a8f0fe1b761a676e23fe3cf0'/>
<id>9c8550ee25e26d14a8f0fe1b761a676e23fe3cf0</id>
<content type='text'>
Don't just irritate all other kernel developers.  Fix the users first,
then you can re-introduce the must-check infrastructure to avoid new
cases creeping in.

Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Don't just irritate all other kernel developers.  Fix the users first,
then you can re-introduce the must-check infrastructure to avoid new
cases creeping in.

Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6 </title>
<updated>2005-09-09T22:17:00+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@g5.osdl.org</email>
</author>
<published>2005-09-09T22:17:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=41d0ab2a7dfe9e25504169c98eac5e84e5509e3d'/>
<id>41d0ab2a7dfe9e25504169c98eac5e84e5509e3d</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI: Small rearrangement of PCI probing code</title>
<updated>2005-09-09T20:58:45+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2005-09-05T23:31:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=cdb9b9f730eac4f947a2c552806a3a550bf019ef'/>
<id>cdb9b9f730eac4f947a2c552806a3a550bf019ef</id>
<content type='text'>
This patch makes some small rearrangements of the PCI probing code in
order to make it possible for arch code to set up the PCI tree
without needing to duplicate code from the PCI layer unnecessarily.
PPC64 will use this to set up the PCI tree from the Open Firmware
device tree, which we need to do on logically-partitioned pSeries
systems.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch makes some small rearrangements of the PCI probing code in
order to make it possible for arch code to set up the PCI tree
without needing to duplicate code from the PCI layer unnecessarily.
PPC64 will use this to set up the PCI tree from the Open Firmware
device tree, which we need to do on logically-partitioned pSeries
systems.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] yenta: share code with PCI core</title>
<updated>2005-09-09T20:57:47+00:00</updated>
<author>
<name>Dominik Brodowski</name>
<email>linux@dominikbrodowski.net</email>
</author>
<published>2005-09-09T20:03:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b3743fa4442fc172e950ff0eaf6aa96e7d5ce9be'/>
<id>b3743fa4442fc172e950ff0eaf6aa96e7d5ce9be</id>
<content type='text'>
Share code between setup-bus.c and yenta_socket.c: use the write-out code of
resources to the bridge also in yenta_socket.c, as it provides useful debug
output.  In addition, it fixes the bug that the CPU-centric resource view
might need to be transferred to the PCI-centric view: setup-bus.c does that,
while yenta-socket.c did not.

Signed-off-by: Dominik Brodowski &lt;linux@dominikbrodowski.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Share code between setup-bus.c and yenta_socket.c: use the write-out code of
resources to the bridge also in yenta_socket.c, as it provides useful debug
output.  In addition, it fixes the bug that the CPU-centric resource view
might need to be transferred to the PCI-centric view: setup-bus.c does that,
while yenta-socket.c did not.

Signed-off-by: Dominik Brodowski &lt;linux@dominikbrodowski.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] must_check attributes for PCI layer.</title>
<updated>2005-09-09T18:24:31+00:00</updated>
<author>
<name>Dave Jones</name>
<email>davej@redhat.com</email>
</author>
<published>2005-08-09T04:20:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=144a50ea5e1487b8b8e722289b4177713354448a'/>
<id>144a50ea5e1487b8b8e722289b4177713354448a</id>
<content type='text'>
Self explanatory really. Some newer gcc's print a warning
if a function is used and we don't check its result.
We do this for a bunch of things in the kernel already,
this extends that to the PCI layer.

Based on a patch originally from Arjan van de Ven.

Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: Arjan van de Ven &lt;arjan@infradead.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Self explanatory really. Some newer gcc's print a warning
if a function is used and we don't check its result.
We do this for a bunch of things in the kernel already,
this extends that to the PCI layer.

Based on a patch originally from Arjan van de Ven.

Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: Arjan van de Ven &lt;arjan@infradead.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI/libata INTx cleanup</title>
<updated>2005-09-08T22:07:08+00:00</updated>
<author>
<name>Brett M Russ</name>
<email>russb@emc.com</email>
</author>
<published>2005-08-15T19:23:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a04ce0ffcaf561994ecf382cd3caad75556dc499'/>
<id>a04ce0ffcaf561994ecf382cd3caad75556dc499</id>
<content type='text'>
Simple cleanup to eliminate X copies of the pci_enable_intx() function
in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
libata and msi.c.

Signed-off-by: Brett Russ &lt;russb@emc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Simple cleanup to eliminate X copies of the pci_enable_intx() function
in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
libata and msi.c.

Signed-off-by: Brett Russ &lt;russb@emc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI: Support PCM PM CAP version 3</title>
<updated>2005-09-08T22:04:30+00:00</updated>
<author>
<name>Daniel Ritz</name>
<email>daniel.ritz@gmx.ch</email>
</author>
<published>2005-08-17T22:32:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3fe9d19f9e86a55679f5f2b38ec0a43a1a510cee'/>
<id>3fe9d19f9e86a55679f5f2b38ec0a43a1a510cee</id>
<content type='text'>
- support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)

- pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
  PCI_UNKNOWN

- minor cleanups

Signed-off-by: Daniel Ritz &lt;daniel.ritz@gmx.ch&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)

- pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
  PCI_UNKNOWN

- minor cleanups

Signed-off-by: Daniel Ritz &lt;daniel.ritz@gmx.ch&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive)</title>
<updated>2005-09-08T22:04:30+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2005-08-18T04:33:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=cecf4864cf52a4a243a62b2856a6a155edbb55e8'/>
<id>cecf4864cf52a4a243a62b2856a6a155edbb55e8</id>
<content type='text'>
The PCI error recovery infrastructure needs to be able to contact all
the drivers affected by a PCI error event, which may mean traversing
all the devices under a given PCI-PCI bridge.  This patch adds a
function to the PCI core that traverses all the PCI devices on a PCI
bus and under any PCI-PCI bridges on that bus (and so on), calling a
given function for each device.  This provides a way for the error
recovery code to iterate through all devices that are affected by an
error event.

This version is not implemented as a recursive function.  Instead,
when we reach a PCI-PCI bridge, we set the pointers to start doing the
devices on the bus under the bridge, and when we reach the end of a
bus's devices, we use the bus-&gt;self pointer to go back up to the next
higher bus and continue doing its devices.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PCI error recovery infrastructure needs to be able to contact all
the drivers affected by a PCI error event, which may mean traversing
all the devices under a given PCI-PCI bridge.  This patch adds a
function to the PCI core that traverses all the PCI devices on a PCI
bus and under any PCI-PCI bridges on that bus (and so on), calling a
given function for each device.  This provides a way for the error
recovery code to iterate through all devices that are affected by an
error event.

This version is not implemented as a recursive function.  Instead,
when we reach a PCI-PCI bridge, we set the pointers to start doing the
devices on the bus under the bridge, and when we reach the end of a
bus's devices, we use the bus-&gt;self pointer to go back up to the next
higher bus and continue doing its devices.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI: restore BAR values after D3hot-&gt;D0 for devices that need it</title>
<updated>2005-09-08T21:57:24+00:00</updated>
<author>
<name>John W. Linville</name>
<email>linville@tuxdriver.com</email>
</author>
<published>2005-07-27T14:19:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=064b53dbcc977dbf2753a67c2b8fc1c061d74f21'/>
<id>064b53dbcc977dbf2753a67c2b8fc1c061d74f21</id>
<content type='text'>
Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
(including BARs) when transitioning from D3hot-&gt;D0.  This leaves such
a device in an inaccessible state.  The patch below causes the BARs
to be restored when enabling such a device, so that its driver will
be able to access it.

The patch also adds pci_restore_bars as a new global symbol, and adds a
correpsonding EXPORT_SYMBOL_GPL for that.

Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
(re)boot.  Most drivers call pci_enable_device very early, so devices
left in D3hot that lose configuration during the D3hot-&gt;D0 transition
will be inaccessible to their drivers.

Drivers could be modified to account for this, but it would
be difficult to know which drivers need modification.  This is
especially true since often many devices are covered by the same
driver.  It likely would be necessary to replicate code across dozens
of drivers.

The patch below should trigger only when transitioning from D3hot-&gt;D0
(or at boot), and only for devices that have the "no soft reset" bit
cleared in the PM control register.  I believe it is safe to include
this patch as part of the PCI infrastructure.

The cleanest implementation of pci_restore_bars was to call
pci_update_resource.  Unfortunately, that does not currently exist
for the sparc64 architecture.  The patch below includes a null
implemenation of pci_update_resource for sparc64.

Some have expressed interest in making general use of the the
pci_restore_bars function, so that has been exported to GPL licensed
modules.

Signed-off-by: John W. Linville &lt;linville@tuxdriver.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
(including BARs) when transitioning from D3hot-&gt;D0.  This leaves such
a device in an inaccessible state.  The patch below causes the BARs
to be restored when enabling such a device, so that its driver will
be able to access it.

The patch also adds pci_restore_bars as a new global symbol, and adds a
correpsonding EXPORT_SYMBOL_GPL for that.

Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
(re)boot.  Most drivers call pci_enable_device very early, so devices
left in D3hot that lose configuration during the D3hot-&gt;D0 transition
will be inaccessible to their drivers.

Drivers could be modified to account for this, but it would
be difficult to know which drivers need modification.  This is
especially true since often many devices are covered by the same
driver.  It likely would be necessary to replicate code across dozens
of drivers.

The patch below should trigger only when transitioning from D3hot-&gt;D0
(or at boot), and only for devices that have the "no soft reset" bit
cleared in the PM control register.  I believe it is safe to include
this patch as part of the PCI infrastructure.

The cleanest implementation of pci_restore_bars was to call
pci_update_resource.  Unfortunately, that does not currently exist
for the sparc64 architecture.  The patch below includes a null
implemenation of pci_update_resource for sparc64.

Some have expressed interest in making general use of the the
pci_restore_bars function, so that has been exported to GPL licensed
modules.

Signed-off-by: John W. Linville &lt;linville@tuxdriver.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] PCI: clean up pci.h and split pci register info to separate header file.</title>
<updated>2005-09-08T21:57:24+00:00</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@suse.de</email>
</author>
<published>2005-07-28T18:37:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4352dfd5cd9172f1ee425924a463b43e6157b840'/>
<id>4352dfd5cd9172f1ee425924a463b43e6157b840</id>
<content type='text'>
This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register
info out to a separate file, where it belongs.  Eventually we can stop including
this file from within pci.h, but lots of code needs to be audited first.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register
info out to a separate file, where it belongs.  Eventually we can stop including
this file from within pci.h, but lots of code needs to be audited first.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
