linux-stable.git/include/linux/msi.h, branch v3.11.7

PCI: Allocate only as many MSI vectors as requested by driver

2013-05-28T17:31:16+00:00

Because of the encoding of the "Multiple Message Capable" and "Multiple
Message Enable" fields, a device can only advertise that it's capable of a
power-of-two number of vectors, and the OS can only enable a power-of-two
number.

For example, a device that's limited internally to using 18 vectors would
have to advertise that it's capable of 32.  The 14 extra vectors consume
vector numbers and IRQ descriptors even though the device can't actually
use them.

This fix introduces a 'msi_desc::nvec_used' field to address this issue.
When non-zero, it is the actual number of MSIs the device will send, as
requested by the device driver.  This value should be used by architectures
to set up and tear down only as many interrupt resources as the device will
actually use.

Note, although the existing 'msi_desc::multiple' field might seem
redundant, in fact it is not.  The number of MSIs advertised need not be
the smallest power-of-two larger than the number of MSIs the device will
send.  Thus, it is not always possible to derive the former from the
latter, so we need to keep them both to handle this case.

[bhelgaas: changelog, rename to "nvec_used"]
Signed-off-by: Alexander Gordeev 
Signed-off-by: Bjorn Helgaas

PCI: Remove "extern" from function declarations

2013-04-23T15:50:30+00:00

We had an inconsistent mix of using and omitting the "extern" keyword
on function declarations in header files.  This removes them all.

Signed-off-by: Bjorn Helgaas

PCI/sysfs: add per pci device msi[x] irq listing (v5)

2011-12-05T18:21:44+00:00

This patch adds a per-pci-device subdirectory in sysfs called:
/sys/bus/pci/devices//msi_irqs

This sub-directory exports the set of msi vectors allocated by a given
pci device, by creating a numbered sub-directory for each vector beneath
msi_irqs.  For each vector various attributes can be exported.
Currently the only attribute is called mode, which tracks the
operational mode of that vector (msi vs. msix)

Acked-by: Greg Kroah-Hartman 
Signed-off-by: Jesse Barnes

pci: Cleanup the irq_desc mess in msi

2010-10-12T14:53:34+00:00

Handing down irq_desc to msi just so that msi can access
irq_desc.irq_data.msi_desc is a pretty stupid idea. The calling code
can hand down a pointer to msi_desc so msi code does not need to know
about the irq descriptor at all.

Signed-off-by: Thomas Gleixner 
Reviewed-by: Ingo Molnar 
Acked-by: Jesse Barnes

pci: Convert msi to new irq_chip functions

2010-10-12T14:53:34+00:00

Signed-off-by: Thomas Gleixner 
Reviewed-by: Ingo Molnar 
Acked-by: Jesse Barnes 
Cc: Benjamin Herrenschmidt 
Cc: "David S. Miller" 
Cc: Tony Luck 
Cc: Russell King

PCI: MSI: Restore read_msi_msg_desc(); add get_cached_msi_msg_desc()

2010-07-30T16:41:39+00:00

commit 2ca1af9aa3285c6a5f103ed31ad09f7399fc65d7 "PCI: MSI: Remove
unsafe and unnecessary hardware access" changed read_msi_msg_desc() to
return the last MSI message written instead of reading it from the
device, since it may be called while the device is in a reduced
power state.

However, the pSeries platform code really does need to read messages
from the device, since they are initially written by firmware.
Therefore:
- Restore the previous behaviour of read_msi_msg_desc()
- Add new functions get_cached_msi_msg{,_desc}() which return the
  last MSI message written
- Use the new functions where appropriate

Acked-by: Michael Ellerman 
Signed-off-by: Ben Hutchings 
Signed-off-by: Jesse Barnes

PCI MSI: Add support for multiple MSI

2009-03-20T17:48:14+00:00

Add the new API pci_enable_msi_block() to allow drivers to
request multiple MSI and reimplement pci_enable_msi in terms of
pci_enable_msi_block.  Ensure that the architecture back ends don't
have to know about multiple MSI.

Signed-off-by: Matthew Wilcox 
Signed-off-by: Jesse Barnes

PCI MSI: Refactor interrupt masking code

2009-03-20T17:48:13+00:00

Since most of the callers already know whether they have an MSI or
an MSI-X capability, split msi_set_mask_bits() into msi_mask_irq()
and msix_mask_irq().  The only callers which don't (mask_msi_irq()
and unmask_msi_irq()) can share code in msi_set_mask_bit().  This then
becomes the only caller of msix_flush_writes(), so we can inline it.
The flushing read can be to any address that belongs to the device,
so we can eliminate the calculation too.

We can also get rid of maskbits_mask from struct msi_desc and simply
recalculate it on the rare occasion that we need it.  The single-bit
'masked' element is replaced by a copy of the 32-bit 'masked' register,
so this patch does not affect the size of msi_desc.

Signed-off-by: Matthew Wilcox 
Signed-off-by: Jesse Barnes

PCI MSI: Use mask_pos instead of mask_base when appropriate

2009-03-20T17:48:13+00:00

MSI interrupts have a mask_pos where MSI-X have a mask_base.  Use a
transparent union to get rid of some ugly casts.

Signed-off-by: Matthew Wilcox 
Signed-off-by: Jesse Barnes

PCI MSI: Replace 'type' with 'is_msix'

2009-03-20T17:48:12+00:00

By changing from a 5-bit field to a 1-bit field, we free up some bits
that can be used by a later patch.  Also rearrange the fields for better
packing on 64-bit platforms (reducing the size of msi_desc from 72 bytes
to 64 bytes).

Signed-off-by: Matthew Wilcox 
Signed-off-by: Jesse Barnes