<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/include/linux/irq.h, branch v3.15.4</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>genirq: x86: Ensure that dynamic irq allocation does not conflict</title>
<updated>2014-04-28T10:20:00+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2014-04-24T07:50:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=62a08ae2a5763aabeee98264605236b001503e0c'/>
<id>62a08ae2a5763aabeee98264605236b001503e0c</id>
<content type='text'>
On x86 the allocation of irq descriptors may allocate interrupts which
are in the range of the GSI interrupts. That's wrong as those
interrupts are hardwired and we don't have the irq domain translation
like PPC. So one of these interrupts can be hooked up later to one of
the devices which are hard wired to it and the io_apic init code for
that particular interrupt line happily reuses that descriptor with a
completely different configuration so hell breaks lose.

Inside x86 we allocate dynamic interrupts from above nr_gsi_irqs,
except for a few usage sites which have not yet blown up in our face
for whatever reason. But for drivers which need an irq range, like the
GPIO drivers, we have no limit in place and we don't want to expose
such a detail to a driver.

To cure this introduce a function which an architecture can implement
to impose a lower bound on the dynamic interrupt allocations.

Implement it for x86 and set the lower bound to nr_gsi_irqs, which is
the end of the hardwired interrupt space, so all dynamic allocations
happen above.

That not only allows the GPIO driver to work sanely, it also protects
the bogus callsites of create_irq_nr() in hpet, uv, irq_remapping and
htirq code. They need to be cleaned up as well, but that's a separate
issue.

Reported-by: Jin Yao &lt;yao.jin@linux.intel.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Cc: Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Cc: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Cc: Krogerus Heikki &lt;heikki.krogerus@intel.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1404241617360.28206@ionos.tec.linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On x86 the allocation of irq descriptors may allocate interrupts which
are in the range of the GSI interrupts. That's wrong as those
interrupts are hardwired and we don't have the irq domain translation
like PPC. So one of these interrupts can be hooked up later to one of
the devices which are hard wired to it and the io_apic init code for
that particular interrupt line happily reuses that descriptor with a
completely different configuration so hell breaks lose.

Inside x86 we allocate dynamic interrupts from above nr_gsi_irqs,
except for a few usage sites which have not yet blown up in our face
for whatever reason. But for drivers which need an irq range, like the
GPIO drivers, we have no limit in place and we don't want to expose
such a detail to a driver.

To cure this introduce a function which an architecture can implement
to impose a lower bound on the dynamic interrupt allocations.

Implement it for x86 and set the lower bound to nr_gsi_irqs, which is
the end of the hardwired interrupt space, so all dynamic allocations
happen above.

That not only allows the GPIO driver to work sanely, it also protects
the bogus callsites of create_irq_nr() in hpet, uv, irq_remapping and
htirq code. They need to be cleaned up as well, but that's a separate
issue.

Reported-by: Jin Yao &lt;yao.jin@linux.intel.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Cc: Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Cc: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Cc: Krogerus Heikki &lt;heikki.krogerus@intel.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1404241617360.28206@ionos.tec.linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Allow forcing cpu affinity of interrupts</title>
<updated>2014-04-17T21:36:27+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2014-04-16T14:36:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=01f8fa4f01d8362358eb90e412bd7ae18a3ec1ad'/>
<id>01f8fa4f01d8362358eb90e412bd7ae18a3ec1ad</id>
<content type='text'>
The current implementation of irq_set_affinity() refuses rightfully to
route an interrupt to an offline cpu.

But there is a special case, where this is actually desired. Some of
the ARM SoCs have per cpu timers which require setting the affinity
during cpu startup where the cpu is not yet in the online mask.

If we can't do that, then the local timer interrupt for the about to
become online cpu is routed to some random online cpu.

The developers of the affected machines tried to work around that
issue, but that results in a massive mess in that timer code.

We have a yet unused argument in the set_affinity callbacks of the irq
chips, which I added back then for a similar reason. It was never
required so it got not used. But I'm happy that I never removed it.

That allows us to implement a sane handling of the above scenario. So
the affected SoC drivers can add the required force handling to their
interrupt chip, switch the timer code to irq_force_affinity() and
things just work.

This does not affect any existing user of irq_set_affinity().

Tagged for stable to allow a simple fix of the affected SoC clock
event drivers.

Reported-and-tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Cc: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Cc: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;
Cc: Tomasz Figa &lt;t.figa@samsung.com&gt;,
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;,
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: linux-arm-kernel@lists.infradead.org,
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20140416143315.717251504@linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The current implementation of irq_set_affinity() refuses rightfully to
route an interrupt to an offline cpu.

But there is a special case, where this is actually desired. Some of
the ARM SoCs have per cpu timers which require setting the affinity
during cpu startup where the cpu is not yet in the online mask.

If we can't do that, then the local timer interrupt for the about to
become online cpu is routed to some random online cpu.

The developers of the affected machines tried to work around that
issue, but that results in a massive mess in that timer code.

We have a yet unused argument in the set_affinity callbacks of the irq
chips, which I added back then for a similar reason. It was never
required so it got not used. But I'm happy that I never removed it.

That allows us to implement a sane handling of the above scenario. So
the affected SoC drivers can add the required force handling to their
interrupt chip, switch the timer code to irq_force_affinity() and
things just work.

This does not affect any existing user of irq_set_affinity().

Tagged for stable to allow a simple fix of the affected SoC clock
event drivers.

Reported-and-tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Cc: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Cc: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;
Cc: Tomasz Figa &lt;t.figa@samsung.com&gt;,
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;,
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: linux-arm-kernel@lists.infradead.org,
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20140416143315.717251504@linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Add a new IRQCHIP_EOI_THREADED flag</title>
<updated>2014-03-14T12:43:33+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2014-03-13T18:03:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=328a4978df833249b099c9875738d7b72042ffe1'/>
<id>328a4978df833249b099c9875738d7b72042ffe1</id>
<content type='text'>
The flag is necessary for interrupt chips which require an ACK/EOI
after the handler has run. In case of threaded handlers this needs to
happen after the threaded handler has completed before the unmask of
the interrupt.

The flag is only unseful in combination with the handle_fasteoi_irq
flow control handler.

It can be combined with the flag IRQCHIP_EOI_IF_HANDLED, so the EOI is
not issued when the interrupt is disabled or in progress.

Tested-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@googlegroups.com
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Link: http://lkml.kernel.org/r/1394733834-26839-2-git-send-email-hdegoede@redhat.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The flag is necessary for interrupt chips which require an ACK/EOI
after the handler has run. In case of threaded handlers this needs to
happen after the threaded handler has completed before the unmask of
the interrupt.

The flag is only unseful in combination with the handle_fasteoi_irq
flow control handler.

It can be combined with the flag IRQCHIP_EOI_IF_HANDLED, so the EOI is
not issued when the interrupt is disabled or in progress.

Tested-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@googlegroups.com
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Link: http://lkml.kernel.org/r/1394733834-26839-2-git-send-email-hdegoede@redhat.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Document IRQCHIP_ONESHOT_SAFE flag</title>
<updated>2014-03-14T12:43:33+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2014-03-13T14:32:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4f6e4f71c9d39cf49e0cb1be5b7721db5fbe92ac'/>
<id>4f6e4f71c9d39cf49e0cb1be5b7721db5fbe92ac</id>
<content type='text'>
Add missing documentation of the flag.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add missing documentation of the flag.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Provide irq_request/release_resources chip callbacks</title>
<updated>2014-03-12T15:00:24+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2014-03-08T07:59:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c1bacbae8192dd2a9ebadd22d793b68054f6c6e5'/>
<id>c1bacbae8192dd2a9ebadd22d793b68054f6c6e5</id>
<content type='text'>
For certain irq types, e.g. gpios, it's necessary to request resources
before starting up the irq.

This might fail so we cannot use the irq_startup() callback because we
might call the irq_set_type() callback before that which does not make
sense when the resource is not available. Calling irq_startup() before
irq_set_type() can lead to spurious interrupts which is not desired
either.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jean-Jacques Hiblot &lt;jjhiblot@traphandler.com&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org 
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1403080857160.18573@ionos.tec.linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For certain irq types, e.g. gpios, it's necessary to request resources
before starting up the irq.

This might fail so we cannot use the irq_startup() callback because we
might call the irq_set_type() callback before that which does not make
sense when the resource is not available. Calling irq_startup() before
irq_set_type() can lead to spurious interrupts which is not desired
either.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jean-Jacques Hiblot &lt;jjhiblot@traphandler.com&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org 
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1403080857160.18573@ionos.tec.linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Prevent spurious detection for unconditionally polled interrupts</title>
<updated>2013-11-13T15:03:02+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2013-11-06T11:30:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b39898cd4077f4b6ec706e717c938751c34e1dc4'/>
<id>b39898cd4077f4b6ec706e717c938751c34e1dc4</id>
<content type='text'>
On a 68k platform a couple of interrupts are demultiplexed and
"polled" from a top level interrupt. Unfortunately there is no way to
determine which of the sub interrupts raised the top level interrupt,
so all of the demultiplexed interrupt handlers need to be
invoked. Given a high enough frequency this can trigger the spurious
interrupt detection mechanism, if one of the demultiplex interrupts
returns IRQ_NONE continuously. But this is a false positive as the
polling causes this behaviour and not buggy hardware/software.

Introduce IRQ_POLLED which can be set at interrupt chip setup time via
irq_set_status_flags(). The flag excludes the interrupt from the
spurious detector and from all core polling activities.

Reported-and-tested-by: Michael Schmitz &lt;schmitzmic@gmail.com&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: linux-m68k@vger.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1311061149250.23353@ionos.tec.linutronix.de
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On a 68k platform a couple of interrupts are demultiplexed and
"polled" from a top level interrupt. Unfortunately there is no way to
determine which of the sub interrupts raised the top level interrupt,
so all of the demultiplexed interrupt handlers need to be
invoked. Given a high enough frequency this can trigger the spurious
interrupt detection mechanism, if one of the demultiplex interrupts
returns IRQ_NONE continuously. But this is a false positive as the
polling causes this behaviour and not buggy hardware/software.

Introduce IRQ_POLLED which can be set at interrupt chip setup time via
irq_set_status_flags(). The flag excludes the interrupt from the
spurious detector and from all core polling activities.

Reported-and-tested-by: Michael Schmitz &lt;schmitzmic@gmail.com&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: linux-m68k@vger.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1311061149250.23353@ionos.tec.linutronix.de
</pre>
</div>
</content>
</entry>
<entry>
<title>Remove GENERIC_HARDIRQ config option</title>
<updated>2013-09-13T13:09:52+00:00</updated>
<author>
<name>Martin Schwidefsky</name>
<email>schwidefsky@de.ibm.com</email>
</author>
<published>2013-08-30T07:39:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0244ad004a54e39308d495fee0a2e637f8b5c317'/>
<id>0244ad004a54e39308d495fee0a2e637f8b5c317</id>
<content type='text'>
After the last architecture switched to generic hard irqs the config
options HAVE_GENERIC_HARDIRQS &amp; GENERIC_HARDIRQS and the related code
for !CONFIG_GENERIC_HARDIRQS can be removed.

Signed-off-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After the last architecture switched to generic hard irqs the config
options HAVE_GENERIC_HARDIRQS &amp; GENERIC_HARDIRQS and the related code
for !CONFIG_GENERIC_HARDIRQS can be removed.

Signed-off-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Add irq_get_trigger_type() to get IRQ flags</title>
<updated>2013-06-25T09:48:24+00:00</updated>
<author>
<name>Javier Martinez Canillas</name>
<email>javier.martinez@collabora.co.uk</email>
</author>
<published>2013-06-14T16:40:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1f6236bfd7c38d5f9f7648fae7215e65274b9e63'/>
<id>1f6236bfd7c38d5f9f7648fae7215e65274b9e63</id>
<content type='text'>
Drivers that want to get the trigger edge/level type flags for a given
interrupt have to call irq_get_irq_data(irq) to get the struct
irq_data and then irqd_get_trigger_type(irq_data) to obtain the IRQ
flags.

This is not only error prone but also unnecessary exposes the struct
irq_data to callers.

It's better to have an irq_get_trigger_type() function to obtain the
edge/level flags for an IRQ.

Signed-off-by: Javier Martinez Canillas &lt;javier.martinez@collabora.co.uk&gt;
Acked-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Samuel Ortiz &lt;sameo@linux.intel.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-2-git-send-email-javier.martinez@collabora.co.uk
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Drivers that want to get the trigger edge/level type flags for a given
interrupt have to call irq_get_irq_data(irq) to get the struct
irq_data and then irqd_get_trigger_type(irq_data) to obtain the IRQ
flags.

This is not only error prone but also unnecessary exposes the struct
irq_data to callers.

It's better to have an irq_get_trigger_type() function to obtain the
edge/level flags for an IRQ.

Signed-off-by: Javier Martinez Canillas &lt;javier.martinez@collabora.co.uk&gt;
Acked-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Samuel Ortiz &lt;sameo@linux.intel.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-2-git-send-email-javier.martinez@collabora.co.uk
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: irqchip: Add mask to block out invalid irqs</title>
<updated>2013-05-29T08:57:11+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@linaro.org</email>
</author>
<published>2013-05-29T02:10:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e8bd834f73714378ef110a64287db1b77033c8da'/>
<id>e8bd834f73714378ef110a64287db1b77033c8da</id>
<content type='text'>
Some controllers have irqs that aren't wired up and must never be used.
For the generic chip attached to an irq_domain this provides a mask that
can be used to block out particular irqs so that they never get mapped.

Signed-off-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Link: http://lkml.kernel.org/r/1369793454-19197-2-git-send-email-grant.likely@linaro.org
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some controllers have irqs that aren't wired up and must never be used.
For the generic chip attached to an irq_domain this provides a mask that
can be used to block out particular irqs so that they never get mapped.

Signed-off-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Link: http://lkml.kernel.org/r/1369793454-19197-2-git-send-email-grant.likely@linaro.org
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Generic chip: Add linear irq domain support</title>
<updated>2013-05-29T08:57:11+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2013-05-06T14:30:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=088f40b7b027dad6519712ff224a5798dd62a204'/>
<id>088f40b7b027dad6519712ff224a5798dd62a204</id>
<content type='text'>
Provide infrastructure for irq chip implementations which work on
linear irq domains.

- Interface to allocate multiple generic chips which are associated to
  the irq domain.

- Interface to get the generic chip pointer for a particular hardware
  interrupt in the domain.

- irq domain mapping function to install the chip for a particular
  interrupt.

Note: This lacks a removal function for now.

[ Sebastian Hesselbarth: Mask cache and pointer math fixups ]

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Russell King - ARM Linux &lt;linux@arm.linux.org.uk&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Jean-Francois Moine &lt;moinejf@free.fr&gt;
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Jason Gunthorpe &lt;jgunthorpe@obsidianresearch.com&gt;
Cc: Gregory Clement &lt;gregory.clement@free-electrons.com&gt;
Cc: Gerlando Falauto &lt;gerlando.falauto@keymile.com&gt;
Cc: Rob Landley &lt;rob@landley.net&gt;
Acked-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Ezequiel Garcia &lt;ezequiel.garcia@free-electrons.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Link: http://lkml.kernel.org/r/20130506142539.450634298@linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Provide infrastructure for irq chip implementations which work on
linear irq domains.

- Interface to allocate multiple generic chips which are associated to
  the irq domain.

- Interface to get the generic chip pointer for a particular hardware
  interrupt in the domain.

- irq domain mapping function to install the chip for a particular
  interrupt.

Note: This lacks a removal function for now.

[ Sebastian Hesselbarth: Mask cache and pointer math fixups ]

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Russell King - ARM Linux &lt;linux@arm.linux.org.uk&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Jean-Francois Moine &lt;moinejf@free.fr&gt;
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Jason Gunthorpe &lt;jgunthorpe@obsidianresearch.com&gt;
Cc: Gregory Clement &lt;gregory.clement@free-electrons.com&gt;
Cc: Gerlando Falauto &lt;gerlando.falauto@keymile.com&gt;
Cc: Rob Landley &lt;rob@landley.net&gt;
Acked-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Ezequiel Garcia &lt;ezequiel.garcia@free-electrons.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Link: http://lkml.kernel.org/r/20130506142539.450634298@linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
