linux-stable.git/include/linux/clk-provider.h, branch v4.14.78

clk: honor CLK_MUX_ROUND_CLOSEST in generic clk mux

2018-06-20T19:02:42+00:00

[ Upstream commit 4ad69b80e886a845f56ce0a3d10211208693d92b ]

CLK_MUX_ROUND_CLOSEST is part of the clk_mux documentation but clk_mux
directly calls __clk_mux_determine_rate(), which overrides the flag.
As result, if clk_mux is instantiated with CLK_MUX_ROUND_CLOSEST, the
flag will be ignored and the clock rounded down.

To solve this, this patch expose clk_mux_determine_rate_flags() in the
clk-provider API and uses it in the determine_rate() callback of clk_mux.

Fixes: 15a02c1f6dd7 ("clk: Add __clk_mux_determine_rate_closest")
Signed-off-by: Jerome Brunet 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

clk: divider: fix incorrect usage of container_of

2018-04-12T10:32:13+00:00

[ Upstream commit 12a26c298d2a8b1cab498533fa65198e49e3afd3 ]

divider_recalc_rate() is an helper function used by clock divider of
different types, so the structure containing the 'hw' pointer is not
always a 'struct clk_divider'

At the following line:
> div = _get_div(table, val, flags, divider->width);

in several cases, the value of 'divider->width' is garbage as the actual
structure behind this memory is not a 'struct clk_divider'

Fortunately, this width value is used by _get_val() only when
CLK_DIVIDER_MAX_AT_ZERO flag is set. This has never been the case so
far when the structure is not a 'struct clk_divider'. This is probably
why we did not notice this bug before

Fixes: afe76c8fd030 ("clk: allow a clk divider with max divisor when zero")
Signed-off-by: Jerome Brunet 
Acked-by: Alexandre Belloni 
Acked-by: Sylvain Lemieux 
Signed-off-by: Stephen Boyd 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

clk: gate: expose clk_gate_ops::is_enabled

2017-09-01T01:35:45+00:00

This patch exposes clk_gate_ops::is_enabled as functions
that can be directly called and assigned in places like this so
we don't need wrapper functions that do nothing besides forward
the call.

Signed-off-by: Gabriel Fernandez 
Suggested-by: Stephen Boyd 
Signed-off-by: Stephen Boyd

clk: fractional-divider: allow overriding of approximation

2017-08-08T15:39:48+00:00

Fractional dividers may have special requirements concerning numerator
and denominator selection that differ from just getting the best
approximation.

For example on Rockchip socs the denominator must be at least 20 times
larger than the numerator to generate precise clock frequencies.

Therefore add the ability to provide custom approximation functions.

Signed-off-by: Elaine Zhang 
Acked-by: Stephen Boyd 
Signed-off-by: Heiko Stuebner

clk: divider: Make divider_round_rate take the parent clock

2017-06-07T13:32:12+00:00

So far, divider_round_rate only considers the parent clock returned by
clk_hw_get_parent.

This works fine on clocks that have a single parents, this doesn't work on
muxes, since we will only consider the first parent, while other parents
may totally be able to provide a better combination.

Clocks in that case cannot use divider_round_rate, so would have to come up
with a very similar logic to work around it. Instead of having to do
something like this, and duplicate that logic everywhere, create a
divider_round_rate parent to allow caller to give an additional parameter
for the parent clock to consider.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
Acked-by: Stephen Boyd 
Signed-off-by: Chen-Yu Tsai

clk: core: add __init decoration for CLK_OF_DECLARE_DRIVER function

2016-10-17T22:27:27+00:00

The new introduced macro CLK_OF_DECLARE_DRIVER is usually used to
declare clock driver init functions, which are mostly decorated with
__init.  Add __init decoration for CLK_OF_DECLARE_DRIVER function to
avoid causing section mismatch warnings on client clock drivers.

Signed-off-by: Shawn Guo 
Fixes: c7296c51ce5d ("clk: core: New macro CLK_OF_DECLARE_DRIVER")
Signed-off-by: Stephen Boyd

clk: change the type of clk_hw_onecell_data.num to unsigned int

2016-09-23T21:44:03+00:00

The "num" is the number of clk_hw entries in the structure, so
"unsigned int" would be a better fit.  (size_t looks like data
size we count by byte.)

Besides, struct clk_onecell_data already uses unsigned int for
"clk_num".

Signed-off-by: Masahiro Yamada 
Signed-off-by: Stephen Boyd

clk: return unsigned int in dummy non-OF of_clk_get_parent_count()

2016-08-26T19:27:28+00:00

In the commit 929e7f3bc7b82 ("clk: Make of_clk_get_parent_count() return
unsigned ints") of_clk_get_parent_count has been modified to return
unsigned int. There is also a dummy implementation of the same function
for configs without CONFIG_OF. For the consistency it should be updated
as well.

Signed-off-by: Rafał Miłecki 
Signed-off-by: Stephen Boyd

clk: core: New macro CLK_OF_DECLARE_DRIVER

2016-08-13T01:00:34+00:00

This will be used by drivers that requires initialization at
of_clk_init() time and also during platform device probing.

Signed-off-by: Ricardo Ribalda Delgado 
Signed-off-by: Stephen Boyd

clk: core: support clocks which requires parents enable (part 1)

2016-07-02T00:40:23+00:00

On Freescale i.MX7D platform, all clocks operations, including
enable/disable, rate change and re-parent, requires its parent
clock enable. Current clock core can not support it well.
This patch introduce a new flag CLK_OPS_PARENT_ENABLE to handle this
special case in clock core that enable its parent clock firstly for
each operation and disable it later after operation complete.

The patch part 1 fixes the possible disabling clocks while its parent
is off during kernel booting phase in clk_disable_unused_subtree().

Before the completion of kernel booting, clock tree is still not built
completely, there may be a case that the child clock is on but its
parent is off which could be caused by either HW initial reset state
or bootloader initialization.

Taking bootloader as an example, we may enable all clocks in HW by default.
And during kernel booting time, the parent clock could be disabled in its
driver probe due to calling clk_prepare_enable and clk_disable_unprepare.
Because it's child clock is only enabled in HW while its SW usecount
in clock tree is still 0, so clk_disable of parent clock will gate
the parent clock in both HW and SW usecount ultimately. Then there will
be a child clock is still on in HW but its parent is already off.

Later in clk_disable_unused(), this clock disable accessing while its
parent off will cause system hang due to the limitation of HW which
must require its parent on.

This patch simply enables the parent clock first before disabling
if flag CLK_OPS_PARENT_ENABLE is set in clk_disable_unused_subtree().
This is a simple solution and only affects booting time.

After kernel booting up the clock tree is already created, there will
be no case that child is off but its parent is off.
So no need do this checking for normal clk_disable() later.

Cc: Michael Turquette 
Cc: Stephen Boyd 
Cc: Shawn Guo 
Signed-off-by: Dong Aisheng 
Signed-off-by: Stephen Boyd