<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/include/linux/clk-provider.h, branch v3.13.2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>clk: of: helper for determining number of parent clocks</title>
<updated>2013-10-08T06:13:33+00:00</updated>
<author>
<name>Mike Turquette</name>
<email>mturquette@linaro.org</email>
</author>
<published>2013-10-08T06:12:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f61027426a5bc7093aa8359a411b053a35bb4b68'/>
<id>f61027426a5bc7093aa8359a411b053a35bb4b68</id>
<content type='text'>
Walks the "clocks" array of parent clock phandles and returns the
number.

Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Walks the "clocks" array of parent clock phandles and returns the
number.

Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: wrap I/O access for improved portability</title>
<updated>2013-08-28T00:50:38+00:00</updated>
<author>
<name>Gerhard Sittig</name>
<email>gsi@denx.de</email>
</author>
<published>2013-07-22T12:14:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=aa514ce34b65e3dc01f95a0b470b39bbb7e09998'/>
<id>aa514ce34b65e3dc01f95a0b470b39bbb7e09998</id>
<content type='text'>
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals

wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms

Signed-off-by: Gerhard Sittig &lt;gsi@denx.de&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals

wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms

Signed-off-by: Gerhard Sittig &lt;gsi@denx.de&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: clk-mux: implement remuxing on set_rate</title>
<updated>2013-08-19T19:27:18+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2013-07-29T11:25:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e366fdd72529c545ccf327569ee250c1673be221'/>
<id>e366fdd72529c545ccf327569ee250c1673be221</id>
<content type='text'>
Implement clk-mux remuxing if the CLK_SET_RATE_NO_REPARENT flag isn't
set. This implements determine_rate for clk-mux to propagate to each
parent and to choose the best one (like clk-divider this chooses the
parent which provides the fastest rate &lt;= the requested rate).

The determine_rate op is implemented as a core helper function so that
it can be easily used by more complex clocks which incorporate muxes.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement clk-mux remuxing if the CLK_SET_RATE_NO_REPARENT flag isn't
set. This implements determine_rate for clk-mux to propagate to each
parent and to choose the best one (like clk-divider this chooses the
parent which provides the fastest rate &lt;= the requested rate).

The determine_rate op is implemented as a core helper function so that
it can be easily used by more complex clocks which incorporate muxes.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: add CLK_SET_RATE_NO_REPARENT flag</title>
<updated>2013-08-19T19:27:17+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2013-07-29T11:25:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=819c1de344c5b8350bffd35be9a0fa74541292d3'/>
<id>819c1de344c5b8350bffd35be9a0fa74541292d3</id>
<content type='text'>
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Sascha Hauer &lt;kernel@pengutronix.de&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Viresh Kumar &lt;viresh.linux@gmail.com&gt;
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Cc: Chao Xie &lt;xiechao.mail@gmail.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: "Emilio López" &lt;emilio@elopez.com.ar&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Andrew Chew &lt;achew@nvidia.com&gt;
Cc: Doug Anderson &lt;dianders@chromium.org&gt;
Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Cc: Thomas Abraham &lt;thomas.abraham@linaro.org&gt;
Cc: Tomasz Figa &lt;t.figa@samsung.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt; [tegra]
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt; [sunxi]
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt; [Zynq]
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Sascha Hauer &lt;kernel@pengutronix.de&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Viresh Kumar &lt;viresh.linux@gmail.com&gt;
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Cc: Chao Xie &lt;xiechao.mail@gmail.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: "Emilio López" &lt;emilio@elopez.com.ar&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Cc: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Andrew Chew &lt;achew@nvidia.com&gt;
Cc: Doug Anderson &lt;dianders@chromium.org&gt;
Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Cc: Thomas Abraham &lt;thomas.abraham@linaro.org&gt;
Cc: Tomasz Figa &lt;t.figa@samsung.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt; [tegra]
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt; [sunxi]
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt; [Zynq]
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: add support for clock reparent on set_rate</title>
<updated>2013-08-19T19:27:17+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2013-07-29T11:25:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=71472c0c06cf9a3d1540762ea205654c584e3bc4'/>
<id>71472c0c06cf9a3d1540762ea205654c584e3bc4</id>
<content type='text'>
Add core support to allow clock implementations to select the best
parent clock when rounding a rate, e.g. the one which can provide the
closest clock rate to that requested. This is by way of adding a new
clock op, determine_rate(), which is like round_rate() but has an extra
parameter to allow the clock implementation to optionally select a
different parent clock. The core then takes care of reparenting the
clock when setting the rate.

The parent change takes place with the help of some new private data
members. struct clk::new_parent specifies a clock's new parent (NULL
indicates no change), and struct clk::new_child specifies a clock's new
child (whose new_parent member points back to it). The purpose of these
are to allow correct walking of the future tree for notifications prior
to actually reparenting any clocks, specifically to skip child clocks
who are being reparented to another clock (they will be notified via the
new parent), and to include any new child clock. These pointers are set
by clk_calc_subtree(), and the new_child pointer gets cleared when a
child is actually reparented to avoid duplicate POST_RATE_CHANGE
notifications.

Each place where round_rate() is called, determine_rate() is checked
first and called in preference. This restructures a few of the call
sites to simplify the logic into if/else blocks.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add core support to allow clock implementations to select the best
parent clock when rounding a rate, e.g. the one which can provide the
closest clock rate to that requested. This is by way of adding a new
clock op, determine_rate(), which is like round_rate() but has an extra
parameter to allow the clock implementation to optionally select a
different parent clock. The core then takes care of reparenting the
clock when setting the rate.

The parent change takes place with the help of some new private data
members. struct clk::new_parent specifies a clock's new parent (NULL
indicates no change), and struct clk::new_child specifies a clock's new
child (whose new_parent member points back to it). The purpose of these
are to allow correct walking of the future tree for notifications prior
to actually reparenting any clocks, specifically to skip child clocks
who are being reparented to another clock (they will be notified via the
new parent), and to include any new child clock. These pointers are set
by clk_calc_subtree(), and the new_child pointer gets cleared when a
child is actually reparented to avoid duplicate POST_RATE_CHANGE
notifications.

Each place where round_rate() is called, determine_rate() is checked
first and called in preference. This restructures a few of the call
sites to simplify the logic into if/else blocks.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: abstract parent cache</title>
<updated>2013-08-19T19:27:15+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2013-07-29T11:24:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7ef3dcc8145263cb5a8c7059f82d44c948eb46a8'/>
<id>7ef3dcc8145263cb5a8c7059f82d44c948eb46a8</id>
<content type='text'>
Abstract access to the clock parent cache by defining
clk_get_parent_by_index(clk, index). This allows access to parent
clocks from clock drivers.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Abstract access to the clock parent cache by defining
clk_get_parent_by_index(clk, index). This allows access to parent
clocks from clock drivers.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: mux: Add support for read-only muxes.</title>
<updated>2013-08-05T18:56:46+00:00</updated>
<author>
<name>Tomasz Figa</name>
<email>tomasz.figa@gmail.com</email>
</author>
<published>2013-07-22T23:49:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c57acd14ac2d53e40f5c17701c3cc3a092a07b35'/>
<id>c57acd14ac2d53e40f5c17701c3cc3a092a07b35</id>
<content type='text'>
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.

Signed-off-by: Tomasz Figa &lt;tomasz.figa@gmail.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.

Signed-off-by: Tomasz Figa &lt;tomasz.figa@gmail.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: gate: add CLK_GATE_HIWORD_MASK</title>
<updated>2013-06-16T03:23:53+00:00</updated>
<author>
<name>Haojian Zhuang</name>
<email>haojian.zhuang@linaro.org</email>
</author>
<published>2013-06-08T14:47:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=045779942c04646a222289989e6a5b617dfdedf7'/>
<id>045779942c04646a222289989e6a5b617dfdedf7</id>
<content type='text'>
In Rockchip Cortex-A9 based chips, they don't use paradigm of
reading-changing-writing the register contents.  Instead they
use a hiword mask to indicate the changed bits.

When b1 should be set as gate, it also needs to indicate the change
by setting hiword mask (b1 &lt;&lt; 16).

The patch adds gate flag for this usage.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In Rockchip Cortex-A9 based chips, they don't use paradigm of
reading-changing-writing the register contents.  Instead they
use a hiword mask to indicate the changed bits.

When b1 should be set as gate, it also needs to indicate the change
by setting hiword mask (b1 &lt;&lt; 16).

The patch adds gate flag for this usage.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: divider: add CLK_DIVIDER_HIWORD_MASK flag</title>
<updated>2013-06-16T03:23:49+00:00</updated>
<author>
<name>Haojian Zhuang</name>
<email>haojian.zhuang@linaro.org</email>
</author>
<published>2013-06-08T14:47:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d57dfe7508af2b528e26d84792edec1e7d919682'/>
<id>d57dfe7508af2b528e26d84792edec1e7d919682</id>
<content type='text'>
In both Hisilicon &amp; Rockchip Cortex-A9 based chips, they don't use the
paradigm of reading-changing-writing the register contents.
Instead they use a hiword mask to indicate the changed bits.

When b01 should be set as setting divider, it also needs to indicate
the change by setting hiword mask (b11 &lt;&lt; 16).

The patch adds divider flag for this usage.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In both Hisilicon &amp; Rockchip Cortex-A9 based chips, they don't use the
paradigm of reading-changing-writing the register contents.
Instead they use a hiword mask to indicate the changed bits.

When b01 should be set as setting divider, it also needs to indicate
the change by setting hiword mask (b11 &lt;&lt; 16).

The patch adds divider flag for this usage.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: mux: add CLK_MUX_HIWORD_MASK</title>
<updated>2013-06-16T03:23:36+00:00</updated>
<author>
<name>Haojian Zhuang</name>
<email>haojian.zhuang@linaro.org</email>
</author>
<published>2013-06-08T14:47:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ba492e900704ba00d43c7af9d94b00da4df52587'/>
<id>ba492e900704ba00d43c7af9d94b00da4df52587</id>
<content type='text'>
In both Hisilicon &amp; Rockchip Cortex-A9 based chips, they don't use the
paradigm of reading-changing-writing the register contents.
Instead they use a hiword mask to indicate the changed bits.

When b01 should be set as switching mux, it also needs to indicate
the change by setting hiword mask (b11 &lt;&lt; 16).

The patch adds mux flag for this usage.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In both Hisilicon &amp; Rockchip Cortex-A9 based chips, they don't use the
paradigm of reading-changing-writing the register contents.
Instead they use a hiword mask to indicate the changed bits.

When b01 should be set as switching mux, it also needs to indicate
the change by setting hiword mask (b11 &lt;&lt; 16).

The patch adds mux flag for this usage.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
