linux-stable.git/include/dt-bindings/interconnect, branch v6.3.3 Linux kernel stable tree Merge branch 'icc-sa8775p' into icc-next 2023-02-06T13:39:41+00:00 Georgi Djakov djakov@kernel.org 2023-02-06T13:39:41+00:00 b1f5e7ff0c4eddebbc8a598ae4a1c3f3bf1ebad4 * icc-sa8775p dt-bindings: interconnect: qcom: document the interconnects for sa8775p interconnect: qcom: add a driver for sa8775p dt-bindings: interconnect: qcom,sa8775p-rpmh: fix a typo Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl Signed-off-by: Georgi Djakov <djakov@kernel.org> 
* icc-sa8775p
  dt-bindings: interconnect: qcom: document the interconnects for sa8775p
  interconnect: qcom: add a driver for sa8775p
  dt-bindings: interconnect: qcom,sa8775p-rpmh: fix a typo

Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-sdm670' into icc-next 2023-02-06T13:39:15+00:00 Georgi Djakov djakov@kernel.org 2023-02-06T13:39:15+00:00 b9544fb577288e7f81218fc6f50d74c248bc20a4 * icc-sdm670 dt-bindings: interconnect: add sdm670 interconnects interconnect: qcom: add sdm670 interconnects Link: https://lore.kernel.org/r/20230111005155.50452-1-mailingradian@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
* icc-sdm670
  dt-bindings: interconnect: add sdm670 interconnects
  interconnect: qcom: add sdm670 interconnects

Link: https://lore.kernel.org/r/20230111005155.50452-1-mailingradian@gmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-ip0-migration' into icc-next 2023-02-06T13:38:22+00:00 Georgi Djakov djakov@kernel.org 2023-02-06T13:38:22+00:00 863ed40ea903568b8af9a91e3ca1884a778e79a5 Commits 2f3724930eb4 ("interconnect: qcom: sc7180: Drop IP0 interconnects") and 2fb251c26560 ("interconnect: qcom: sdx55: Drop IP0 interconnects") removed IP0 interconnects (and ipa-virt devices support) in favour of the RPMH clocks. Follow this example for other platforms defining IP0 RPMH resource. While we are at it, remove several leftover from the mentioned patches. * icc-ip0-migration: interconnect: qcom: sdx55: drop IP0 remnants interconnect: qcom: sc7180: drop IP0 remnants interconnect: move ignore_list out of of_count_icc_providers() interconnect: qcom: sm8150: Drop IP0 interconnects interconnect: qcom: sm8250: Drop IP0 interconnects interconnect: qcom: sc8180x: Drop IP0 interconnects interconnect: qcom: sc8280xp: Drop IP0 interconnects dt-bindings: interconnect: qcom: Remove ipa-virt compatibles dt-bindings: interconnect: qcom: drop IPA_CORE related defines Link: https://lore.kernel.org/r/20230109002935.244320-1-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Commits 2f3724930eb4 ("interconnect: qcom: sc7180: Drop IP0
interconnects") and 2fb251c26560 ("interconnect: qcom: sdx55: Drop IP0
interconnects") removed IP0 interconnects (and ipa-virt devices support)
in favour of the RPMH clocks. Follow this example for other platforms
defining IP0 RPMH resource. While we are at it, remove several leftover
from the mentioned patches.

* icc-ip0-migration:
  interconnect: qcom: sdx55: drop IP0 remnants
  interconnect: qcom: sc7180: drop IP0 remnants
  interconnect: move ignore_list out of of_count_icc_providers()
  interconnect: qcom: sm8150: Drop IP0 interconnects
  interconnect: qcom: sm8250: Drop IP0 interconnects
  interconnect: qcom: sc8180x: Drop IP0 interconnects
  interconnect: qcom: sc8280xp: Drop IP0 interconnects
  dt-bindings: interconnect: qcom: Remove ipa-virt compatibles
  dt-bindings: interconnect: qcom: drop IPA_CORE related defines

Link: https://lore.kernel.org/r/20230109002935.244320-1-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: qcom: document the interconnects for sa8775p 2023-01-19T18:22:11+00:00 Bartosz Golaszewski bartosz.golaszewski@linaro.org 2023-01-18T14:08:24+00:00 2579af94c813d16bfabd81797f492fdfba25d088 Add a DT binding document for the RPMh interconnects on Qualcomm sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Add a DT binding document for the RPMh interconnects on Qualcomm sa8775p
platforms.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: add sdm670 interconnects 2023-01-19T18:12:40+00:00 Richard Acayan mailingradian@gmail.com 2023-01-11T00:51:52+00:00 81ccf4557105068eff754b5764c44c0f16c3ca66 There are controllable interconnects on Snapdragon 670. Add the compatible strings to the documentation and interconnect ID definitions. The device tree header was generated by linux-interconnect-driver-generator and the copyright year was changed. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230111005155.50452-2-mailingradian@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
There are controllable interconnects on Snapdragon 670. Add the
compatible strings to the documentation and interconnect ID definitions.

The device tree header was generated by
linux-interconnect-driver-generator and the copyright year was changed.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230111005155.50452-2-mailingradian@gmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: qcom: drop IPA_CORE related defines 2023-01-18T14:16:19+00:00 Dmitry Baryshkov dmitry.baryshkov@linaro.org 2023-01-09T00:29:32+00:00 e51c94dd9c7af3d84b19d1753ee118f999c6c8dd These interconnects are modeled as clks, not interconnects, therefore remove corresponding defines from the binding as they're unused. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230109002935.244320-10-dmitry.baryshkov@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
These interconnects are modeled as clks, not interconnects, therefore
remove corresponding defines from the binding as they're unused.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230109002935.244320-10-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-qdu1000' into icc-next 2023-01-05T14:17:08+00:00 Georgi Djakov djakov@kernel.org 2023-01-05T14:17:08+00:00 163ea2048dc8cff2146036e61137107d229e972b Add dt bindings and driver support for the Qualcomm QDU1000 and QRU1000 SoCs. The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit 1000 are new SoCs meant for enabling Open RAN solutions. See more at https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf Link: https://lore.kernel.org/r/20221216230914.21771-1-quic_molvera@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Add dt bindings and driver support for the Qualcomm QDU1000 and QRU1000
SoCs.

The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit
1000 are new SoCs meant for enabling Open RAN solutions. See more at
https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf

Link: https://lore.kernel.org/r/20221216230914.21771-1-quic_molvera@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: Add QDU1000/QRU1000 devices 2023-01-05T14:14:07+00:00 Melody Olvera quic_molvera@quicinc.com 2022-12-16T23:09:13+00:00 991f1372d028ddc135c732f97bf909d72ca8b0b0 Add separate schema for QDU1000 and QRU1000 interconnect devices to document the different NoCs on these platforms. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221216230914.21771-2-quic_molvera@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
Add separate schema for QDU1000 and QRU1000 interconnect devices
to document the different NoCs on these platforms.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221216230914.21771-2-quic_molvera@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
dt-bindings: interconnect: Add Qualcomm SM8550 2022-12-29T09:36:33+00:00 Abel Vesa abel.vesa@linaro.org 2022-12-02T23:20:53+00:00 66773faf054b9d8c11e126f47e24b1dabdadb4d8 The Qualcomm SM8550 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221202232054.2666830-2-abel.vesa@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 
The Qualcomm SM8550 SoC has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221202232054.2666830-2-abel.vesa@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Merge branch 'icc-imx8mp' into icc-next 2022-07-15T14:55:48+00:00 Georgi Djakov djakov@kernel.org 2022-07-15T14:55:48+00:00 33f033dc30d92a00b2b0f0f67a8ad46fde269bf3 This patchset is to support i.MX8MP NoC settings, i.MX8MP NoC initial value after power up is invalid, need set a valid value after related power domain up. This patchset also includes two patch[1,2] during my development to enable the ICC feature for i.MX8MP. I not include ddrc DVFS in this patchset, ths patchset is only to support NoC value mode/priority/ext_control being set to a valid value that suggested by i.MX Chip Design Team. The value is same as NXP downstream one inside Arm Trusted Firmware: https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/i/gpc.c?h=lf_v2.4#n97 Link: https://lore.kernel.org/r/20220703091132.1412063-1-peng.fan@oss.nxp.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 
This patchset is to support i.MX8MP NoC settings, i.MX8MP NoC initial
value after power up is invalid, need set a valid value after related
power domain up.

This patchset also includes two patch[1,2] during my development to enable
the ICC feature for i.MX8MP.

I not include ddrc DVFS in this patchset, ths patchset is only to
support NoC value mode/priority/ext_control being set to a valid value
that suggested by i.MX Chip Design Team. The value is same as NXP
downstream one inside Arm Trusted Firmware:
https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/i/gpc.c?h=lf_v2.4#n97

Link: https://lore.kernel.org/r/20220703091132.1412063-1-peng.fan@oss.nxp.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>