linux-stable.git/drivers/usb/dwc3, branch v4.4 Linux kernel stable tree usb: dwc3: gadget: don't prestart interrupt endpoints 2015-11-30T21:35:14+00:00 Felipe Balbi balbi@ti.com 2015-11-30T21:24:29+00:00 62e345ae5b6ed977b02c24d1eaeaece062f9fb17 Because interrupt endpoints usually transmit such small amounts of data, it seems pointless to prestart transfers and try to get speed improvements. This patch also sorts out a problem with CDC ECM function where its notification endpoint gets stuck in busy state and we continuously issue Update Transfer commands. Fixes: 8a1a9c9e4503 ("usb: dwc3: gadget: start transfer on XFER_COMPLETE") Signed-off-by: Felipe Balbi <balbi@ti.com> 
Because interrupt endpoints usually transmit such
small amounts of data, it seems pointless to prestart
transfers and try to get speed improvements. This
patch also sorts out a problem with CDC ECM function
where its notification endpoint gets stuck in busy
state and we continuously issue Update Transfer
commands.

Fixes: 8a1a9c9e4503 ("usb: dwc3: gadget: start transfer on XFER_COMPLETE")
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: gadget: let us set lower max_speed 2015-11-17T17:35:48+00:00 Ben McCauley ben.mccauley@garmin.com 2015-11-16T16:47:24+00:00 b9e51b2b1fda19143f48d182ed7a2943f21e1ae4 In some SoCs, dwc3 is implemented as a USB2.0 only core, meaning that it can't ever achieve SuperSpeed. Currect driver always sets gadget.max_speed to USB_SPEED_SUPER unconditionally. This can causes issues to some Host stacks where the host will issue a GetBOS() request and we will reply with a BOS containing Superspeed Capability Descriptor. At least Windows seems to be upset by this fact and prints a warning that we should connect $this device to another port. [ balbi@ti.com : rewrote entire commit, including source code comment to make a lot clearer what the problem is ] Cc: <stable@vger.kernel.org> Signed-off-by: Ben McCauley <ben.mccauley@garmin.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
In some SoCs, dwc3 is implemented as a USB2.0 only
core, meaning that it can't ever achieve SuperSpeed.

Currect driver always sets gadget.max_speed to
USB_SPEED_SUPER unconditionally. This can causes
issues to some Host stacks where the host will issue
a GetBOS() request and we will reply with a BOS
containing Superspeed Capability Descriptor.

At least Windows seems to be upset by this fact and
prints a warning that we should connect $this device
to another port.

[ balbi@ti.com : rewrote entire commit, including
source code comment to make a lot clearer what the
problem is ]

Cc: <stable@vger.kernel.org>
Signed-off-by: Ben McCauley <ben.mccauley@garmin.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: pci: add support for Intel Broxton SOC 2015-11-16T16:12:29+00:00 Heikki Krogerus heikki.krogerus@linux.intel.com 2015-10-21T11:37:04+00:00 b4c580a43d520b7812c0fd064fbab929ce2f1da0 PCI IDs for Broxton based platforms. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
PCI IDs for Broxton based platforms.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Revert "usb: dwc3: gadget: drop unnecessary loop when cleaning up TRBs" 2015-10-12T18:36:13+00:00 Ville Syrjälä ville.syrjala@linux.intel.com 2015-08-31T16:48:28+00:00 d115d7050a0d2c4967532f18c9cb522fea6b7280 This reverts commit 8f2c9544aba636134303105ecb164190a39dece4. As it breaks g_ether on my Baytrail FFRD8 device. Everything starts out fine, but after a bit of data has been transferred it just stops flowing. Note that I do get a bunch of these "NOHZ: local_softirq_pending 08" when booting the machine, but I'm not really sure if they're related to this problem. Cc: Felipe Balbi <balbi@ti.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-usb@vger.kernel.org Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This reverts commit 8f2c9544aba636134303105ecb164190a39dece4.

As it breaks g_ether on my Baytrail FFRD8 device. Everything starts out
fine, but after a bit of data has been transferred it just stops
flowing.

Note that I do get a bunch of these "NOHZ: local_softirq_pending 08"
when booting the machine, but I'm not really sure if they're related
to this problem.

Cc: Felipe Balbi <balbi@ti.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Revert "usb: dwc3: gadget: remove unnecessary _irqsave()" 2015-10-12T18:32:05+00:00 Felipe Balbi balbi@ti.com 2015-10-12T18:25:44+00:00 e5f68b4a3e7b006f209aba078d6a5ff3a78dd783 This reverts commit 70f3a9caa11665e9f9aace581d85d8483716a4c8. That commit was causing a lockdep splat with g_ether and that was interfering with proper functionality. Signed-off-by: Felipe Balbi <balbi@ti.com> 
This reverts commit 70f3a9caa11665e9f9aace581d85d8483716a4c8.

That commit was causing a lockdep splat with g_ether and that
was interfering with proper functionality.

Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: pci: Set enblslpm quirk for Synopsys platforms 2015-10-09T21:06:59+00:00 John Youn John.Youn@synopsys.com 2015-10-03T03:32:17+00:00 94218ee31ba56fb3a8625978b393124ad660408e Certain Synopsys prototyping PHY boards are not able to meet timings constraints for LPM. This allows the PHY to meet those timings by leaving the PHY clock running during suspend. Cc: <stable@vger.kernel.org> # v3.18+ Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
Certain Synopsys prototyping PHY boards are not able to meet timings
constraints for LPM. This allows the PHY to meet those timings by
leaving the PHY clock running during suspend.

Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: Add dis_enblslpm_quirk 2015-10-09T21:06:59+00:00 John Youn John.Youn@synopsys.com 2015-10-03T03:30:57+00:00 ec791d149bca4511e7d3a6a92bb3b030c5a443f9 Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls whether the PHY receives the suspend signal from the controller. Cc: <stable@vger.kernel.org> # v3.18+ Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
whether the PHY receives the suspend signal from the controller.

Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: pci: Add platform data for Synopsys HAPS 2015-10-09T21:06:59+00:00 John Youn John.Youn@synopsys.com 2015-09-26T07:11:15+00:00 bb7f3d6d323a56b9c3b3e727380d1395a7f10107 Add platform data and set usb3_lpm_capable and has_lpm_erratum. Cc: <stable@vger.kernel.org> # v3.18+ Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
Add platform data and set usb3_lpm_capable and has_lpm_erratum.

Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: pci: trivial: Formatting 2015-10-09T21:06:59+00:00 John Youn John.Youn@synopsys.com 2015-09-26T06:47:53+00:00 9a5a0783e4910d9e2063e87184fbd9cac7161a16 Fix the alignment of the PCI device definitions. Also change the hex digit capitalization of one constant to make it consistent with the rest of the file and driver. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
Fix the alignment of the PCI device definitions. Also change the hex
digit capitalization of one constant to make it consistent with the
rest of the file and driver.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb: dwc3: Support Synopsys USB 3.1 IP 2015-10-09T21:06:58+00:00 John Youn John.Youn@synopsys.com 2015-09-05T02:15:10+00:00 690fb3718a70c66004342f6f5e2e8a5f95b977db This patch allows the dwc3 driver to run on the new Synopsys USB 3.1 IP core, albeit in USB 3.0 mode only. The Synopsys USB 3.1 IP (DWC_usb31) retains mostly the same register interface and programming model as the existing USB 3.0 controller IP (DWC_usb3). However the GSNPSID and version numbers are different. Add checking for the new ID to pass driver probe. Also, since the DWC_usb31 version number is lower in value than the full GSNPSID of the DWC_usb3 IP, we set the high bit to identify DWC_usb31 and to ensure the values are higher. Finally, add a documentation note about the revision numbering scheme. Any future revision checks (for STARS, workarounds, and new features) should take into consideration how it applies to both the 3.1/3.0 IP. Cc: <stable@vger.kernel.org> # v3.18+ Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com> 
This patch allows the dwc3 driver to run on the new Synopsys USB 3.1
IP core, albeit in USB 3.0 mode only.

The Synopsys USB 3.1 IP (DWC_usb31) retains mostly the same register
interface and programming model as the existing USB 3.0 controller IP
(DWC_usb3). However the GSNPSID and version numbers are different.

Add checking for the new ID to pass driver probe.

Also, since the DWC_usb31 version number is lower in value than the
full GSNPSID of the DWC_usb3 IP, we set the high bit to identify
DWC_usb31 and to ensure the values are higher.

Finally, add a documentation note about the revision numbering scheme.
Any future revision checks (for STARS, workarounds, and new features)
should take into consideration how it applies to both the 3.1/3.0 IP.

Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>