<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/thermal/intel, branch v5.13.2</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'x86_urgent_for_v5.13-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2021-06-06T19:25:43+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-06-06T19:25:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=773ac53bbfcebb58ce03577d94ce471cadf3ea18'/>
<id>773ac53bbfcebb58ce03577d94ce471cadf3ea18</id>
<content type='text'>
Pull x86 fixes from Borislav Petkov:
 "A bunch of x86/urgent stuff accumulated for the last two weeks so
  lemme unload it to you.

  It should be all totally risk-free, of course. :-)

   - Fix out-of-spec hardware (1st gen Hygon) which does not implement
     MSR_AMD64_SEV even though the spec clearly states so, and check
     CPUID bits first.

   - Send only one signal to a task when it is a SEGV_PKUERR si_code
     type.

   - Do away with all the wankery of reserving X amount of memory in the
     first megabyte to prevent BIOS corrupting it and simply and
     unconditionally reserve the whole first megabyte.

   - Make alternatives NOP optimization work at an arbitrary position
     within the patched sequence because the compiler can put
     single-byte NOPs for alignment anywhere in the sequence (32-bit
     retpoline), vs our previous assumption that the NOPs are only
     appended.

   - Force-disable ENQCMD[S] instructions support and remove
     update_pasid() because of insufficient protection against FPU state
     modification in an interrupt context, among other xstate horrors
     which are being addressed at the moment. This one limits the
     fallout until proper enablement.

   - Use cpu_feature_enabled() in the idxd driver so that it can be
     build-time disabled through the defines in disabled-features.h.

   - Fix LVT thermal setup for SMI delivery mode by making sure the APIC
     LVT value is read before APIC initialization so that softlockups
     during boot do not happen at least on one machine.

   - Mark all legacy interrupts as legacy vectors when the IO-APIC is
     disabled and when all legacy interrupts are routed through the PIC"

* tag 'x86_urgent_for_v5.13-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/sev: Check SME/SEV support in CPUID first
  x86/fault: Don't send SIGSEGV twice on SEGV_PKUERR
  x86/setup: Always reserve the first 1M of RAM
  x86/alternative: Optimize single-byte NOPs at an arbitrary position
  x86/cpufeatures: Force disable X86_FEATURE_ENQCMD and remove update_pasid()
  dmaengine: idxd: Use cpu_feature_enabled()
  x86/thermal: Fix LVT thermal setup for SMI delivery mode
  x86/apic: Mark _all_ legacy interrupts when IO/APIC is missing
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 fixes from Borislav Petkov:
 "A bunch of x86/urgent stuff accumulated for the last two weeks so
  lemme unload it to you.

  It should be all totally risk-free, of course. :-)

   - Fix out-of-spec hardware (1st gen Hygon) which does not implement
     MSR_AMD64_SEV even though the spec clearly states so, and check
     CPUID bits first.

   - Send only one signal to a task when it is a SEGV_PKUERR si_code
     type.

   - Do away with all the wankery of reserving X amount of memory in the
     first megabyte to prevent BIOS corrupting it and simply and
     unconditionally reserve the whole first megabyte.

   - Make alternatives NOP optimization work at an arbitrary position
     within the patched sequence because the compiler can put
     single-byte NOPs for alignment anywhere in the sequence (32-bit
     retpoline), vs our previous assumption that the NOPs are only
     appended.

   - Force-disable ENQCMD[S] instructions support and remove
     update_pasid() because of insufficient protection against FPU state
     modification in an interrupt context, among other xstate horrors
     which are being addressed at the moment. This one limits the
     fallout until proper enablement.

   - Use cpu_feature_enabled() in the idxd driver so that it can be
     build-time disabled through the defines in disabled-features.h.

   - Fix LVT thermal setup for SMI delivery mode by making sure the APIC
     LVT value is read before APIC initialization so that softlockups
     during boot do not happen at least on one machine.

   - Mark all legacy interrupts as legacy vectors when the IO-APIC is
     disabled and when all legacy interrupts are routed through the PIC"

* tag 'x86_urgent_for_v5.13-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/sev: Check SME/SEV support in CPUID first
  x86/fault: Don't send SIGSEGV twice on SEGV_PKUERR
  x86/setup: Always reserve the first 1M of RAM
  x86/alternative: Optimize single-byte NOPs at an arbitrary position
  x86/cpufeatures: Force disable X86_FEATURE_ENQCMD and remove update_pasid()
  dmaengine: idxd: Use cpu_feature_enabled()
  x86/thermal: Fix LVT thermal setup for SMI delivery mode
  x86/apic: Mark _all_ legacy interrupts when IO/APIC is missing
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/thermal: Fix LVT thermal setup for SMI delivery mode</title>
<updated>2021-05-31T20:32:26+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-05-27T09:02:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9a90ed065a155d13db0d0ffeaad5cc54e51c90c6'/>
<id>9a90ed065a155d13db0d0ffeaad5cc54e51c90c6</id>
<content type='text'>
There are machines out there with added value crap^WBIOS which provide an
SMI handler for the local APIC thermal sensor interrupt. Out of reset,
the BSP on those machines has something like 0x200 in that APIC register
(timestamps left in because this whole issue is timing sensitive):

  [    0.033858] read lvtthmr: 0x330, val: 0x200

which means:

 - bit 16 - the interrupt mask bit is clear and thus that interrupt is enabled
 - bits [10:8] have 010b which means SMI delivery mode.

Now, later during boot, when the kernel programs the local APIC, it
soft-disables it temporarily through the spurious vector register:

  setup_local_APIC:

  	...

	/*
	 * If this comes from kexec/kcrash the APIC might be enabled in
	 * SPIV. Soft disable it before doing further initialization.
	 */
	value = apic_read(APIC_SPIV);
	value &amp;= ~APIC_SPIV_APIC_ENABLED;
	apic_write(APIC_SPIV, value);

which means (from the SDM):

"10.4.7.2 Local APIC State After It Has Been Software Disabled

...

* The mask bits for all the LVT entries are set. Attempts to reset these
bits will be ignored."

And this happens too:

  [    0.124111] APIC: Switch to symmetric I/O mode setup
  [    0.124117] lvtthmr 0x200 before write 0xf to APIC 0xf0
  [    0.124118] lvtthmr 0x10200 after write 0xf to APIC 0xf0

This results in CPU 0 soft lockups depending on the placement in time
when the APIC soft-disable happens. Those soft lockups are not 100%
reproducible and the reason for that can only be speculated as no one
tells you what SMM does. Likely, it confuses the SMM code that the APIC
is disabled and the thermal interrupt doesn't doesn't fire at all,
leading to CPU 0 stuck in SMM forever...

Now, before

  4f432e8bb15b ("x86/mce: Get rid of mcheck_intel_therm_init()")

due to how the APIC_LVTTHMR was read before APIC initialization in
mcheck_intel_therm_init(), it would read the value with the mask bit 16
clear and then intel_init_thermal() would replicate it onto the APs and
all would be peachy - the thermal interrupt would remain enabled.

But that commit moved that reading to a later moment in
intel_init_thermal(), resulting in reading APIC_LVTTHMR on the BSP too
late and with its interrupt mask bit set.

Thus, revert back to the old behavior of reading the thermal LVT
register before the APIC gets initialized.

Fixes: 4f432e8bb15b ("x86/mce: Get rid of mcheck_intel_therm_init()")
Reported-by: James Feeney &lt;james@nurealm.net&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Link: https://lkml.kernel.org/r/YKIqDdFNaXYd39wz@zn.tnic
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are machines out there with added value crap^WBIOS which provide an
SMI handler for the local APIC thermal sensor interrupt. Out of reset,
the BSP on those machines has something like 0x200 in that APIC register
(timestamps left in because this whole issue is timing sensitive):

  [    0.033858] read lvtthmr: 0x330, val: 0x200

which means:

 - bit 16 - the interrupt mask bit is clear and thus that interrupt is enabled
 - bits [10:8] have 010b which means SMI delivery mode.

Now, later during boot, when the kernel programs the local APIC, it
soft-disables it temporarily through the spurious vector register:

  setup_local_APIC:

  	...

	/*
	 * If this comes from kexec/kcrash the APIC might be enabled in
	 * SPIV. Soft disable it before doing further initialization.
	 */
	value = apic_read(APIC_SPIV);
	value &amp;= ~APIC_SPIV_APIC_ENABLED;
	apic_write(APIC_SPIV, value);

which means (from the SDM):

"10.4.7.2 Local APIC State After It Has Been Software Disabled

...

* The mask bits for all the LVT entries are set. Attempts to reset these
bits will be ignored."

And this happens too:

  [    0.124111] APIC: Switch to symmetric I/O mode setup
  [    0.124117] lvtthmr 0x200 before write 0xf to APIC 0xf0
  [    0.124118] lvtthmr 0x10200 after write 0xf to APIC 0xf0

This results in CPU 0 soft lockups depending on the placement in time
when the APIC soft-disable happens. Those soft lockups are not 100%
reproducible and the reason for that can only be speculated as no one
tells you what SMM does. Likely, it confuses the SMM code that the APIC
is disabled and the thermal interrupt doesn't doesn't fire at all,
leading to CPU 0 stuck in SMM forever...

Now, before

  4f432e8bb15b ("x86/mce: Get rid of mcheck_intel_therm_init()")

due to how the APIC_LVTTHMR was read before APIC initialization in
mcheck_intel_therm_init(), it would read the value with the mask bit 16
clear and then intel_init_thermal() would replicate it onto the APs and
all would be peachy - the thermal interrupt would remain enabled.

But that commit moved that reading to a later moment in
intel_init_thermal(), resulting in reading APIC_LVTTHMR on the BSP too
late and with its interrupt mask bit set.

Thus, revert back to the old behavior of reading the thermal LVT
register before the APIC gets initialized.

Fixes: 4f432e8bb15b ("x86/mce: Get rid of mcheck_intel_therm_init()")
Reported-by: James Feeney &lt;james@nurealm.net&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Link: https://lkml.kernel.org/r/YKIqDdFNaXYd39wz@zn.tnic
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal/drivers/intel: Initialize RW trip to THERMAL_TEMP_INVALID</title>
<updated>2021-05-14T07:37:27+00:00</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2021-04-30T12:23:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=eb8500b874cf295971a6a2a04e14eb0854197a3c'/>
<id>eb8500b874cf295971a6a2a04e14eb0854197a3c</id>
<content type='text'>
After commit 81ad4276b505 ("Thermal: Ignore invalid trip points") all
user_space governor notifications via RW trip point is broken in intel
thermal drivers. This commits marks trip_points with value of 0 during
call to thermal_zone_device_register() as invalid. RW trip points can be
0 as user space will set the correct trip temperature later.

During driver init, x86_package_temp and all int340x drivers sets RW trip
temperature as 0. This results in all these trips marked as invalid by
the thermal core.

To fix this initialize RW trips to THERMAL_TEMP_INVALID instead of 0.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20210430122343.1789899-1-srinivas.pandruvada@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After commit 81ad4276b505 ("Thermal: Ignore invalid trip points") all
user_space governor notifications via RW trip point is broken in intel
thermal drivers. This commits marks trip_points with value of 0 during
call to thermal_zone_device_register() as invalid. RW trip points can be
0 as user space will set the correct trip temperature later.

During driver init, x86_package_temp and all int340x drivers sets RW trip
temperature as 0. This results in all these trips marked as invalid by
the thermal core.

To fix this initialize RW trips to THERMAL_TEMP_INVALID instead of 0.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20210430122343.1789899-1-srinivas.pandruvada@linux.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal/drivers/intel: Introduce tcc cooling driver</title>
<updated>2021-04-20T07:18:57+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2021-04-12T12:59:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2eb87d75f980bcc7c2bd370661f8fcc4ec273ea5'/>
<id>2eb87d75f980bcc7c2bd370661f8fcc4ec273ea5</id>
<content type='text'>
On Intel processors, the core frequency can be reduced below OS request,
when the current temperature reaches the TCC (Thermal Control Circuit)
activation temperature.

The default TCC activation temperature is specified by
MSR_IA32_TEMPERATURE_TARGET. However, it can be adjusted by specifying an
offset in degrees C, using the TCC Offset bits in the same MSR register.

This patch introduces a cooling devices driver that utilizes the TCC
Offset feature. The bigger the current cooling state is, the lower the
effective TCC activation temperature is, so that the processors can be
throttled earlier before system critical overheats.

Note that, on different platforms, the behavior might be different on
how fast the setting takes effect, and how much the CPU frequency is
reduced.

This patch has been tested on a KabyLake mobile platform from me, and also
on a CometLake platform from Doug.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Tested by: Doug Smythies &lt;dsmythies@telus.net&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20210412125901.12549-1-rui.zhang@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On Intel processors, the core frequency can be reduced below OS request,
when the current temperature reaches the TCC (Thermal Control Circuit)
activation temperature.

The default TCC activation temperature is specified by
MSR_IA32_TEMPERATURE_TARGET. However, it can be adjusted by specifying an
offset in degrees C, using the TCC Offset bits in the same MSR register.

This patch introduces a cooling devices driver that utilizes the TCC
Offset feature. The bigger the current cooling state is, the lower the
effective TCC activation temperature is, so that the processors can be
throttled earlier before system critical overheats.

Note that, on different platforms, the behavior might be different on
how fast the setting takes effect, and how much the CPU frequency is
reduced.

This patch has been tested on a KabyLake mobile platform from me, and also
on a CometLake platform from Doug.

Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Tested by: Doug Smythies &lt;dsmythies@telus.net&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20210412125901.12549-1-rui.zhang@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'thermal-v5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux</title>
<updated>2021-02-22T17:39:11+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-02-22T17:39:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5d26c176d58bc3f9380b18ba2f51a1d863c6a5a0'/>
<id>5d26c176d58bc3f9380b18ba2f51a1d863c6a5a0</id>
<content type='text'>
Pull thermal updates from Daniel Lezcano:

 - Use the newly introduced 'hot' and 'critical' ops for the acpi
   thermal driver (Daniel Lezcano)

 - Remove the notify ops as it is no longer used (Daniel Lezcano)

 - Remove the 'forced passive' option and the unused bind/unbind
   functions (Daniel Lezcano)

 - Remove the THERMAL_TRIPS_NONE and the code cleanup around this macro
   (Daniel Lezcano)

 - Rework the delays to make them pre-computed instead of computing them
   again and again at each polling interval (Daniel Lezcano)

 - Remove the pointless 'thermal_zone_device_reset' function (Daniel
   Lezcano)

 - Use the critical and hot ops to prevent an unexpected system shutdown
   on int340x (Kai-Heng Feng)

 - Make the cooling device state private to the thermal subsystem
   (Daniel Lezcano)

 - Prevent to use not-power-aware actor devices with the power allocator
   governor (Lukasz Luba)

 - Remove 'zx' and 'tango' support along with the corresponding
   platforms (Arnd Bergman)

 - Fix several issues on the Omap thermal driver (Tony Lindgren)

 - Add support for adc-tm5 PMIC thermal monitor for Qcom platforms
   (Dmitry Baryshkov)

 - Fix an initialization loop in the adc-tm5 (Colin Ian King)

 - Fix a return error check in the cpufreq cooling device (Viresh Kumar)

* tag 'thermal-v5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (26 commits)
  thermal: cpufreq_cooling: freq_qos_update_request() returns &lt; 0 on error
  thermal: qcom: Fix comparison with uninitialized variable channels_available
  thermal: qcom: add support for adc-tm5 PMIC thermal monitor
  dt-bindings: thermal: qcom: add adc-thermal monitor bindings
  thermal: ti-soc-thermal: Use non-inverted define for omap4
  thermal: ti-soc-thermal: Simplify polling with iopoll
  thermal: ti-soc-thermal: Fix stuck sensor with continuous mode for 4430
  thermal: ti-soc-thermal: Skip pointless register access for dra7
  thermal/drivers/zx: Remove zx driver
  thermal/drivers/tango: Remove tango driver
  thermal: power allocator: fail binding for non-power actor devices
  thermal/core: Make cooling device state change private
  thermal: intel: pch: Fix unexpected shutdown at critical temperature
  thermal: int340x: Fix unexpected shutdown at critical temperature
  thermal/core: Remove pointless thermal_zone_device_reset() function
  thermal/core: Remove ms based delay fields
  thermal/core: Use precomputed jiffies for the polling
  thermal/core: Precompute the delays from msecs to jiffies
  thermal/core: Remove unused macro THERMAL_TRIPS_NONE
  thermal/core: Remove THERMAL_TRIPS_NONE test
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull thermal updates from Daniel Lezcano:

 - Use the newly introduced 'hot' and 'critical' ops for the acpi
   thermal driver (Daniel Lezcano)

 - Remove the notify ops as it is no longer used (Daniel Lezcano)

 - Remove the 'forced passive' option and the unused bind/unbind
   functions (Daniel Lezcano)

 - Remove the THERMAL_TRIPS_NONE and the code cleanup around this macro
   (Daniel Lezcano)

 - Rework the delays to make them pre-computed instead of computing them
   again and again at each polling interval (Daniel Lezcano)

 - Remove the pointless 'thermal_zone_device_reset' function (Daniel
   Lezcano)

 - Use the critical and hot ops to prevent an unexpected system shutdown
   on int340x (Kai-Heng Feng)

 - Make the cooling device state private to the thermal subsystem
   (Daniel Lezcano)

 - Prevent to use not-power-aware actor devices with the power allocator
   governor (Lukasz Luba)

 - Remove 'zx' and 'tango' support along with the corresponding
   platforms (Arnd Bergman)

 - Fix several issues on the Omap thermal driver (Tony Lindgren)

 - Add support for adc-tm5 PMIC thermal monitor for Qcom platforms
   (Dmitry Baryshkov)

 - Fix an initialization loop in the adc-tm5 (Colin Ian King)

 - Fix a return error check in the cpufreq cooling device (Viresh Kumar)

* tag 'thermal-v5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (26 commits)
  thermal: cpufreq_cooling: freq_qos_update_request() returns &lt; 0 on error
  thermal: qcom: Fix comparison with uninitialized variable channels_available
  thermal: qcom: add support for adc-tm5 PMIC thermal monitor
  dt-bindings: thermal: qcom: add adc-thermal monitor bindings
  thermal: ti-soc-thermal: Use non-inverted define for omap4
  thermal: ti-soc-thermal: Simplify polling with iopoll
  thermal: ti-soc-thermal: Fix stuck sensor with continuous mode for 4430
  thermal: ti-soc-thermal: Skip pointless register access for dra7
  thermal/drivers/zx: Remove zx driver
  thermal/drivers/tango: Remove tango driver
  thermal: power allocator: fail binding for non-power actor devices
  thermal/core: Make cooling device state change private
  thermal: intel: pch: Fix unexpected shutdown at critical temperature
  thermal: int340x: Fix unexpected shutdown at critical temperature
  thermal/core: Remove pointless thermal_zone_device_reset() function
  thermal/core: Remove ms based delay fields
  thermal/core: Use precomputed jiffies for the polling
  thermal/core: Precompute the delays from msecs to jiffies
  thermal/core: Remove unused macro THERMAL_TRIPS_NONE
  thermal/core: Remove THERMAL_TRIPS_NONE test
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: Move therm_throt there from x86/mce</title>
<updated>2021-02-08T10:43:20+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2021-01-07T12:29:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9223d0dccb8f8523754122f68316dd1a4f39f7f8'/>
<id>9223d0dccb8f8523754122f68316dd1a4f39f7f8</id>
<content type='text'>
This functionality has nothing to do with MCE, move it to the thermal
framework and untangle it from MCE.

Requested-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Tested-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Link: https://lkml.kernel.org/r/20210202121003.GD18075@zn.tnic
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This functionality has nothing to do with MCE, move it to the thermal
framework and untangle it from MCE.

Requested-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Tested-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Link: https://lkml.kernel.org/r/20210202121003.GD18075@zn.tnic
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: intel: pch: Fix unexpected shutdown at critical temperature</title>
<updated>2021-01-19T21:30:25+00:00</updated>
<author>
<name>Kai-Heng Feng</name>
<email>kai.heng.feng@canonical.com</email>
</author>
<published>2020-12-21T17:23:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=03671968d0bf2db598f7e3aa98f190b76c1bb4ff'/>
<id>03671968d0bf2db598f7e3aa98f190b76c1bb4ff</id>
<content type='text'>
Like previous patch, the intel_pch_thermal device is not in ACPI
ThermalZone namespace, so a critical trip doesn't mean shutdown.

Override the default .critical callback to prevent surprising thermal
shutdoown.

Signed-off-by: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201221172345.36976-2-kai.heng.feng@canonical.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Like previous patch, the intel_pch_thermal device is not in ACPI
ThermalZone namespace, so a critical trip doesn't mean shutdown.

Override the default .critical callback to prevent surprising thermal
shutdoown.

Signed-off-by: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201221172345.36976-2-kai.heng.feng@canonical.com
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: int340x: Fix unexpected shutdown at critical temperature</title>
<updated>2021-01-19T21:30:25+00:00</updated>
<author>
<name>Kai-Heng Feng</name>
<email>kai.heng.feng@canonical.com</email>
</author>
<published>2020-12-21T17:23:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=dd47366aaa9b93ac3d97cb4ee7641d38a28a771e'/>
<id>dd47366aaa9b93ac3d97cb4ee7641d38a28a771e</id>
<content type='text'>
We are seeing thermal shutdown on Intel based mobile workstations, the
shutdown happens during the first trip handle in
thermal_zone_device_register():
kernel: thermal thermal_zone15: critical temperature reached (101 C), shutting down

However, we shouldn't do a thermal shutdown here, since
1) We may want to use a dedicated daemon, Intel's thermald in this case,
to handle thermal shutdown.

2) For ACPI based system, _CRT doesn't mean shutdown unless it's inside
ThermalZone namespace. ACPI Spec, 11.4.4 _CRT (Critical Temperature):
"... If this object it present under a device, the device’s driver
evaluates this object to determine the device’s critical cooling
temperature trip point. This value may then be used by the device’s
driver to program an internal device temperature sensor trip point."

So a "critical trip" here merely means we should take a more aggressive
cooling method.

As int340x device isn't present under ACPI ThermalZone, override the
default .critical callback to prevent surprising thermal shutdown.

Signed-off-by: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201221172345.36976-1-kai.heng.feng@canonical.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We are seeing thermal shutdown on Intel based mobile workstations, the
shutdown happens during the first trip handle in
thermal_zone_device_register():
kernel: thermal thermal_zone15: critical temperature reached (101 C), shutting down

However, we shouldn't do a thermal shutdown here, since
1) We may want to use a dedicated daemon, Intel's thermald in this case,
to handle thermal shutdown.

2) For ACPI based system, _CRT doesn't mean shutdown unless it's inside
ThermalZone namespace. ACPI Spec, 11.4.4 _CRT (Critical Temperature):
"... If this object it present under a device, the device’s driver
evaluates this object to determine the device’s critical cooling
temperature trip point. This value may then be used by the device’s
driver to program an internal device temperature sensor trip point."

So a "critical trip" here merely means we should take a more aggressive
cooling method.

As int340x device isn't present under ACPI ThermalZone, override the
default .critical callback to prevent surprising thermal shutdown.

Signed-off-by: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201221172345.36976-1-kai.heng.feng@canonical.com
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: int340x: Support Alder Lake</title>
<updated>2020-12-17T14:29:30+00:00</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-11-17T19:48:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=67698880ac9d56367ebf22f8336ccab6234f9feb'/>
<id>67698880ac9d56367ebf22f8336ccab6234f9feb</id>
<content type='text'>
Add ACPI IDs for thermal drivers for Alder Lake support.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201117194802.503337-1-srinivas.pandruvada@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add ACPI IDs for thermal drivers for Alder Lake support.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201117194802.503337-1-srinivas.pandruvada@linux.intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: int340x: processor_thermal: Correct workload type name</title>
<updated>2020-12-10T21:48:52+00:00</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2020-12-10T21:33:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ac35e6cb9ea51dddceae7e20a736e248730908ac'/>
<id>ac35e6cb9ea51dddceae7e20a736e248730908ac</id>
<content type='text'>
Change "Burusty" to "bursty".

Reported-by: Michael Larabel &lt;Michael@phoronix.com&gt;
Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201210213324.2113041-1-srinivas.pandruvada@linux.intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change "Burusty" to "bursty".

Reported-by: Michael Larabel &lt;Michael@phoronix.com&gt;
Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20201210213324.2113041-1-srinivas.pandruvada@linux.intel.com
</pre>
</div>
</content>
</entry>
</feed>
