i.MX8MM has a thermal monitoring unit(TMU) inside, it ONLY has one sensor for CPU, add support for reading immediate temperature of this sensor. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1582947862-11073-2-git-send-email-Anson.Huang@nxp.com
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller inside, the system controller is in charge of controlling power, clock and thermal sensors etc.. This patch adds i.MX system controller thermal driver support, Linux kernel has to communicate with system controller via MU (message unit) IPC to get each thermal sensor's temperature, it supports multiple sensors which are passed from device tree, please see the binding doc for details. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1582330132-13461-3-git-send-email-Anson.Huang@nxp.com
This patch adds the support for Spreadtrum thermal sensor controller, which can support maximum 8 sensors. Signed-off-by: Freeman Liu <freeman.liu@unisoc.com> Co-developed-with: Baolin Wang <baolin.wang@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/ebeb2839cff4d4027b37e787427c5af0e11880c8.1582013101.git.baolin.wang7@gmail.com
This patch adds the support for allwinner thermal sensor, within allwinner SoC. It will register sensors for thermal framework and use device tree to bind cooling device. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191219172823.1652600-2-anarsoul@gmail.com
As we introduced the idle injection cooling device called cpuidle_cooling, let's be consistent and rename the cpu_cooling to cpufreq_cooling as this one mitigates with OPPs changes. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/20191219225317.17158-3-daniel.lezcano@linaro.org
The cpu idle cooling device offers a new method to cool down a CPU by injecting idle cycles at runtime. It has some similarities with the intel power clamp driver but it is actually designed to be more generic and relying on the idle injection powercap framework. The idle injection duration is fixed while the running duration is variable. That allows to have control on the device reactivity for the user experience. An idle state powering down the CPU or the cluster will allow to drop the static leakage, thus restoring the heat capacity of the SoC. It can be set with a trip point between the hot and the critical points, giving the opportunity to prevent a hard reset of the system when the cpufreq cooling fails to cool down the CPU. With more sophisticated boards having a per core sensor, the idle cooling device allows to cool down a single core without throttling the compute capacity of several cpus belonging to the same clock line, so it could be used in collaboration with the cpufreq cooling device. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20191219225317.17158-2-daniel.lezcano@linaro.org
The next changes will add a new way to cool down a CPU by injecting idle cycles. With the current configuration, a CPU cooling device is the cpufreq cooling device. As we want to add a new CPU cooling device, let's convert the CPU cooling to a choice giving a list of CPU cooling devices. At this point, there is obviously only one CPU cooling device. There is no functional changes. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20191204153930.9128-1-daniel.lezcano@linaro.org
Amlogic G12A and G12B SoCs integrate two thermal sensors with the same design. One is located close to the DDR controller and the other one is located close to the PLLs (between the CPU and GPU). The calibration data for each of the thermal sensors instance is stored in a different location within the AO region. Implement reading the temperature from each thermal sensor. The IP block has more functionality, which may be added to this driver in the future: - chip reset when the temperature exceeds a configurable threshold - up to four interrupts when the temperature has risen above a configurable threshold - up to four interrupts when the temperature has fallen below a configurable threshold Tested-by: Christian Hewitt <christianshewitt@gmail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191004090114.30694-3-glaroque@baylibre.com
This is a generic thermal driver for simple MMIO sensors, of which amazon,al-thermal is one. This device uses a single MMIO transaction to read the temperature and report it to the thermal subsystem. Signed-off-by: Talel Shenhar <talel@amazon.com> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This cleans up the directory a bit allowing just one place to look for thermal related drivers for QCOM platforms instead of being scattered in the root directory and the qcom/ subdirectory. Compile-tested with ARCH=arm64 defconfig and the driver explicitly enabled with menuconfig. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Zhang Rui <rui.zhang@intel.com>