linux-stable.git/drivers/spi, branch v5.8.2

spi: spidev: Align buffers for DMA

2020-08-19T06:27:06+00:00

commit aa9e862d7d5bcecd4dca9f39e8b684b93dd84ee7 upstream.

Simply copying all xfers from userspace into one bounce buffer causes
alignment problems if the SPI controller uses DMA.

Ensure that all transfer data blocks within the rx and tx bounce buffers
are aligned for DMA (according to ARCH_KMALLOC_MINALIGN).

Alignment may increase the usage of the bounce buffers. In some cases,
the buffers may need to be increased using the "bufsiz" module
parameter.

Signed-off-by: Christian Eggers 
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200728100832.24788-1-ceggers@arri.de
Signed-off-by: Mark Brown 
Signed-off-by: Greg Kroah-Hartman

spi: lantiq-ssc: Fix warning by using WQ_MEM_RECLAIM

2020-08-19T06:26:39+00:00

[ Upstream commit ba3548cf29616b58c93bbaffc3d636898d009858 ]

The lantiq-ssc driver uses internally an own workqueue to wait till the
data is not only written out of the FIFO but really written to the wire.
This workqueue is flushed while the SPI subsystem is working in some
other system workqueue.

The system workqueue is marked as WQ_MEM_RECLAIM, but the workqueue in
the lantiq-ssc driver does not use WQ_MEM_RECLAIM for now. Add this flag
too to prevent this warning.

This fixes the following warning:
[    2.975956] WARNING: CPU: 1 PID: 17 at kernel/workqueue.c:2614 check_flush_dependency+0x168/0x184
[    2.984752] workqueue: WQ_MEM_RECLAIM kblockd:blk_mq_run_work_fn is flushing !WQ_MEM_RECLAIM 1e100800.spi:0x0

Fixes: 891b7c5fbf61 ("mtd_blkdevs: convert to blk-mq")
Signed-off-by: Hauke Mehrtens 
Link: https://lore.kernel.org/r/20200717215648.20522-1-hauke@hauke-m.de
Signed-off-by: Mark Brown 
Signed-off-by: Sasha Levin

spi: rockchip: Fix error in SPI slave pio read

2020-08-19T06:26:11+00:00

[ Upstream commit 4294e4accf8d695ea5605f6b189008b692e3e82c ]

The RXFLR is possible larger than rx_left in Rockchip SPI, fix it.

Fixes: 01b59ce5dac8 ("spi: rockchip: use irq rather than polling")
Signed-off-by: Jon Lin 
Tested-by: Emil Renner Berthing 
Reviewed-by: Heiko Stuebner 
Reviewed-by: Emil Renner Berthing 
Link: https://lore.kernel.org/r/20200723004356.6390-3-jon.lin@rock-chips.com
Signed-off-by: Mark Brown 
Signed-off-by: Sasha Levin

spi: lantiq: fix: Rx overflow error in full duplex mode

2020-08-19T06:26:10+00:00

[ Upstream commit 661ccf2b3f1360be50242726f7c26ced6a9e7d52 ]

In full duplex mode, rx overflow error is observed. To overcome the error,
wait until the complete data got received and proceed further.

Fixes: 17f84b793c01 ("spi: lantiq-ssc: add support for Lantiq SSC SPI controller")
Signed-off-by: Dilip Kota 
Link: https://lore.kernel.org/r/efb650b0faa49a00788c4e0ca8ef7196bdba851d.1594957019.git.eswara.kota@linux.intel.com
Signed-off-by: Mark Brown 
Signed-off-by: Sasha Levin

spi: dw-dma: Fix Tx DMA channel working too fast

2020-08-19T06:26:10+00:00

[ Upstream commit affe93dd5b35bb0e7b0aa0505ae432dd0ac72c3f ]

It turns out having a Rx DMA channel serviced with higher priority than
a Tx DMA channel is not enough to provide a well balanced DMA-based SPI
transfer interface. There might still be moments when the Tx DMA channel
is occasionally handled faster than the Rx DMA channel. That in its turn
will eventually cause the SPI Rx FIFO overflow if SPI bus speed is high
enough to fill the SPI Rx FIFO in before it's cleared by the Rx DMA
channel. That's why having the DMA-based SPI Tx interface too optimized
is the errors prone, so the commit 0b2b66514fc9 ("spi: dw: Use DMA max
burst to set the request thresholds") though being perfectly normal from
the standard functionality point of view implicitly introduced the problem
described above. In order to fix that the Tx DMA activity is intentionally
slowed down by limiting the SPI Tx FIFO depth with a value twice bigger
than the Tx burst length calculated earlier by the
dw_spi_dma_maxburst_init() method.

Fixes: 0b2b66514fc9 ("spi: dw: Use DMA max burst to set the request thresholds")
Signed-off-by: Serge Semin 
Reviewed-by: Andy Shevchenko 
Cc: Andy Shevchenko 
Cc: Alexey Malahov 
Cc: Feng Tang 
Link: https://lore.kernel.org/r/20200721203951.2159-1-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown 
Signed-off-by: Sasha Levin

Merge tag 'spi-fix-v5.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into master

2020-07-17T17:24:09+00:00

Pull spi fixes from Mark Brown:
 "A couple of small driver specific fixes for fairly minor issues"

* tag 'spi-fix-v5.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate
  spi: mediatek: use correct SPI_CFG2_REG MACRO

spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate

2020-07-06T15:39:45+00:00

A SPI transfer defines the _maximum_ speed of the SPI transfer. However the
driver doesn't take into account that the clock divider is always rounded down
(due to integer arithmetics). This results in a too high clock rate for the SPI
transfer.

E.g.: with a mclk_rate of 24 MHz and a SPI transfer speed of 10 MHz, the
original code calculates a reg of "0", which results in a effective divider of
"2" and a 12 MHz clock for the SPI transfer.

This patch fixes the issue by using DIV_ROUND_UP() instead of a plain
integer division.

While there simplify the divider calculation for the CDR1 case, use
order_base_2() instead of two ilog2() calculations.

Fixes: 3558fe900e8a ("spi: sunxi: Add Allwinner A31 SPI controller driver")
Signed-off-by: Marc Kleine-Budde 
Acked-by: Maxime Ripard 
Link: https://lore.kernel.org/r/20200706143443.9855-2-mkl@pengutronix.de
Signed-off-by: Mark Brown

spi: mediatek: use correct SPI_CFG2_REG MACRO

2020-07-01T13:41:40+00:00

this patch use correct SPI_CFG2_REG offset.

Signed-off-by: leilk.liu 
Link: https://lore.kernel.org/r/20200701090020.7935-1-leilk.liu@mediatek.com
Signed-off-by: Mark Brown

Merge tag 'spi-fix-v5.8-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2020-06-29T17:10:16+00:00

Pull spi fixes from Mark Brown:
 "A batch of fixes for the Freescale DSPI driver fixing some serious
  issues with removal of active devices and one resume case, plus a few
  new PCI IDs for Intel platforms"

* tag 'spi-fix-v5.8-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: pxa2xx: Add support for Intel Tiger Lake PCH-H
  spi: spi-fsl-dspi: Initialize completion before possible interrupt
  spi: spi-fsl-dspi: Fix external abort on interrupt in resume or exit paths
  spi: spi-fsl-dspi: Fix lockup if device is shutdown during SPI transfer
  spi: spi-fsl-dspi: Fix lockup if device is removed during SPI transfer

spi: pxa2xx: Add support for Intel Tiger Lake PCH-H

2020-06-25T14:50:50+00:00

Add Intel Tiger Lake PCH-H PCI IDs.

Signed-off-by: Jarkko Nikula 
Link: https://lore.kernel.org/r/20200625140041.745804-1-jarkko.nikula@linux.intel.com
Signed-off-by: Mark Brown