linux-stable.git/drivers/spi/Makefile, branch linux-3.16.y Linux kernel stable tree Merge remote-tracking branches 'spi/topic/adi', 'spi/topic/atmel' and 'spi/topic/cadence' into spi-next 2014-06-02T16:08:35+00:00 Mark Brown broonie@linaro.org 2014-06-02T16:08:35+00:00 446fe5e2d5616eb52c928e58f16558ab7c0d2414 






spi: Add driver for Cadence SPI controller
2014-04-14T20:00:28+00:00

Harini Katakam
harinik@xilinx.com

2014-04-14T09:06:53+00:00

c474b38665463d9017cd60cd3a8f8226cf8d562f

Add driver for Cadence SPI controller. This is used in Xilinx Zynq.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>





Add driver for Cadence SPI controller. This is used in Xilinx Zynq.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>







spi: convert spi-bfin-v3.c to a multiplatform driver
2014-04-14T16:45:25+00:00

Scott Jiang
scott.jiang.linux@gmail.com

2014-04-04T08:27:17+00:00

766e3721990d2c78e0d614b57753f105adbaa8c5

Spi v3 controller is not only used on Blackfin. So rename it
and use ioread/iowrite api to make it work on other platform.

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>





Spi v3 controller is not only used on Blackfin. So rename it
and use ioread/iowrite api to make it work on other platform.

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>







Merge remote-tracking branches 'spi/topic/xilinx' and 'spi/topic/xtfpga' into spi-next
2014-03-30T00:51:48+00:00

Mark Brown
broonie@linaro.org

2014-03-30T00:51:48+00:00

45b15d98a96ffdb3c608bdad952f51930c151420












Merge remote-tracking branches 'spi/topic/sunxi', 'spi/topic/tegra114', 'spi/topic/ti-qspi', 'spi/topic/ti-ssp', 'spi/topic/topcliff-pch', 'spi/topic/txx9', 'spi/topic/xcomm' and 'spi/topic/xfer' into spi-next
2014-03-30T00:51:41+00:00

Mark Brown
broonie@linaro.org

2014-03-30T00:51:41+00:00

b1ad487c42e982bb30f10bfb267f71c5daa3a0d5












spi: remove obsolete spi-ti-ssp driver
2014-03-18T17:27:24+00:00

Arnd Bergmann
arnd@arndb.de

2014-03-18T14:55:59+00:00

7661ba5a84524587370c917ec1111c600ea57de8

The tnetv107x platform is getting removed, so this driver
will not be needed any more.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>





The tnetv107x platform is getting removed, so this driver
will not be needed any more.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>







spi: add xtfpga SPI controller driver
2014-03-13T09:12:44+00:00

Max Filippov
jcmvbkbc@gmail.com

2014-03-12T17:55:24+00:00

6840cc29f2bcc9a06a7245d17e0e2f38fbc20df0

This simple SPI master controller is built into xtfpga bitstreams. It
always transfers 16 bit words in SPI mode 0, automatically asserting CS
on transfer start and deasserting on end.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>





This simple SPI master controller is built into xtfpga bitstreams. It
always transfers 16 bit words in SPI mode 0, automatically asserting CS
on transfer start and deasserting on end.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>







spi: sunxi: Add Allwinner A10 SPI controller driver
2014-02-23T02:14:46+00:00

Maxime Ripard
maxime.ripard@free-electrons.com

2014-02-22T21:35:53+00:00

b5f6517948cce50bde9aa441b4f00b63518f6421

The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI
controller.

Unfortunately, this SPI controller, even though quite similar, is significantly
different from the recently supported A31 SPI controller (different registers
offset, split/merged registers, etc.). Supporting both controllers in a single
driver would be unreasonable, hence the addition of a new driver.

Like its more recent counterpart, it supports DMA, but the driver only does PIO
until we have a dmaengine driver for this platform.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>





The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI
controller.

Unfortunately, this SPI controller, even though quite similar, is significantly
different from the recently supported A31 SPI controller (different registers
offset, split/merged registers, etc.). Supporting both controllers in a single
driver would be unreasonable, hence the addition of a new driver.

Like its more recent counterpart, it supports DMA, but the driver only does PIO
until we have a dmaengine driver for this platform.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>







spi: Add Qualcomm QUP SPI controller support
2014-02-19T15:29:06+00:00

Ivan T. Ivanov
iivanov@mm-sol.com

2014-02-13T16:21:38+00:00

64ff247a978facc437d40f0c9b754675846a98f0

Qualcomm Universal Peripheral (QUP) core is an AHB slave that
provides a common data path (an output FIFO and an input FIFO)
for serial peripheral interface (SPI) mini-core. SPI in master
mode supports up to 50MHz, up to four chip selects, programmable
data path from 4 bits to 32 bits and numerous protocol variants.

Cc: Alok Chauhan <alokc@codeaurora.org>
Cc: Gilad Avidov <gavidov@codeaurora.org>
Cc: Kiran Gunda <kgunda@codeaurora.org>
Cc: Sagar Dharia <sdharia@codeaurora.org>
Cc: dsneddon@codeaurora.org
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>





Qualcomm Universal Peripheral (QUP) core is an AHB slave that
provides a common data path (an output FIFO and an input FIFO)
for serial peripheral interface (SPI) mini-core. SPI in master
mode supports up to 50MHz, up to four chip selects, programmable
data path from 4 bits to 32 bits and numerous protocol variants.

Cc: Alok Chauhan <alokc@codeaurora.org>
Cc: Gilad Avidov <gavidov@codeaurora.org>
Cc: Kiran Gunda <kgunda@codeaurora.org>
Cc: Sagar Dharia <sdharia@codeaurora.org>
Cc: dsneddon@codeaurora.org
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Mark Brown <broonie@linaro.org>







spi: sunxi: Add Allwinner A31 SPI controller driver
2014-02-05T14:58:36+00:00

Maxime Ripard
maxime.ripard@free-electrons.com

2014-02-05T13:05:05+00:00

3558fe900e8af6c3bfadeff24a12ffb19ac9b108

The Allwinner A31 has a new SPI controller IP compared to the older Allwinner
SoCs.

It supports DMA, but the driver only does PIO for now, and DMA will be
supported eventually.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>





The Allwinner A31 has a new SPI controller IP compared to the older Allwinner
SoCs.

It supports DMA, but the driver only does PIO for now, and DMA will be
supported eventually.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@linaro.org>