linux-stable.git/drivers/soc/tegra, branch linux-5.6.y

soc/tegra: fuse: Fix build with Tegra194 configuration

2020-02-11T23:00:15+00:00

If only Tegra194 support is enabled, the tegra30_fuse_read() and
tegra30_fuse_init() function are not declared and cause a build failure.
Add Tegra194 to the preprocessor guard to make sure these functions are
available for Tegra194-only builds as well.

Link: https://lore.kernel.org/r/20200203143114.3967295-1-thierry.reding@gmail.com
Reported-by: kbuild test robot 
Signed-off-by: Thierry Reding 
Signed-off-by: Olof Johansson

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2020-02-08T22:04:19+00:00

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - Nvidia: Fuse support for Tegra194, continued memory controller
     pieces for Tegra30

   - NXP/FSL: Refactorings of QuickEngine drivers to support
     ARM/ARM64/PPC

   - NXP/FSL: i.MX8MP SoC driver pieces

   - TI Keystone: ring accelerator driver

   - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

   - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
     communication for power management

   - Overall support patch set for cpuidle on more complex hierarchies
     (PSCI-based)

  and misc cleanups, refactorings of Marvell, TI, other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
  drivers: soc: xilinx: Use mailbox IPI callback
  dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
  drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
  MAINTAINERS: Add brcmstb PCIe controller entry
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  soc/tegra: regulators: Do nothing if voltage is unchanged
  memory: tegra: Correct reset value of xusb_hostr
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  bus: tegra-aconnect: Remove PM_CLK dependency
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  ...

soc/tegra: fuse: Unmap registers once they are not needed anymore

2020-01-10T14:59:43+00:00

Both Chip ID and strapping registers are now read out during of APB MISC
initialization, the registers' mapping isn't needed anymore once registers
are read. Hence let's unmap registers once they are not needed anymore,
for consistency.

Suggested-by: Michał Mirosław 
Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

soc/tegra: fuse: Correct straps' address for older Tegra124 device trees

2020-01-10T14:59:01+00:00

Trying to read out Chip ID before APBMISC registers are mapped won't
succeed, in a result Tegra124 gets a wrong address for the HW straps
register if machine uses an old outdated device tree.

Fixes: 297c4f3dcbff ("soc/tegra: fuse: Restrict legacy code to 32-bit ARM")
Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

soc/tegra: fuse: Warn if straps are not ready

2020-01-10T14:58:48+00:00

Now both Chip ID and HW straps are becoming available at the same time,
thus we could simply check the availability of the ID in order to check
the availability of the straps. We couldn't check straps for 0x0 because
it could be a correct value.

This change didn't uncover any problems, but anyways it is nicer to have
straps verified for consistency with the Chip ID verification.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

soc/tegra: fuse: Cache values of straps and Chip ID registers

2020-01-10T14:58:32+00:00

There is no need to re-read Chip ID and HW straps out from hardware each
time, it is a bit nicer to cache the values in memory.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

soc/tegra: regulators: Do nothing if voltage is unchanged

2020-01-10T14:42:58+00:00

There is no need to re-apply the same voltage. This change is just a minor
cleanup.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

soc/tegra: fuse: Add APB DMA dependency for Tegra20

2020-01-10T14:30:11+00:00

Tegra20 FUSE driver depends on DMA channel presence, otherwise it fails to
probe.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

soc/tegra: fuse: Add Tegra194 support

2020-01-09T18:27:27+00:00

This commit adds Tegra194 fuse/apbmisc support.

Signed-off-by: JC Kuo 
Signed-off-by: Thierry Reding

remove ioremap_nocache and devm_ioremap_nocache

2020-01-06T08:45:59+00:00

ioremap has provided non-cached semantics by default since the Linux 2.6
days, so remove the additional ioremap_nocache interface.

Signed-off-by: Christoph Hellwig 
Acked-by: Arnd Bergmann