<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/soc/tegra, branch linux-5.12.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>soc/tegra: regulators: Fix locking up when voltage-spread is out of range</title>
<updated>2021-05-14T08:52:04+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-03-02T13:18:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ff39adf5d31c72025bba799aec69c5c86d81d549'/>
<id>ff39adf5d31c72025bba799aec69c5c86d81d549</id>
<content type='text'>
commit ef85bb582c41524e9e68dfdbde48e519dac4ab3d upstream.

Fix voltage coupler lockup which happens when voltage-spread is out
of range due to a bug in the code. The max-spread requirement shall be
accounted when CPU regulator doesn't have consumers. This problem is
observed on Tegra30 Ouya game console once system-wide DVFS is enabled
in a device-tree.

Fixes: 783807436f36 ("soc/tegra: regulators: Add regulators coupler for Tegra30")
Cc: stable@vger.kernel.org
Reported-by: Peter Geis &lt;pgwipeout@gmail.com&gt;
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt; # Ouya T30
Tested-by: Matt Merhar &lt;mattmerhar@protonmail.com&gt; # Ouya T30
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit ef85bb582c41524e9e68dfdbde48e519dac4ab3d upstream.

Fix voltage coupler lockup which happens when voltage-spread is out
of range due to a bug in the code. The max-spread requirement shall be
accounted when CPU regulator doesn't have consumers. This problem is
observed on Tegra30 Ouya game console once system-wide DVFS is enabled
in a device-tree.

Fixes: 783807436f36 ("soc/tegra: regulators: Add regulators coupler for Tegra30")
Cc: stable@vger.kernel.org
Reported-by: Peter Geis &lt;pgwipeout@gmail.com&gt;
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt; # Ouya T30
Tested-by: Matt Merhar &lt;mattmerhar@protonmail.com&gt; # Ouya T30
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Fix completion of power-gate toggling</title>
<updated>2021-05-12T06:39:36+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-03-02T12:24:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2ed7e900e70bee8e80fbbe0acabe5bdbe72e81d6'/>
<id>2ed7e900e70bee8e80fbbe0acabe5bdbe72e81d6</id>
<content type='text'>
[ Upstream commit c45e66a6b9f40f2e95bc6d97fbf3daa1ebe88c6b ]

The SW-initiated power gate toggling is dropped by PMC if there is
contention with a HW-initiated toggling, i.e. when one of CPU cores is
gated by cpuidle driver. Software should retry the toggling after 10
microseconds on Tegra20/30 SoCs, hence add the retrying. On Tegra114+ the
toggling method was changed in hardware, the TOGGLE_START bit indicates
whether PMC is busy or could accept the command to toggle, hence handle
that bit properly.

The problem pops up after enabling dynamic power gating of 3D hardware,
where 3D power domain fails to turn on/off "randomly".

The programming sequence and quirks are documented in TRMs, but PMC
driver obliviously re-used the Tegra20 logic for Tegra30+, which strikes
back now. The 10 microseconds and other timeouts aren't documented in TRM,
they are taken from downstream kernel.

Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=311dd1c318b70e93bcefec15456a10ff2b9eb0ff
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-3.10.git;a=commit;h=7f36693c47cb23730a6b2822e0975be65fb0c51d
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt; # Ouya T30
Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt; # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar &lt;mattmerhar@protonmail.com&gt; # Ouya T30
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit c45e66a6b9f40f2e95bc6d97fbf3daa1ebe88c6b ]

The SW-initiated power gate toggling is dropped by PMC if there is
contention with a HW-initiated toggling, i.e. when one of CPU cores is
gated by cpuidle driver. Software should retry the toggling after 10
microseconds on Tegra20/30 SoCs, hence add the retrying. On Tegra114+ the
toggling method was changed in hardware, the TOGGLE_START bit indicates
whether PMC is busy or could accept the command to toggle, hence handle
that bit properly.

The problem pops up after enabling dynamic power gating of 3D hardware,
where 3D power domain fails to turn on/off "randomly".

The programming sequence and quirks are documented in TRMs, but PMC
driver obliviously re-used the Tegra20 logic for Tegra30+, which strikes
back now. The 10 microseconds and other timeouts aren't documented in TRM,
they are taken from downstream kernel.

Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=311dd1c318b70e93bcefec15456a10ff2b9eb0ff
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-3.10.git;a=commit;h=7f36693c47cb23730a6b2822e0975be65fb0c51d
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt; # Ouya T30
Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt; # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar &lt;mattmerhar@protonmail.com&gt; # Ouya T30
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'tegra-for-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers</title>
<updated>2020-11-27T16:56:10+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2020-11-27T16:56:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3afd2823c1195b77047cad33b208f5b5032f53b3'/>
<id>3afd2823c1195b77047cad33b208f5b5032f53b3</id>
<content type='text'>
soc/tegra: Changes for v5.11-rc1

This contains a couple of warning fixes and a fix for a mostly harmless
bug in the process ID retrieval code.

* tag 'tegra-for-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix index bug in get_process_id
  soc: tegra: fuse: speedo-tegra210: Remove a group of set but unused variables
  soc: tegra: fuse: speedo-tegra124: Remove some set but unused variables

Link: https://lore.kernel.org/r/20201127144329.124891-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
soc/tegra: Changes for v5.11-rc1

This contains a couple of warning fixes and a fix for a mostly harmless
bug in the process ID retrieval code.

* tag 'tegra-for-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix index bug in get_process_id
  soc: tegra: fuse: speedo-tegra210: Remove a group of set but unused variables
  soc: tegra: fuse: speedo-tegra124: Remove some set but unused variables

Link: https://lore.kernel.org/r/20201127144329.124891-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Fix index bug in get_process_id</title>
<updated>2020-11-19T10:43:49+00:00</updated>
<author>
<name>Nicolin Chen</name>
<email>nicoleotsuka@gmail.com</email>
</author>
<published>2020-11-19T04:44:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b9ce9b0f83b536a4ac7de7567a265d28d13e5bea'/>
<id>b9ce9b0f83b536a4ac7de7567a265d28d13e5bea</id>
<content type='text'>
This patch simply fixes a bug of referencing speedos[num] in every
for-loop iteration in get_process_id function.

Fixes: 0dc5a0d83675 ("soc/tegra: fuse: Add Tegra210 support")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Nicolin Chen &lt;nicoleotsuka@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch simply fixes a bug of referencing speedos[num] in every
for-loop iteration in get_process_id function.

Fixes: 0dc5a0d83675 ("soc/tegra: fuse: Add Tegra210 support")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Nicolin Chen &lt;nicoleotsuka@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: tegra: fuse: speedo-tegra210: Remove a group of set but unused variables</title>
<updated>2020-11-10T19:40:53+00:00</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2020-11-03T15:28:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6c37cb9fa67650c51b3a70c53202be31730d7e29'/>
<id>6c37cb9fa67650c51b3a70c53202be31730d7e29</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 drivers/soc/tegra/fuse/speedo-tegra210.c: In function ‘tegra210_init_speedo_data’:
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:56: warning: variable ‘soc_iddq’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:46: warning: variable ‘gpu_iddq’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:36: warning: variable ‘cpu_iddq’ set but not used [-Wunused-but-set-variable]

Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Jonathan Hunter &lt;jonathanh@nvidia.com&gt;
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
[treding@nvidia.com: remove unnecessary reads altogether]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixes the following W=1 kernel build warning(s):

 drivers/soc/tegra/fuse/speedo-tegra210.c: In function ‘tegra210_init_speedo_data’:
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:56: warning: variable ‘soc_iddq’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:46: warning: variable ‘gpu_iddq’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra210.c:105:36: warning: variable ‘cpu_iddq’ set but not used [-Wunused-but-set-variable]

Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Jonathan Hunter &lt;jonathanh@nvidia.com&gt;
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
[treding@nvidia.com: remove unnecessary reads altogether]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: tegra: fuse: speedo-tegra124: Remove some set but unused variables</title>
<updated>2020-11-10T19:40:49+00:00</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2020-11-03T15:28:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ce034072f9a125b913d4869d614e414784334b8a'/>
<id>ce034072f9a125b913d4869d614e414784334b8a</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 drivers/soc/tegra/fuse/speedo-tegra124.c: In function ‘tegra124_init_speedo_data’:
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:38: warning: variable ‘soc_iddq_value’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:22: warning: variable ‘gpu_iddq_value’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:6: warning: variable ‘cpu_iddq_value’ set but not used [-Wunused-but-set-variable]

Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Jonathan Hunter &lt;jonathanh@nvidia.com&gt;
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
[treding@nvidia.com: remove unnecessary reads altogether]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixes the following W=1 kernel build warning(s):

 drivers/soc/tegra/fuse/speedo-tegra124.c: In function ‘tegra124_init_speedo_data’:
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:38: warning: variable ‘soc_iddq_value’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:22: warning: variable ‘gpu_iddq_value’ set but not used [-Wunused-but-set-variable]
 drivers/soc/tegra/fuse/speedo-tegra124.c:105:6: warning: variable ‘cpu_iddq_value’ set but not used [-Wunused-but-set-variable]

Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Jonathan Hunter &lt;jonathanh@nvidia.com&gt;
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
[treding@nvidia.com: remove unnecessary reads altogether]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Export tegra_read_ram_code()</title>
<updated>2020-11-06T18:24:24+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2020-11-04T16:48:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fc4fbf88ecbee88381899b4a7f97c9b52570e91a'/>
<id>fc4fbf88ecbee88381899b4a7f97c9b52570e91a</id>
<content type='text'>
The tegra_read_ram_code() is used by EMC drivers and we're going to make
these driver modular, hence this function needs to be exported.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20201104164923.21238-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The tegra_read_ram_code() is used by EMC drivers and we're going to make
these driver modular, hence this function needs to be exported.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20201104164923.21238-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-10-24T17:44:18+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-10-24T17:44:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e533cda12d8f0e7936354bafdc85c81741f805d2'/>
<id>e533cda12d8f0e7936354bafdc85c81741f805d2</id>
<content type='text'>
Pull ARM Devicetree updates from Olof Johansson:
 "As usual, most of the changes are to devicetrees.

  Besides smaller fixes, some refactorings and cleanups, some of the new
  platforms and chips (or significant features) supported are below:

  Broadcom boards:
   - Cisco Meraki MR32 (BCM53016-based)
   - BCM2711 (RPi4) display pipeline support

  Actions Semi boards:
   - Caninos Loucos Labrador SBC (S500-based)
   - RoseapplePi SBC (S500-based)

  Allwinner SoCs/boards:
   - A100 SoC with Perf1 board
   - Mali, DMA, Cetrus and IR support for R40 SoC

  Amlogic boards:
   - Libretch S905x CC V2 board
   - Hardkernel ODROID-N2+ board

  Aspeed boards/platforms:
   - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
   - Facebook Wedge400 (AST2500-based, ToR switch)

  Hisilicon SoC:
   - SD5203 SoC

  Nvidia boards:
   - Tegra234 VDK, for pre-silicon Orin SoC

  NXP i.MX boards:
   - Librem 5 phone
   - i.MX8MM DDR4 EVK
   - Variscite VAR-SOM-MX8MN SoM
   - Symphony board
   - Tolino Shine 2 HD
   - TQMa6 SoM
   - Y Soft IOTA Orion

  Rockchip boards:
   - NanoPi R2S board
   - A95X-Z2 board
   - more Rock-Pi4 variants

  STM32 boards:
   - Odyssey SOM board (STM32MP157CAC-based)
   - DH DRC02 board

  Toshiba SoCs/boards:
   - Visconti SoC and TPMV7708 board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
  ARM: dts: nspire: Fix SP804 users
  arm64: dts: lg: Fix SP804 users
  arm64: dts: lg: Fix SP805 clocks
  ARM: mstar: Fix up the fallout from moving the dts/dtsi files
  ARM: mstar: Add mstar prefix to all of the dtsi/dts files
  ARM: mstar: Add interrupt to pm_uart
  ARM: mstar: Add interrupt controller to base dtsi
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
  arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
  arm64: dts: ti: k3-j7200-main: Add USB controller
  arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
  arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
  dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
  ARM: dts: hisilicon: add SD5203 dts
  ARM: dts: hisilicon: fix the system controller compatible nodes
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM Devicetree updates from Olof Johansson:
 "As usual, most of the changes are to devicetrees.

  Besides smaller fixes, some refactorings and cleanups, some of the new
  platforms and chips (or significant features) supported are below:

  Broadcom boards:
   - Cisco Meraki MR32 (BCM53016-based)
   - BCM2711 (RPi4) display pipeline support

  Actions Semi boards:
   - Caninos Loucos Labrador SBC (S500-based)
   - RoseapplePi SBC (S500-based)

  Allwinner SoCs/boards:
   - A100 SoC with Perf1 board
   - Mali, DMA, Cetrus and IR support for R40 SoC

  Amlogic boards:
   - Libretch S905x CC V2 board
   - Hardkernel ODROID-N2+ board

  Aspeed boards/platforms:
   - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
   - Facebook Wedge400 (AST2500-based, ToR switch)

  Hisilicon SoC:
   - SD5203 SoC

  Nvidia boards:
   - Tegra234 VDK, for pre-silicon Orin SoC

  NXP i.MX boards:
   - Librem 5 phone
   - i.MX8MM DDR4 EVK
   - Variscite VAR-SOM-MX8MN SoM
   - Symphony board
   - Tolino Shine 2 HD
   - TQMa6 SoM
   - Y Soft IOTA Orion

  Rockchip boards:
   - NanoPi R2S board
   - A95X-Z2 board
   - more Rock-Pi4 variants

  STM32 boards:
   - Odyssey SOM board (STM32MP157CAC-based)
   - DH DRC02 board

  Toshiba SoCs/boards:
   - Visconti SoC and TPMV7708 board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
  ARM: dts: nspire: Fix SP804 users
  arm64: dts: lg: Fix SP804 users
  arm64: dts: lg: Fix SP805 clocks
  ARM: mstar: Fix up the fallout from moving the dts/dtsi files
  ARM: mstar: Add mstar prefix to all of the dtsi/dts files
  ARM: mstar: Add interrupt to pm_uart
  ARM: mstar: Add interrupt controller to base dtsi
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
  arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
  arm64: dts: ti: k3-j7200-main: Add USB controller
  arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
  arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
  dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
  ARM: dts: hisilicon: add SD5203 dts
  ARM: dts: hisilicon: fix the system controller compatible nodes
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-10-24T17:39:22+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-10-24T17:39:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=2e368dd2bbeac6bfd50886371db185b1092067b4'/>
<id>2e368dd2bbeac6bfd50886371db185b1092067b4</id>
<content type='text'>
Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms. A bulk of this is smaller fixes
  or cleanups, but some of the new material this time around is:

   - Support for Nvidia Tegra234 SoC

   - Ring accelerator support for TI AM65x

   - PRUSS driver for TI platforms

   - Renesas support for R-Car V3U SoC

   - Reset support for Cortex-M4 processor on i.MX8MQ

  There are also new socinfo entries for a handful of different SoCs and
  platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc
  soc: amlogic: pm-domains: use always-on flag
  reset: sti: reset-syscfg: fix struct description warnings
  reset: imx7: add the cm4 reset for i.MX8MQ
  dt-bindings: reset: imx8mq: add m4 reset
  reset: Fix and extend kerneldoc
  reset: reset-zynqmp: Added support for Versal platform
  dt-bindings: reset: Updated binding for Versal reset driver
  reset: imx7: Support module build
  soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
  soc: fsl: qman: convert to use be32_add_cpu()
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms. A bulk of this is smaller fixes
  or cleanups, but some of the new material this time around is:

   - Support for Nvidia Tegra234 SoC

   - Ring accelerator support for TI AM65x

   - PRUSS driver for TI platforms

   - Renesas support for R-Car V3U SoC

   - Reset support for Cortex-M4 processor on i.MX8MQ

  There are also new socinfo entries for a handful of different SoCs and
  platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc
  soc: amlogic: pm-domains: use always-on flag
  reset: sti: reset-syscfg: fix struct description warnings
  reset: imx7: add the cm4 reset for i.MX8MQ
  dt-bindings: reset: imx8mq: add m4 reset
  reset: Fix and extend kerneldoc
  reset: reset-zynqmp: Added support for Versal platform
  dt-bindings: reset: Updated binding for Versal reset driver
  reset: imx7: Support module build
  soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
  soc: fsl: qman: convert to use be32_add_cpu()
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Don't create fake interrupt hierarchy levels</title>
<updated>2020-10-10T11:12:11+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2020-10-04T17:27:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c351ab7bf2a565951172cadbdebe686137c3fd43'/>
<id>c351ab7bf2a565951172cadbdebe686137c3fd43</id>
<content type='text'>
The Tegra PMC driver does ungodly things with the interrupt hierarchy,
repeatedly corrupting it by pulling hwirq numbers out of thin air,
overriding existing IRQ mappings and changing the handling flow
of unsuspecting users.

All of this is done in the name of preserving the interrupt hierarchy
even when these levels do not exist in the HW. Together with the use
of proper IRQs for IPIs, this leads to an unbootable system as the
rescheduling IPI gets repeatedly repurposed for random drivers...

Instead, let's simply mark the level from which the hierarchy does
not make sense for the HW, and let the core code trim the usused
levels from the hierarchy.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Tegra PMC driver does ungodly things with the interrupt hierarchy,
repeatedly corrupting it by pulling hwirq numbers out of thin air,
overriding existing IRQ mappings and changing the handling flow
of unsuspecting users.

All of this is done in the name of preserving the interrupt hierarchy
even when these levels do not exist in the HW. Together with the use
of proper IRQs for IPIs, this leads to an unbootable system as the
rescheduling IPI gets repeatedly repurposed for random drivers...

Instead, let's simply mark the level from which the hierarchy does
not make sense for the HW, and let the core code trim the usused
levels from the hierarchy.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
