<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/soc/qcom, branch v5.14.7</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>soc: qcom: aoss: Fix the out of bound usage of cooling_devs</title>
<updated>2021-09-18T11:43:21+00:00</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2021-06-29T15:32:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0279ca586636660bf4f728c4d4a1f187cdf68061'/>
<id>0279ca586636660bf4f728c4d4a1f187cdf68061</id>
<content type='text'>
commit a89f355e469dcda129c2522be4fdba00c1c74c83 upstream.

In "qmp_cooling_devices_register", the count value is initially
QMP_NUM_COOLING_RESOURCES, which is 2. Based on the initial count value,
the memory for cooling_devs is allocated. Then while calling the
"qmp_cooling_device_add" function, count value is post-incremented for
each child node.

This makes the out of bound access to the cooling_dev array. Fix it by
passing the QMP_NUM_COOLING_RESOURCES definition to devm_kzalloc() and
initializing the count to 0.

While at it, let's also free the memory allocated to cooling_dev if no
cooling device is found in DT and during unroll phase.

Cc: stable@vger.kernel.org # 5.4
Fixes: 05589b30b21a ("soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC.")
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/20210629153249.73428-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit a89f355e469dcda129c2522be4fdba00c1c74c83 upstream.

In "qmp_cooling_devices_register", the count value is initially
QMP_NUM_COOLING_RESOURCES, which is 2. Based on the initial count value,
the memory for cooling_devs is allocated. Then while calling the
"qmp_cooling_device_add" function, count value is post-incremented for
each child node.

This makes the out of bound access to the cooling_dev array. Fix it by
passing the QMP_NUM_COOLING_RESOURCES definition to devm_kzalloc() and
initializing the count to 0.

While at it, let's also free the memory allocated to cooling_dev if no
cooling device is found in DT and during unroll phase.

Cc: stable@vger.kernel.org # 5.4
Fixes: 05589b30b21a ("soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC.")
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/20210629153249.73428-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: smsm: Fix missed interrupts if state changes while masked</title>
<updated>2021-09-15T08:02:18+00:00</updated>
<author>
<name>Stephan Gerhold</name>
<email>stephan@gerhold.net</email>
</author>
<published>2021-07-12T13:57:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=314560f407211d8f3ed2fc4021bf9c93da1711bd'/>
<id>314560f407211d8f3ed2fc4021bf9c93da1711bd</id>
<content type='text'>
[ Upstream commit e3d4571955050736bbf3eda0a9538a09d9fcfce8 ]

The SMSM driver detects interrupt edges by tracking the last state
it has seen (and has triggered the interrupt handler for). This works
fine, but only if the interrupt does not change state while masked.

For example, if an interrupt is unmasked while the state is HIGH,
the stored last_value for that interrupt might still be LOW. Then,
when the remote processor triggers smsm_intr() we assume that nothing
has changed, even though the state might have changed from HIGH to LOW.

Attempt to fix this by checking the current remote state before
unmasking an IRQ. Use atomic operations to avoid the interrupt handler
from interfering with the unmask function.

This fixes modem crashes in some edge cases with the BAM-DMUX driver.
Specifically, the BAM-DMUX interrupt handler is not called for the
HIGH -&gt; LOW smsm state transition if the BAM-DMUX driver is loaded
(and therefore unmasks the interrupt) after the modem was already started:

qcom-q6v5-mss 4080000.remoteproc: fatal error received: a2_task.c:3188:
  Assert FALSE failed: A2 DL PER deadlock timer expired waiting for Apps ACK

Fixes: c97c4090ff72 ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Signed-off-by: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Link: https://lore.kernel.org/r/20210712135703.324748-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit e3d4571955050736bbf3eda0a9538a09d9fcfce8 ]

The SMSM driver detects interrupt edges by tracking the last state
it has seen (and has triggered the interrupt handler for). This works
fine, but only if the interrupt does not change state while masked.

For example, if an interrupt is unmasked while the state is HIGH,
the stored last_value for that interrupt might still be LOW. Then,
when the remote processor triggers smsm_intr() we assume that nothing
has changed, even though the state might have changed from HIGH to LOW.

Attempt to fix this by checking the current remote state before
unmasking an IRQ. Use atomic operations to avoid the interrupt handler
from interfering with the unmask function.

This fixes modem crashes in some edge cases with the BAM-DMUX driver.
Specifically, the BAM-DMUX interrupt handler is not called for the
HIGH -&gt; LOW smsm state transition if the BAM-DMUX driver is loaded
(and therefore unmasks the interrupt) after the modem was already started:

qcom-q6v5-mss 4080000.remoteproc: fatal error received: a2_task.c:3188:
  Assert FALSE failed: A2 DL PER deadlock timer expired waiting for Apps ACK

Fixes: c97c4090ff72 ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Signed-off-by: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Link: https://lore.kernel.org/r/20210712135703.324748-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: rpmhpd: Use corner in power_off</title>
<updated>2021-09-15T08:02:12+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2021-07-03T00:54:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ee3867d50c8a9239dc1a4043d78230e758ef0442'/>
<id>ee3867d50c8a9239dc1a4043d78230e758ef0442</id>
<content type='text'>
[ Upstream commit d43b3a989bc8c06fd4bbb69a7500d180db2d68e8 ]

rpmhpd_aggregate_corner() takes a corner as parameter, but in
rpmhpd_power_off() the code requests the level of the first corner
instead.

In all (known) current cases the first corner has level 0, so this
change should be a nop, but in case that there's a power domain with a
non-zero lowest level this makes sure that rpmhpd_power_off() actually
requests the lowest level - which is the closest to "power off" we can
get.

While touching the code, also skip the unnecessary zero-initialization
of "ret".

Fixes: 279b7e8a62cc ("soc: qcom: rpmhpd: Add RPMh power domain driver")
Reviewed-by: Rajendra Nayak &lt;rnayak@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Tested-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20210703005416.2668319-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit d43b3a989bc8c06fd4bbb69a7500d180db2d68e8 ]

rpmhpd_aggregate_corner() takes a corner as parameter, but in
rpmhpd_power_off() the code requests the level of the first corner
instead.

In all (known) current cases the first corner has level 0, so this
change should be a nop, but in case that there's a power domain with a
non-zero lowest level this makes sure that rpmhpd_power_off() actually
requests the lowest level - which is the closest to "power off" we can
get.

While touching the code, also skip the unnecessary zero-initialization
of "ret".

Fixes: 279b7e8a62cc ("soc: qcom: rpmhpd: Add RPMh power domain driver")
Reviewed-by: Rajendra Nayak &lt;rnayak@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Tested-by: Sibi Sankar &lt;sibis@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20210703005416.2668319-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2021-07-10T16:46:20+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-07-10T16:46:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=071e5aceebebf1d33b5c29ccfd2688ed39c60007'/>
<id>071e5aceebebf1d33b5c29ccfd2688ed39c60007</id>
<content type='text'>
Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: smem_state: Add devm_qcom_smem_state_get()</title>
<updated>2021-06-23T18:35:12+00:00</updated>
<author>
<name>Stephan Gerhold</name>
<email>stephan@gerhold.net</email>
</author>
<published>2021-06-18T11:15:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=61d1961adf4bd57d1b2c6d94d97323263c470cb2'/>
<id>61d1961adf4bd57d1b2c6d94d97323263c470cb2</id>
<content type='text'>
It is easy to forget to call qcom_smem_state_put() after
a qcom_smem_state_get(). Introduce a devm_qcom_smem_state_get()
helper function that automates this so that qcom_smem_state_put()
is automatically called when a device is removed.

Signed-off-by: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20210618111556.53416-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It is easy to forget to call qcom_smem_state_put() after
a qcom_smem_state_get(). Introduce a devm_qcom_smem_state_get()
helper function that automates this so that qcom_smem_state_put()
is automatically called when a device is removed.

Signed-off-by: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20210618111556.53416-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: rpmpd: Add MDM9607 RPM Power Domains</title>
<updated>2021-06-10T16:25:06+00:00</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@somainline.org</email>
</author>
<published>2021-01-31T01:32:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=af32011f76b759d68a6e3005d450ef7b82e1479a'/>
<id>af32011f76b759d68a6e3005d450ef7b82e1479a</id>
<content type='text'>
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: smd-rpm: Add MSM8226 compatible</title>
<updated>2021-05-31T23:29:14+00:00</updated>
<author>
<name>Bartosz Dudziak</name>
<email>bartosz.dudziak@snejp.pl</email>
</author>
<published>2021-05-02T12:20:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d8ea59e7e3d166098e6ecb81f84e7f4c5760325c'/>
<id>d8ea59e7e3d166098e6ecb81f84e7f4c5760325c</id>
<content type='text'>
Add a compatible for the RPM on the Qualcomm MSM8226 platform.

Signed-off-by: Bartosz Dudziak &lt;bartosz.dudziak@snejp.pl&gt;
Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a compatible for the RPM on the Qualcomm MSM8226 platform.

Signed-off-by: Bartosz Dudziak &lt;bartosz.dudziak@snejp.pl&gt;
Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: socinfo: import PMIC IDs from pmic-spmi</title>
<updated>2021-05-27T02:22:37+00:00</updated>
<author>
<name>Luca Weiss</name>
<email>luca@z3ntu.xyz</email>
</author>
<published>2021-05-26T20:08:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7fda2b0bfbd98e554be9dbbdf930c34674438c85'/>
<id>7fda2b0bfbd98e554be9dbbdf930c34674438c85</id>
<content type='text'>
The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more
up-to-date list of PMICs with the respective IDs. Use those names for
socinfo. Some IDs seem to have been assigned to multiple PMICs so keep
that in the name as well.

Signed-off-by: Luca Weiss &lt;luca@z3ntu.xyz&gt;
Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more
up-to-date list of PMICs with the respective IDs. Use those names for
socinfo. Some IDs seem to have been assigned to multiple PMICs so keep
that in the name as well.

Signed-off-by: Luca Weiss &lt;luca@z3ntu.xyz&gt;
Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: socinfo: Add more IDs</title>
<updated>2021-05-26T04:07:38+00:00</updated>
<author>
<name>Luca Weiss</name>
<email>luca@z3ntu.xyz</email>
</author>
<published>2021-05-04T20:36:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9bf8257fefc9d14f589c2a933ba1193cc1912200'/>
<id>9bf8257fefc9d14f589c2a933ba1193cc1912200</id>
<content type='text'>
Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q

Signed-off-by: Luca Weiss &lt;luca@z3ntu.xyz&gt;
Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q

Signed-off-by: Luca Weiss &lt;luca@z3ntu.xyz&gt;
Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: qcom: rpmhpd: Add SC8180X</title>
<updated>2021-05-26T04:07:38+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2021-01-20T22:50:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3b1a0582482c81682960aafe69c87660e4fdf3be'/>
<id>3b1a0582482c81682960aafe69c87660e4fdf3be</id>
<content type='text'>
Add the power domains exposed by RPMH in the Qualcomm SC8180X platform.

Reviewed-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the power domains exposed by RPMH in the Qualcomm SC8180X platform.

Reviewed-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</pre>
</div>
</content>
</entry>
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