linux-stable.git/drivers/soc/mediatek, branch v5.13.2 Linux kernel stable tree soc: mediatek: mmsys: Add support for MT8167 SoC 2021-04-06T10:57:10+00:00 Fabien Parent fparent@baylibre.com 2021-04-05T20:03:53+00:00 060f7875bd230df1a8f83a988faaee09d693e465 Add routing table for DSI on MT8167 SoC. The registers are mostly incompatible with the current defines, so new one for MT8167 are added. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20210405200354.2194930-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Add routing table for DSI on MT8167 SoC. The registers are mostly
incompatible with the current defines, so new one for MT8167 are added.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210405200354.2194930-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pm-domains: Add a power domain names for mt8167 2021-04-01T09:36:04+00:00 Enric Balletbo i Serra enric.balletbo@collabora.com 2021-02-25T17:50:00+00:00 60d93f64a851d276b23b7ef68ddc638258485d32 Add the power domains names for the mt8167 SoC. Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210225175000.824661-4-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Add the power domains names for the mt8167 SoC.

Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pm-domains: Add a power domain names for mt8192 2021-04-01T09:36:04+00:00 Enric Balletbo i Serra enric.balletbo@collabora.com 2021-02-25T17:49:59+00:00 3edc01bc53c639b1c98f57e7f1c026aae6a25a62 Add the power domains names for the mt8192 SoC. Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Add the power domains names for the mt8192 SoC.

Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pm-domains: Add a power domain names for mt8183 2021-04-01T09:36:04+00:00 Enric Balletbo i Serra enric.balletbo@collabora.com 2021-02-25T17:49:58+00:00 e57b8112258ed46dff23b49d6e400f54a8dbf1c3 Add the power domains names for the mt8183 SoC. This removes the debugfs errors like the following: debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:

  debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!

Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pm-domains: Add a meaningful power domain name 2021-04-01T09:36:04+00:00 Enric Balletbo i Serra enric.balletbo@collabora.com 2021-02-25T17:49:57+00:00 022b02b4505ecea5eda02b18683531e49f7d8eb7 Add the power domains names to the power domain struct so we have meaningful name for every power domain. This also removes the following debugfs error message. [ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! [ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! [ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! ... Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.

  [    2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  ...

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: Make symbol 'mtk_mutex_driver' static 2021-04-01T09:27:54+00:00 Wei Yongjun weiyongjun1@huawei.com 2021-02-10T07:56:56+00:00 b23ab27b9a1c4720f628fb12fe4cd767e3266c4c The sparse tool complains as follows: drivers/soc/mediatek/mtk-mutex.c:464:24: warning: symbol 'mtk_mutex_driver' was not declared. Should it be static? This symbol is not used outside of mtk-mutex.c, so this commit marks it static. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://lore.kernel.org/r/20210210075656.1096251-1-weiyongjun1@huawei.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
The sparse tool complains as follows:

drivers/soc/mediatek/mtk-mutex.c:464:24: warning:
 symbol 'mtk_mutex_driver' was not declared. Should it be static?

This symbol is not used outside of mtk-mutex.c, so this
commit marks it static.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210210075656.1096251-1-weiyongjun1@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: mmsys: Add mt8183 mmsys routing table 2021-03-31T11:52:52+00:00 Hsin-Yi Wang hsinyi@chromium.org 2021-03-30T11:04:23+00:00 1ff1270fca33c582b53b51dc2903f21ae7e1f4bc mt8183 has different routing registers than mt8173. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210330110423.3542163-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
mt8183 has different routing registers than mt8173.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210330110423.3542163-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs 2021-03-30T10:24:09+00:00 Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com 2021-03-12T15:34:45+00:00 9161385d53e251ea8c3ee1f3785db1de4a4ef792 MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for power management. This patch adds pwrap master driver to access PMIC_MT6359. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Link: https://lore.kernel.org/r/1615563286-22126-5-git-send-email-hsin-hsiung.wang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-5-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pwrap: add arbiter capability 2021-03-30T10:24:09+00:00 Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com 2021-03-12T15:34:43+00:00 9d498d0b4043e08273ff6eb6bd2d2e50fec26134 Add arbiter capability for pwrap driver. The arbiter capability uses new design to judge the priority and latency for multi-channel. The design with arbiter support cannot change the watchdog timer. This patch is preparing for adding mt6873/8192 pwrap support. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Link: https://lore.kernel.org/r/1615563286-22126-3-git-send-email-hsin-hsiung.wang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
The design with arbiter support cannot change the watchdog timer.
This patch is preparing for adding mt6873/8192 pwrap support.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-3-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: pwrap: use BIT() macro 2021-03-30T10:24:09+00:00 Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com 2021-03-12T15:34:42+00:00 d337ed031dfb8bc7d483b25c9052dca98fc9931d Use a better BIT() marco for the bit definition. No functional changes, cleanup only. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Link: https://lore.kernel.org/r/1615563286-22126-2-git-send-email-hsin-hsiung.wang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/1615563286-22126-2-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>