linux-stable.git/drivers/soc/mediatek, branch v4.6.2

Revert "soc: mediatek: SCPSYS: Fix double enabling of regulators"

2016-04-13T09:55:08+00:00

This reverts commit cc8ed76938b5cf6a54ab3d60edabaf808dc960d1
("soc: mediatek: SCPSYS: Fix double enabling of regulators") [1].

This patch fixes mt8173-evb failing boot issue. With commit [1],
genpd state will not sync to real power domain state. So some
resources such as clocks and regulators may stay in a wrong state.

There is no regulator double enabling issue on mainline kernel, so
we can refert commit [1] safely.

Signed-off-by: James Liao 
Signed-off-by: Matthias Brugger

soc: mediatek: SCPSYS: Fix double enabling of regulators

2016-02-01T10:28:07+00:00

With CONFIG_PM enabled do not call genpd->power_on manually as this
will cause the regulators being turned on once in SCPSYS probe and
then again when the genpd core turns on the domains. Instead, call
genpd->power_on only with CONFIG_PM disabled and tell the genpd core
that the domains are disabled when registered.

Signed-off-by: Sascha Hauer 
Tested-by: Daniel Kurtz 
Reviewed-by: Daniel Kurtz 
Signed-off-by: Matthias Brugger

soc: mediatek: SCPSYS: use builtin_platform_driver

2016-01-25T17:59:41+00:00

SCPSYS can't be built as module. Use builtin_platform_driver instead.
For this probe must not be __init and the data accessed can't be
__initconst. Remove this macros. To make the impact as small as possible,
fold scp_domain_data into scp_domain via a pointer.

Cc: Sascha Hauer 
Cc: Arnd Bergmann 
Reported-by: Daniel Kurtz 
Signed-off-by: Matthias Brugger 
Reviewed-by: Daniel Kurtz 
Tested-by: Daniel Kurtz 
Acked-by: Arnd Bergmann

soc: mediatek: PMIC wrap: clear the STAUPD_TRIG bit of WDT_SRC_EN

2016-01-25T17:59:41+00:00

Since STAUPD interrupts aren't handled on mt8173, disable watchdog timeout
monitor of STAUPD to avoid WDT_INT triggered by STAUPD.

Signed-off-by: Henry Chen 
Reviewed-by: Daniel Kurtz 
Signed-off-by: Matthias Brugger

soc: mediatek: PMIC wrap: Clear the vldclr if state machine stay on FSM_VLDCLR state.

2016-01-25T17:59:41+00:00

Sometimes PMIC is too busy to send data in time to cause pmic wrap timeout,
because pmic wrap is waiting for FSM_VLDCLR after finishing WACS2_CMD. It
just return error when issue happened, so the state machine will stay on
FSM_VLDCLR state when data send back later by PMIC and timeout again in next
time because pmic wrap waiting for FSM_IDLE state at the beginning of the
read/write function.

Clear the vldclr when timeout if state machine stay on FSM_VLDCLR.

Signed-off-by: Henry Chen 
Tested-by: Ricky Liang 
Signed-off-by: Matthias Brugger

Merge tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers

2015-12-22T21:02:28+00:00

Change the scpsys to builtin_platform_driver_probe.

Add regulator support for scpsys driver.

* tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek:
  drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular
  soc: mediatek: SCPSYS: Add regulator support

Signed-off-by: Olof Johansson

drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular

2015-12-18T08:41:43+00:00

The Kconfig currently controlling compilation of this code is:

drivers/soc/mediatek/Kconfig:config MTK_SCPSYS
drivers/soc/mediatek/Kconfig:   bool "MediaTek SCPSYS Support"

...meaning that it currently is not being built as a module by anyone.

Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.

Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.

Cc: Matthias Brugger 
Cc: Sascha Hauer 
Cc: Daniel Kurtz 
Cc: Paul Gortmaker 
Cc: Olof Johansson 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Signed-off-by: Paul Gortmaker 
Signed-off-by: Matthias Brugger

soc: mediatek: SCPSYS: Add regulator support

2015-12-18T08:41:42+00:00

The power domains are supplied by regulators. Add support for them so
that the regulators are properly turned on before a domain is powered up
and turned off when a domain is powered down.

Signed-off-by: Sascha Hauer 
Signed-off-by: Matthias Brugger

soc: Mediatek: Enable SCPSYS power domain driver by default

2015-11-24T18:15:38+00:00

If enable Mediatek 8173 SoC, it should also enable power domain
driver. Otherwise access clk subsystem register will fail.

Signed-off-by: Eddie Huang 
Acked-by: Matthias Brugger 
Signed-off-by: Kevin Hilman

soc: mediatek: Fix random hang up issue while kernel init

2015-10-14T13:34:43+00:00

In kernel late init, it turns off all unused clocks, which
needs to access subsystem registers such as VENC and VENC_LT.

Accessing MT8173 VENC registers needs two top clocks, mm_sel and
venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel.
So we need to keep these clocks on before accessing their registers.

This patch keeps venc_sel / venclt_sel clock on when
VENC / VENC_LT's power is on, to prevent system hang up while
accessing its registeres.

Signed-off-by: James Liao 
Signed-off-by: Matthias Brugger