linux-stable.git/drivers/soc/mediatek, branch linux-5.5.y Linux kernel stable tree soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helper 2020-04-08T07:10:02+00:00 Bibby Hsieh bibby.hsieh@mediatek.com 2020-02-14T04:35:45+00:00 ce96751f44eff35477295afe63d598833c8e714a commit ce35e21d82bcac8b3fd5128888f9e233f8444293 upstream. Mediatek CMDQ driver have a mechanism to do TXDONE_BY_ACK, so we should set knows_txdone. Fixes:576f1b4bc802 ("soc: mediatek: Add Mediatek CMDQ helper") Cc: stable@vger.kernel.org # v5.0+ Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
commit ce35e21d82bcac8b3fd5128888f9e233f8444293 upstream.

Mediatek CMDQ driver have a mechanism to do TXDONE_BY_ACK,
so we should set knows_txdone.

Fixes:576f1b4bc802 ("soc: mediatek: Add Mediatek CMDQ helper")

Cc: stable@vger.kernel.org # v5.0+
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Merge mainline/master into arm/fixes 2019-12-05T21:18:54+00:00 Olof Johansson olof@lixom.net 2019-12-05T21:16:58+00:00 942e6f8a8314e5550e254519dfba4ccd5170421d This brings in the mainline tree right after armsoc contents was merged this release cycle, so that we can re-run savedefconfig, etc. Signed-off-by: Olof Johansson <olof@lixom.net> 
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>
soc: mediatek: cmdq: fixup wrong input order of write api 2019-12-05T18:10:58+00:00 Bibby Hsieh bibby.hsieh@mediatek.com 2019-11-27T16:54:28+00:00 47b6b604b2bf396e110e7c2e074fef459bf07b4f Fixup a issue was caused by the previous fixup patch. Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter") Link: https://lore.kernel.org/r/20191127165428.19662-1-matthias.bgg@gmail.com Cc: <stable@vger.kernel.org> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net> 
Fixup a issue was caused by the previous fixup patch.

Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter")

Link: https://lore.kernel.org/r/20191127165428.19662-1-matthias.bgg@gmail.com
Cc: <stable@vger.kernel.org>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
soc: mediatek: Refactor bus protection control 2019-11-07T09:11:04+00:00 Weiyi Lu weiyi.lu@mediatek.com 2019-08-28T09:11:40+00:00 662c9d55c5ccb37f3920ecab9720f2ebf2a6ca18 Put bus protection enable and disable control in separate functions. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Put bus protection enable and disable control in separate functions.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: Refactor sram control 2019-11-07T09:11:04+00:00 Weiyi Lu weiyi.lu@mediatek.com 2019-08-28T09:11:39+00:00 0545aa1b7a1472a4d0499ccc7666634c8cf47305 Put sram enable and disable control in separate functions. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> [mb: fix coding style of reading register and changing the read value] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Put sram enable and disable control in separate functions.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
[mb: fix coding style of reading register and changing the read value]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: Refactor clock control 2019-11-07T09:11:04+00:00 Weiyi Lu weiyi.lu@mediatek.com 2019-08-28T09:11:38+00:00 cef021e2f5cb8a1c8cd23ebc77232e6563ce251d Put clock enable and disable control in separate function. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Put clock enable and disable control in separate function.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: Refactor regulator control 2019-11-07T09:11:04+00:00 Weiyi Lu weiyi.lu@mediatek.com 2019-08-28T09:11:37+00:00 d744d035ecb57decf0ae1711228756445708545a Put regulator enable and disable control in separate functions. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Put regulator enable and disable control in separate functions.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: Refactor polling timeout and documentation 2019-11-07T09:11:04+00:00 Weiyi Lu weiyi.lu@mediatek.com 2019-08-28T09:11:36+00:00 90a943145e2ef17b559ef9e98a7c12a1abc9ae84 Use USEC_PER_SEC to indicate the polling timeout directly. And add documentation of scp_domain_data. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
Use USEC_PER_SEC to indicate the polling timeout directly.
And add documentation of scp_domain_data.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: cmdq: change the type of input parameter 2019-08-23T12:06:48+00:00 Bibby Hsieh bibby.hsieh@mediatek.com 2019-08-20T08:49:28+00:00 556030f0604f3cf5f1ea91307c0695541e5c74ca According to the cmdq hardware design, the subsys is u8, the offset is u16 and the event id is u16. This patch changes the type of subsys, offset and event id to the correct type. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
According to the cmdq hardware design, the subsys is u8,
the offset is u16 and the event id is u16.
This patch changes the type of subsys, offset and event id
to the correct type.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
soc: mediatek: cmdq: reorder the parameter 2019-08-23T12:03:56+00:00 Bibby Hsieh bibby.hsieh@mediatek.com 2019-08-20T08:49:27+00:00 1a92f989126ef0743650d43f75bfc431a5c3a310 The order of gce instructions is [subsys offset value] so reorder the parameter of cmdq_pkt_write_mask and cmdq_pkt_write function. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
The order of gce instructions is [subsys offset value]
so reorder the parameter of cmdq_pkt_write_mask
and cmdq_pkt_write function.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>